coreboot-gerrit September 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/amd/*: move reset_i2c_peripherals call after early GPIO setup
by Martin Roth (Code Review) 03 Sep '21

03 Sep '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Felix Held. Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57291 ) Change subject: soc/amd/*: move reset_i2c_peripherals call after early GPIO setup ...................................................................... Patch Set 1: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/57291/comment/52ae9610_5faaff82 PS1, Line 11: shiftes shifters Patchset: PS1: Looking at the flow, do you think we should make an explicit call to initialize the GPIOs instead of doing it in the mainboard early init code? I don't think that smbus, lpc or the SPI init code actually touches the pins, but they could, so we'd want those to happen after the GPIO init as well. -- To view, visit https://review.coreboot.org/c/coreboot/+/57291 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If02140aef56ed6db7ecee24811724b5b24e54a91 Gerrit-Change-Number: 57291 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 03 Sep 2021 14:56:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush: If not using PCIe WWAN, disable the port
by Martin Roth (Code Review) 03 Sep '21

03 Sep '21

Attention is currently required from: Raul Rangel, Karthik Ramasubramanian, Felix Held. Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57316 ) Change subject: mb/google/guybrush: If not using PCIe WWAN, disable the port ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/57316/comment/20702285_febf1e5d PS1, Line 10: and not do : the PCIe training. > PCIE training is no longer being run for the USB WWAN card, I updated the commit message of the nex […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/57316 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I79c32e4814672c03ee0821786d5be1c77fd1b410 Gerrit-Change-Number: 57316 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 03 Sep 2021 14:50:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Martin Roth <martinroth(a)google.com> Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/fsp2_0/Makefile: add condition for FSP-T CBFS file
by Felix Held (Code Review) 03 Sep '21

03 Sep '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/57220 ) Change subject: drivers/intel/fsp2_0/Makefile: add condition for FSP-T CBFS file ...................................................................... drivers/intel/fsp2_0/Makefile: add condition for FSP-T CBFS file Make adding the FSP-T file to CBFS depend on both ADD_FSP_BINARIES and FSP_CAR Kconfig options being set. The FSP_T_FILE Kconfig option depends on both, so also check if both are selected in the Makefile where it tries to add the FSP-T to the CBFS. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Suggested-by: Furquan Shaikh <furquan(a)google.com> Change-Id: Id347336f2751c6d871f31d89c30a1222037c2d69 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57220 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Nico Huber <nico.h(a)gmx.de> --- M src/drivers/intel/fsp2_0/Makefile.inc 1 file changed, 4 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved diff --git a/src/drivers/intel/fsp2_0/Makefile.inc b/src/drivers/intel/fsp2_0/Makefile.inc index 3bbc722..b472721 100644 --- a/src/drivers/intel/fsp2_0/Makefile.inc +++ b/src/drivers/intel/fsp2_0/Makefile.inc @@ -43,13 +43,15 @@ # Add FSP blobs into cbfs. SoC code may supply additional options with # -options, e.g --xip or -b -cbfs-files-$(CONFIG_FSP_CAR) += $(FSP_T_CBFS) +ifeq ($(CONFIG_ADD_FSP_BINARIES)$(CONFIG_FSP_CAR),yy) +cbfs-files-y += $(FSP_T_CBFS) $(FSP_T_CBFS)-file := $(call strip_quotes,$(CONFIG_FSP_T_FILE)) $(FSP_T_CBFS)-type := fsp ifeq ($(CONFIG_FSP_T_XIP),y) $(FSP_T_CBFS)-options := --xip $(TXTIBB) $(FSP_T_CBFS)-position = $(CONFIG_FSP_T_LOCATION) -endif +endif # CONFIG_FSP_T_XIP +endif # CONFIG_ADD_FSP_BINARIES && CONFIG_FSP_CAR cbfs-files-$(CONFIG_ADD_FSP_BINARIES) += $(FSP_M_CBFS) $(FSP_M_CBFS)-file := $(call strip_quotes,$(CONFIG_FSP_M_FILE)) -- To view, visit https://review.coreboot.org/c/coreboot/+/57220 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id347336f2751c6d871f31d89c30a1222037c2d69 Gerrit-Change-Number: 57220 Gerrit-PatchSet: 4 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: drivers/intel/fsp/Makefile: error out when FSP files aren't specified
by Felix Held (Code Review) 03 Sep '21

03 Sep '21

Attention is currently required from: Nico Huber, Furquan Shaikh, Tim Wawrzynczak, Andrey Petrov, Patrick Rudolph. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57219 ) Change subject: drivers/intel/fsp/Makefile: error out when FSP files aren't specified ...................................................................... Patch Set 5: (1 comment) File src/drivers/intel/fsp2_0/Makefile.inc: https://review.coreboot.org/c/coreboot/+/57219/comment/841261b0_be1cd1a7 PS5, Line 114: $(warning ADD_FSP_BINARIES isn't selected even though this SoC uses the FSP.) : $(warning The resulting image likely won't boot successfully.) > I'd say we want a warning but not like this. We already have such […] i agree that it would be much more useful to have the warning at the end of the build. removed that part from this patch -- To view, visit https://review.coreboot.org/c/coreboot/+/57219 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie5f2d75d066f0b4e491e9c8420b7a0cbd4ba9e28 Gerrit-Change-Number: 57219 Gerrit-PatchSet: 5 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 03 Sep 2021 14:23:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/fsp/Makefile: error out when FSP files aren't specified
by Felix Held (Code Review) 03 Sep '21

03 Sep '21

Attention is currently required from: Furquan Shaikh, Tim Wawrzynczak, Andrey Petrov, Patrick Rudolph, Felix Held. Hello build bot (Jenkins), Nico Huber, Furquan Shaikh, Tim Wawrzynczak, Andrey Petrov, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/57219 to look at the new patch set (#6). Change subject: drivers/intel/fsp/Makefile: error out when FSP files aren't specified ...................................................................... drivers/intel/fsp/Makefile: error out when FSP files aren't specified Error out when the FSP binaries that are supposed to be added aren't specified. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Suggested-by: Nico Huber <nico.h(a)gmx.de> Change-Id: Ie5f2d75d066f0b4e491e9c8420b7a0cbd4ba9e28 --- M src/drivers/intel/fsp2_0/Makefile.inc 1 file changed, 15 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/57219/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/57219 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie5f2d75d066f0b4e491e9c8420b7a0cbd4ba9e28 Gerrit-Change-Number: 57219 Gerrit-PatchSet: 6 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/brya/variants/gimble: add GPP_B4 and GPP_D11 to early_gpio_...
by Tim Wawrzynczak (Code Review) 03 Sep '21

03 Sep '21

Attention is currently required from: YH Lin, Furquan Shaikh, Paul Fagerburg, Kane Chen, Mark Hsieh, Felix Held. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57359 ) Change subject: mb/google/brya/variants/gimble: add GPP_B4 and GPP_D11 to early_gpio_table ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/57359/comment/164f2e40_0fb833ce PS2, Line 9: needs extra time to run boot process > Hi Furquan, […] From bootblock (early GPIO table) to depthcharge is probably ~800ms, but ramstage (normal GPIO table) to depthcharge is probably closer to ~300ms. 1) Please double-check required power-on time (and other power sequencing requirements) 2) Ensure that this does not violate any minimum power-off times for the storage device as well (time between a reboot making the GPIOs go hi-Z and before they are driven again in bootblock here). -- To view, visit https://review.coreboot.org/c/coreboot/+/57359 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib76965db2a6cd0c19be4043fec73af297a619c7b Gerrit-Change-Number: 57359 Gerrit-PatchSet: 2 Gerrit-Owner: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Will Tsai <will_tsai(a)wistron.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Attention: Kane Chen <kane.chen(a)intel.com> Gerrit-Attention: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 03 Sep 2021 14:12:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Comment-In-Reply-To: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/variants/gimble: Enable SaGv support
by Tim Wawrzynczak (Code Review) 03 Sep '21

03 Sep '21

Attention is currently required from: YH Lin, Paul Menzel, Kane Chen, Mark Hsieh, Felix Held. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57357 ) Change subject: mb/google/brya/variants/gimble: Enable SaGv support ...................................................................... Patch Set 2: Code-Review+1 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/57357/comment/1f97ac2d_6911319c PS2, Line 9: This patch enables SaGv support for gimble. Have you boot tested it? -- To view, visit https://review.coreboot.org/c/coreboot/+/57357 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I29887418827614afb10558c6958c9c5e9667079e Gerrit-Change-Number: 57357 Gerrit-PatchSet: 2 Gerrit-Owner: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Marx Wang <marx.wang(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Will Tsai <will_tsai(a)wistron.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kane Chen <kane.chen(a)intel.com> Gerrit-Attention: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 03 Sep 2021 14:08:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/variants/gimble: add GPP_B4 and GPP_D11 to early_gpio_...
by Mark Hsieh (Code Review) 03 Sep '21

03 Sep '21

Attention is currently required from: YH Lin, Furquan Shaikh, Tim Wawrzynczak, Paul Fagerburg, Kane Chen, Felix Held. Mark Hsieh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57359 ) Change subject: mb/google/brya/variants/gimble: add GPP_B4 and GPP_D11 to early_gpio_table ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/57359/comment/c5d48ce5_13d991aa PS2, Line 9: needs extra time to run boot process > How much is the total required time? Did you check the datasheet? Hi Furquan, We have asked vendor to this question, but they don't have about this datasheet. Do you want to know how long it takes to boot into OS ? -- To view, visit https://review.coreboot.org/c/coreboot/+/57359 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib76965db2a6cd0c19be4043fec73af297a619c7b Gerrit-Change-Number: 57359 Gerrit-PatchSet: 2 Gerrit-Owner: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Will Tsai <will_tsai(a)wistron.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Attention: Kane Chen <kane.chen(a)intel.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 03 Sep 2021 13:37:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/variants/gimble: Enable SaGv support
by Mark Hsieh (Code Review) 03 Sep '21

03 Sep '21

Attention is currently required from: YH Lin, Paul Menzel, Tim Wawrzynczak, Kane Chen, Felix Held. Mark Hsieh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57357 ) Change subject: mb/google/brya/variants/gimble: Enable SaGv support ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/57357/comment/1c8cb43a_511b44fe PS2, Line 9: This patch enables SaGv support for gimble. > Why can it be enabled? Hi Paul, The ADL-P reference board has enabled SaGv and on Gimble, we also need to enable it. https://partnerissuetracker.corp.google.com/issues/198531517 -- To view, visit https://review.coreboot.org/c/coreboot/+/57357 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I29887418827614afb10558c6958c9c5e9667079e Gerrit-Change-Number: 57357 Gerrit-PatchSet: 2 Gerrit-Owner: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Marx Wang <marx.wang(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Will Tsai <will_tsai(a)wistron.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Kane Chen <kane.chen(a)intel.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 03 Sep 2021 13:29:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/dptf: Introduce new thermal control mechanism for pch d...
by Sumeet R Pawnikar (Code Review) 03 Sep '21

03 Sep '21

Attention is currently required from: Furquan Shaikh, Paul Menzel, Tim Wawrzynczak, Patrick Rudolph, Karthik Ramasubramanian. Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57096 ) Change subject: drivers/intel/dptf: Introduce new thermal control mechanism for pch device ...................................................................... Patch Set 6: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/57096/comment/3e971d52_7c8c5d39 PS1, Line 7: tpch: Introduce new thermal control mechanism for pch device > drivers/intel/tpch: Done https://review.coreboot.org/c/coreboot/+/57096/comment/726419fd_505a5ce1 PS1, Line 9: Introduce new thermal control mechanism for pch device. > Please elaborate. Done File src/drivers/intel/tpch/tpch.c: https://review.coreboot.org/c/coreboot/+/57096/comment/9ca14f21_e4dfc50e PS1, Line 14: static void tpch_write_hid(bool is_eisa, const char *hid) : { : if (is_eisa) : acpigen_emit_eisaid(hid); : else : acpigen_write_string(hid); : } > if this driver ends up merging with the regular DPTF drive, this function is moot, there is `dptf_wr […] Done https://review.coreboot.org/c/coreboot/+/57096/comment/850b3c69_5b6611d8 PS1, Line 55: acpigen_write_scope("\\_SB"); : acpigen_write_device(acpi_device_name(dev)); > if TPCH is added to the DPTF participants, then you can add support in `scope_of` to handle this. Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/57096 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I035d2844b9ba6a9532ae006fc1c43e34cb94328a Gerrit-Change-Number: 57096 Gerrit-PatchSet: 6 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 03 Sep 2021 13:24:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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coreboot-gerrit September 2021