coreboot-gerrit September 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/google/brya/brya0: Add new DB_USB option
by Angel Pons (Code Review) 05 Sep '21

05 Sep '21

Attention is currently required from: Tim Wawrzynczak. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56610 ) Change subject: mb/google/brya/brya0: Add new DB_USB option ...................................................................... Patch Set 4: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/56610 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I21200bf51f219602cd97a36d20a103292f18a6e8 Gerrit-Change-Number: 56610 Gerrit-PatchSet: 4 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Sun, 05 Sep 2021 15:11:07 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: arch/riscv: Avoid gcc11 replacing memset implementation with memset call
by Angel Pons (Code Review) 05 Sep '21

05 Sep '21

Attention is currently required from: Philipp Hug, Ron Minnich. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56429 ) Change subject: arch/riscv: Avoid gcc11 replacing memset implementation with memset call ...................................................................... Patch Set 5: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/56429 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3459a519d46a123f873306000b8b2261bd64e0c3 Gerrit-Change-Number: 56429 Gerrit-PatchSet: 5 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Ron Minnich <rminnich(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: Ron Minnich <rminnich(a)gmail.com> Gerrit-Comment-Date: Sun, 05 Sep 2021 15:10:44 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/generic/ioapic: Drop enable_virtual_wire
by Angel Pons (Code Review) 05 Sep '21

05 Sep '21

Attention is currently required from: Stefan Ott, Furquan Shaikh, Kyösti Mälkki, Alexander Couzens, Patrick Rudolph. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55287 ) Change subject: drivers/generic/ioapic: Drop enable_virtual_wire ...................................................................... Patch Set 7: Code-Review+2 (1 comment) File src/arch/x86/ioapic.c: https://review.coreboot.org/c/coreboot/+/55287/comment/70f0d103_dc935c2f PS5, Line 82: write_vector(ioapic_base, 0, high, low); > Looking at 7series / C216 doc 326776-003 […] Anything to do? -- To view, visit https://review.coreboot.org/c/coreboot/+/55287 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie87816271fa63bba892c8615aa5e72ee68f6ba93 Gerrit-Change-Number: 55287 Gerrit-PatchSet: 7 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Stefan Ott <coreboot(a)desire.ch> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Stefan Ott <coreboot(a)desire.ch> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Sun, 05 Sep 2021 15:07:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: lib/Makefile.inc: Remove effect-free line
by Angel Pons (Code Review) 05 Sep '21

05 Sep '21

Attention is currently required from: Paul Menzel. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56216 ) Change subject: lib/Makefile.inc: Remove effect-free line ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/56216/comment/d32defa1_289f1bb9 PS1, Line 8: > Oh, I just saw the typo now. […] What exactly should I add? -- To view, visit https://review.coreboot.org/c/coreboot/+/56216 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ife2ee152ab32ef23df5986c47bec490db592ab60 Gerrit-Change-Number: 56216 Gerrit-PatchSet: 3 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Sun, 05 Sep 2021 15:06:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: guybrush/variants/baseboard/devicetree.cb
by Angel Pons (Code Review) 05 Sep '21

05 Sep '21

Attention is currently required from: Name of user not set #1003801, Julian Schroeder. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57215 ) Change subject: guybrush/variants/baseboard/devicetree.cb ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: Why are these IDs not programmed in SoC code? -- To view, visit https://review.coreboot.org/c/coreboot/+/57215 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4fdb5af1cbc3c70cc113ef6f0fd9332e1a27f142 Gerrit-Change-Number: 57215 Gerrit-PatchSet: 2 Gerrit-Owner: Name of user not set #1003801 Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Julian Schroeder <julianmarcusschroeder(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Name of user not set #1003801 Gerrit-Attention: Julian Schroeder <julianmarcusschroeder(a)gmail.com> Gerrit-Comment-Date: Sun, 05 Sep 2021 15:03:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: documentation: add a section on devicetree refs
by Angel Pons (Code Review) 05 Sep '21

05 Sep '21

Attention is currently required from: Edward O'Callaghan, Peter Marheine. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57354 ) Change subject: documentation: add a section on devicetree refs ...................................................................... Patch Set 2: (1 comment) File Documentation/acpi/devicetree.md: https://review.coreboot.org/c/coreboot/+/57354/comment/bdb0f37f_c5970b9f PS2, Line 23: & I'd much prefer to spell out `and` here. -- To view, visit https://review.coreboot.org/c/coreboot/+/57354 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4b30f7d531cfc3453d6523a76084f1969125b4bf Gerrit-Change-Number: 57354 Gerrit-PatchSet: 2 Gerrit-Owner: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Comment-Date: Sun, 05 Sep 2021 14:59:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/fsp2_0/Kconfig: select HAVE_DISPLAY_MTRRS
by Angel Pons (Code Review) 05 Sep '21

05 Sep '21

Attention is currently required from: Raul Rangel, Furquan Shaikh, Marshall Dawson, Andrey Petrov, Patrick Rudolph, Felix Held. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51575 ) Change subject: drivers/intel/fsp2_0/Kconfig: select HAVE_DISPLAY_MTRRS ...................................................................... Patch Set 2: (1 comment) File src/drivers/intel/fsp2_0/Kconfig: https://review.coreboot.org/c/coreboot/+/51575/comment/dfa5f9db_683ec416 PS2, Line 6: select HAVE_DISPLAY_MTRRS Wouldn't a `depends on` clause be more appropriate? It's the AMD SoCs that should be selecting `HAVE_DISPLAY_MTRRS`. -- To view, visit https://review.coreboot.org/c/coreboot/+/51575 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2894689ce58e7404d9d5a894f3c288bc4016ea19 Gerrit-Change-Number: 51575 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Sun, 05 Sep 2021 14:57:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: [wip]mb/dell: add Dell Optiplex XE2
by Angel Pons (Code Review) 05 Sep '21

05 Sep '21

Attention is currently required from: amersel. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57085 ) Change subject: [wip]mb/dell: add Dell Optiplex XE2 ...................................................................... Patch Set 2: (33 comments) Patchset: PS2: Nice! File src/mainboard/dell/optiplex_xe2/Kconfig: https://review.coreboot.org/c/coreboot/+/57085/comment/b44e68fa_fc3594f9 PS2, Line 6: select CPU_INTEL_HASWELL Should be selected by NORTHBRIDGE_INTEL_HASWELL already https://review.coreboot.org/c/coreboot/+/57085/comment/ce5e6465_6e02ce0a PS2, Line 11: # FIXME: check this Drop the comment? https://review.coreboot.org/c/coreboot/+/57085/comment/e28bb971_443e8985 PS2, Line 17: TSC_MONOTONIC_TIMER huh? https://review.coreboot.org/c/coreboot/+/57085/comment/6329dea5_beda79d3 PS2, Line 21: #config GFX_GMA_CPU_VARIANT : # string : # default "Normal" Please drop https://review.coreboot.org/c/coreboot/+/57085/comment/efc767e5_b8491fad PS2, Line 37: config VGA_BIOS_FILE : string : default "pci8086,0412.rom" : : config VGA_BIOS_ID : string : default "8086,0412" This depends on the installed processor, please remove https://review.coreboot.org/c/coreboot/+/57085/comment/3cce9ed4_0a5e6dff PS2, Line 45: config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID : hex : default 0x5c1 : : config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID : hex : default 0x1028 No longer makes a difference, please remove https://review.coreboot.org/c/coreboot/+/57085/comment/e284ed6b_2f6c1cb3 PS2, Line 53: #config MAX_CPUS : # int : # default 8 No longer needed, can be removed https://review.coreboot.org/c/coreboot/+/57085/comment/e24d9363_e2590aaa PS2, Line 57: #config USBDEBUG_HCD_INDEX # FIXME: check this : # int : # default 2 If untested, just remove this File src/mainboard/dell/optiplex_xe2/bootblock.c: https://review.coreboot.org/c/coreboot/+/57085/comment/3957e251_b849aa7b PS2, Line 16: Trailing whitespace https://review.coreboot.org/c/coreboot/+/57085/comment/7b417a7d_256f19ce PS2, Line 17: // Wait for acknowledgement message from EC Please use tabs for alignment https://review.coreboot.org/c/coreboot/+/57085/comment/d1c71086_482bae11 PS2, Line 44: : Same two things as above https://review.coreboot.org/c/coreboot/+/57085/comment/f5f3cce4_4c13edf8 PS2, Line 59: : Same two things as above https://review.coreboot.org/c/coreboot/+/57085/comment/cff7ff6d_7c87df28 PS2, Line 62: : Same two things as above https://review.coreboot.org/c/coreboot/+/57085/comment/f808fba8_204db6c8 PS2, Line 107: : Same two things as above https://review.coreboot.org/c/coreboot/+/57085/comment/8224fb07_3b560817 PS2, Line 110: : Same two things as above https://review.coreboot.org/c/coreboot/+/57085/comment/2a5109d7_6daeeea5 PS2, Line 113: } Please ensure files end with a newline File src/mainboard/dell/optiplex_xe2/devicetree.cb: https://review.coreboot.org/c/coreboot/+/57085/comment/279802d7_701412bf PS2, Line 8: #register "c1_acpower" = "1" : #register "c1_battery" = "1" : #register "c2_acpower" = "3" : #register "c2_battery" = "3" : #register "c3_acpower" = "5" : #register "c3_battery" = "5" You can remove this https://review.coreboot.org/c/coreboot/+/57085/comment/e5d33bd2_42b65312 PS2, Line 14: 0x0 nit: 0 https://review.coreboot.org/c/coreboot/+/57085/comment/b76a5b4f_515c4c7f PS2, Line 24: # register "sata_ahci" = "1" You can remove this too https://review.coreboot.org/c/coreboot/+/57085/comment/454f204d_07566af3 PS2, Line 25: register "sata_port_map" = "0x63" Uhhh, really? This value enables an inexistent SATA port. If unsure, `0x3f` enables all SATA ports. https://review.coreboot.org/c/coreboot/+/57085/comment/f2bceb95_6fb6d7e9 PS2, Line 27: subsystemid 0x1028 0x05c1 You can inherit the subsystemid (see other mainboards, look for the `inherit` keyword) https://review.coreboot.org/c/coreboot/+/57085/comment/1cbdd19a_7508ea67 PS2, Line 53: device pci 1c.2 off # PCIe Port #3 : end I'd appreciate if you could place the `end` keywords in the previous line (see mb/asrock/b85m_pro4 for an example of what I mean) https://review.coreboot.org/c/coreboot/+/57085/comment/7d216469_da3718c0 PS2, Line 68: LPC bridge PCI-LPC bridge Just `LPC bridge` is enough https://review.coreboot.org/c/coreboot/+/57085/comment/75a6a7f1_3291d975 PS2, Line 94: chip drivers/pc80/tpm : device pnp 0c31.0 on end : end tabs, please https://review.coreboot.org/c/coreboot/+/57085/comment/a4cf3bb6_2443dd7e PS2, Line 98: Unsupported PCI device 8086:2822 I'd drop this part https://review.coreboot.org/c/coreboot/+/57085/comment/8a4a169e_174c63c4 PS2, Line 109: Host bridge Host bridge One instance of `Host bridge` in the comment is enough https://review.coreboot.org/c/coreboot/+/57085/comment/dbd9f9d7_40d98f40 PS2, Line 109: device pci 00.0 on end # Host bridge Host bridge : device pci 01.0 on end # PCIe Bridge for discrete graphics : device pci 02.0 on end # Internal graphics VGA controller : device pci 03.0 on end # Mini-HD audio Please move these devices right above `chip southbridge/intel/lynxpoint` File src/mainboard/dell/optiplex_xe2/gma-mainboard.ads: https://review.coreboot.org/c/coreboot/+/57085/comment/b8a132f3_24709d8b PS2, Line 20: LVDS, : eDP Most likely not. You can replace this with `others => Disabled` File src/mainboard/dell/optiplex_xe2/hda_verb.c: https://review.coreboot.org/c/coreboot/+/57085/comment/16247c30_e7857395 PS2, Line 22: nit: drop empty line File src/mainboard/dell/optiplex_xe2/romstage.c: https://review.coreboot.org/c/coreboot/+/57085/comment/781ae5a4_5eddb011 PS2, Line 9: trailing whitespace https://review.coreboot.org/c/coreboot/+/57085/comment/bf341f4e_15704e3d PS2, Line 19: //RCBA_RMW_REG_32(FD, ~0, PCH_DISABLE_ALWAYS), Remove this please https://review.coreboot.org/c/coreboot/+/57085/comment/1365ff45_e7f94fea PS2, Line 58: // void mainboard_romstage_entry(unsigned long bist) : // { : // struct pei_data pei_data = { : // .pei_version = PEI_VERSION, : // .mchbar = (uintptr_t)DEFAULT_MCHBAR, : // .dmibar = (uintptr_t)DEFAULT_DMIBAR, : // .epbar = DEFAULT_EPBAR, : // .pciexbar = DEFAULT_PCIEXBAR, : // .smbusbar = SMBUS_IO_BASE, : // .wdbbar = 0x4000000, : // .wdbsize = 0x1000, : // .hpet_address = HPET_ADDR, : // .rcba = (uintptr_t)DEFAULT_RCBA, : // .pmbase = DEFAULT_PMBASE, : // .gpiobase = DEFAULT_GPIOBASE, : // .temp_mmio_base = 0xfed08000, : // .system_type = 1, /* desktop/server, FIXME: check this */ : // .tseg_size = CONFIG_SMM_TSEG_SIZE, : // .spd_addresses = { 0xa0, 0xa2, 0xa4, 0xa6 }, /* FIXME: check this */ : // .ec_present = 0, : // .dimm_channel0_disabled = 0, /* FIXME: leave channel 0 enabled */ : // .dimm_channel1_disabled = 0, /* FIXME: leave channel 1 enabled */ : // .max_ddr3_freq = 1600, : // .usb2_ports = { : // /* Length, Enable, OCn#, Location */ : // { 0x0040, 1, USB_OC_PIN_SKIP, USB_PORT_BACK_PANEL }, : // { 0x0040, 1, USB_OC_PIN_SKIP, USB_PORT_BACK_PANEL }, : // { 0x0040, 1, 1, USB_PORT_BACK_PANEL }, : // { 0x0040, 1, 2, USB_PORT_BACK_PANEL }, : // { 0x0040, 1, 3, USB_PORT_BACK_PANEL }, : // { 0x0040, 1, 3, USB_PORT_BACK_PANEL }, : // { 0x0040, 1, 0, USB_PORT_BACK_PANEL }, : // { 0x0040, 1, 0, USB_PORT_BACK_PANEL }, : // { 0x0040, 1, 4, USB_PORT_BACK_PANEL }, : // { 0x0040, 1, 4, USB_PORT_BACK_PANEL }, : // { 0x0040, 1, 5, USB_PORT_BACK_PANEL }, : // { 0x0040, 1, 5, USB_PORT_BACK_PANEL }, : // { 0x0040, 1, 6, USB_PORT_BACK_PANEL }, : // { 0x0040, 1, 7, USB_PORT_BACK_PANEL }, : // }, : // .usb3_ports = { : // { 1, 6 }, : // { 1, 7 }, : // { 1, USB_OC_PIN_SKIP }, : // { 1, USB_OC_PIN_SKIP }, : // { 1, 1 }, : // { 1, 2 }, : // }, : // }; : : // struct romstage_params romstage_params = { : // .pei_data = &pei_data, : // .gpio_map = &mainboard_gpio_map, : // .rcba_config = rcba_config, : // .bist = bist, : // }; : : // romstage_common(&romstage_params); : // } This will never be needed again -- To view, visit https://review.coreboot.org/c/coreboot/+/57085 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iab9f8a4611bb76201463839d0251833d7880106b Gerrit-Change-Number: 57085 Gerrit-PatchSet: 2 Gerrit-Owner: amersel Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: amersel Gerrit-Comment-Date: Sun, 05 Sep 2021 14:54:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: cpu/intel: Make doubly sure we don't write to IA32_FEATURE_CTRL if it...
by Angel Pons (Code Review) 05 Sep '21

05 Sep '21

Attention is currently required from: Paul Menzel, Darius Goad, Patrick Rudolph. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57089 ) Change subject: cpu/intel: Make doubly sure we don't write to IA32_FEATURE_CTRL if its lock bit is set on a reset. ...................................................................... Patch Set 1: (1 comment) File src/cpu/intel/model_1067x/mp_init.c: https://review.coreboot.org/c/coreboot/+/57089/comment/83811b3a_2c11aa91 PS1, Line 63: return; > Why is this removed? Was added in CB:57088 for some reason. -- To view, visit https://review.coreboot.org/c/coreboot/+/57089 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib6ff08b6997e5662d32ff003a436c62ccc1c40ac Gerrit-Change-Number: 57089 Gerrit-PatchSet: 1 Gerrit-Owner: Darius Goad Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Darius Goad Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Sun, 05 Sep 2021 14:39:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: cpu/intel: Make doubly sure we don't write to IA32_FEATURE_CTRL if it...
by Angel Pons (Code Review) 05 Sep '21

05 Sep '21

Attention is currently required from: Darius Goad, Patrick Rudolph. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57089 ) Change subject: cpu/intel: Make doubly sure we don't write to IA32_FEATURE_CTRL if its lock bit is set on a reset. ...................................................................... Patch Set 1: Code-Review-1 (1 comment) Patchset: PS1: Um, the `set_feature_ctrl_vmx()` function already makes sure that the IA32_FEATURE_CTRL doesn't get written to if locked. What does this change accomplish? -- To view, visit https://review.coreboot.org/c/coreboot/+/57089 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib6ff08b6997e5662d32ff003a436c62ccc1c40ac Gerrit-Change-Number: 57089 Gerrit-PatchSet: 1 Gerrit-Owner: Darius Goad Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Darius Goad Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Sun, 05 Sep 2021 14:38:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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2014

2013

coreboot-gerrit September 2021