coreboot-gerrit September 2021

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Change in coreboot[master]: soc/intel/elkhartlake: Lock PAM registers in finalize
by Felix Held (Code Review) 05 Sep '21

05 Sep '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/57185 ) Change subject: soc/intel/elkhartlake: Lock PAM registers in finalize ...................................................................... soc/intel/elkhartlake: Lock PAM registers in finalize Use the support from the previous patch to have coreboot lock the PAM registers instead of the FSP when the lockdown configuration is set to coreboot. Change-Id: Ib6fce70d6b0386906850884880dadbf45597452d Signed-off-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57185 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Furquan Shaikh <furquan(a)google.com> --- M src/soc/intel/elkhartlake/finalize.c M src/soc/intel/elkhartlake/fsp_params.c 2 files changed, 11 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved diff --git a/src/soc/intel/elkhartlake/finalize.c b/src/soc/intel/elkhartlake/finalize.c index 5c36721..3d1430f 100644 --- a/src/soc/intel/elkhartlake/finalize.c +++ b/src/soc/intel/elkhartlake/finalize.c @@ -9,8 +9,10 @@ #include <intelblocks/lpc_lib.h> #include <intelblocks/pcr.h> #include <intelblocks/pmclib.h> +#include <intelblocks/systemagent.h> #include <intelblocks/tco.h> #include <intelblocks/thermal.h> +#include <intelpch/lockdown.h> #include <soc/p2sb.h> #include <soc/pci_devs.h> #include <soc/pcr_ids.h> @@ -47,12 +49,19 @@ pmc_clear_pmcon_sts(); } +static void sa_finalize(void) +{ + if (get_lockdown_config() == CHIPSET_LOCKDOWN_COREBOOT) + sa_lock_pam(); +} + static void soc_finalize(void *unused) { printk(BIOS_DEBUG, "Finalizing chipset.\n"); pch_finalize(); apm_control(APM_CNT_FINALIZE); + sa_finalize(); /* Indicate finalize step with post code */ post_code(POST_OS_BOOT); diff --git a/src/soc/intel/elkhartlake/fsp_params.c b/src/soc/intel/elkhartlake/fsp_params.c index ae9584c..2bf4a51 100644 --- a/src/soc/intel/elkhartlake/fsp_params.c +++ b/src/soc/intel/elkhartlake/fsp_params.c @@ -148,6 +148,7 @@ params->PchWriteProtectionEnable[0] = 0; params->PchUnlockGpioPads = 1; params->RtcMemoryLock = 0; + params->SkipPamLock = 1; } else { params->PchLockDownGlobalSmi = 1; params->PchLockDownBiosLock = 1; @@ -155,6 +156,7 @@ params->PchWriteProtectionEnable[0] = 1; params->PchUnlockGpioPads = 0; params->RtcMemoryLock = 1; + params->SkipPamLock = 0; } /* Disable PAVP */ -- To view, visit https://review.coreboot.org/c/coreboot/+/57185 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib6fce70d6b0386906850884880dadbf45597452d Gerrit-Change-Number: 57185 Gerrit-PatchSet: 2 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/intel/cannonlake: Lock PAM registers in finalize
by Felix Held (Code Review) 05 Sep '21

05 Sep '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/57184 ) Change subject: soc/intel/cannonlake: Lock PAM registers in finalize ...................................................................... soc/intel/cannonlake: Lock PAM registers in finalize Use the support from the previous patch to have coreboot lock the PAM registers instead of the FSP when the lockdown configuration is set to coreboot. Change-Id: I6ae22f9df4834508dfa304050fad44d45df45334 Signed-off-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57184 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Furquan Shaikh <furquan(a)google.com> --- M src/soc/intel/cannonlake/finalize.c M src/soc/intel/cannonlake/fsp_params.c 2 files changed, 10 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved diff --git a/src/soc/intel/cannonlake/finalize.c b/src/soc/intel/cannonlake/finalize.c index 8888315..63749f9 100644 --- a/src/soc/intel/cannonlake/finalize.c +++ b/src/soc/intel/cannonlake/finalize.c @@ -10,8 +10,10 @@ #include <intelblocks/lpc_lib.h> #include <intelblocks/pcr.h> #include <intelblocks/pmclib.h> +#include <intelblocks/systemagent.h> #include <intelblocks/tco.h> #include <intelblocks/thermal.h> +#include <intelpch/lockdown.h> #include <soc/p2sb.h> #include <soc/pci_devs.h> #include <soc/pcr_ids.h> @@ -80,12 +82,19 @@ } +static void sa_finalize(void) +{ + if (get_lockdown_config() == CHIPSET_LOCKDOWN_COREBOOT) + sa_lock_pam(); +} + static void soc_finalize(void *unused) { printk(BIOS_DEBUG, "Finalizing chipset.\n"); pch_finalize(); apm_control(APM_CNT_FINALIZE); + sa_finalize(); /* Indicate finalize step with post code */ post_code(POST_OS_BOOT); diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c index dd5f197..1ae27ae 100644 --- a/src/soc/intel/cannonlake/fsp_params.c +++ b/src/soc/intel/cannonlake/fsp_params.c @@ -653,6 +653,7 @@ tconfig->PchLockDownBiosInterface = lockdown_by_fsp; params->PchLockDownBiosLock = lockdown_by_fsp; params->PchLockDownRtcMemoryLock = lockdown_by_fsp; + tconfig->SkipPamLock = !lockdown_by_fsp; #if CONFIG(SOC_INTEL_COMETLAKE) /* * Making this config "0" means FSP won't set the FLOCKDN bit -- To view, visit https://review.coreboot.org/c/coreboot/+/57184 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6ae22f9df4834508dfa304050fad44d45df45334 Gerrit-Change-Number: 57184 Gerrit-PatchSet: 2 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/intel/jasperlake: Lock PAM registers in finalize
by Felix Held (Code Review) 05 Sep '21

05 Sep '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/57183 ) Change subject: soc/intel/jasperlake: Lock PAM registers in finalize ...................................................................... soc/intel/jasperlake: Lock PAM registers in finalize Use the support from the previous patch to have coreboot lock the PAM registers instead of the FSP when the lockdown configuration is set to coreboot. Change-Id: I10f859f30b260d012f0bc8755f32413d8b2cf267 Signed-off-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57183 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Furquan Shaikh <furquan(a)google.com> --- M src/soc/intel/jasperlake/finalize.c M src/soc/intel/jasperlake/fsp_params.c 2 files changed, 10 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved diff --git a/src/soc/intel/jasperlake/finalize.c b/src/soc/intel/jasperlake/finalize.c index 07bfee3..a60e719 100644 --- a/src/soc/intel/jasperlake/finalize.c +++ b/src/soc/intel/jasperlake/finalize.c @@ -9,8 +9,10 @@ #include <intelblocks/lpc_lib.h> #include <intelblocks/pcr.h> #include <intelblocks/pmclib.h> +#include <intelblocks/systemagent.h> #include <intelblocks/tco.h> #include <intelblocks/thermal.h> +#include <intelpch/lockdown.h> #include <soc/p2sb.h> #include <soc/pci_devs.h> #include <soc/pcr_ids.h> @@ -80,12 +82,19 @@ pmc_clear_pmcon_sts(); } +static void sa_finalize(void) +{ + if (get_lockdown_config() == CHIPSET_LOCKDOWN_COREBOOT) + sa_lock_pam(); +} + static void soc_finalize(void *unused) { printk(BIOS_DEBUG, "Finalizing chipset.\n"); pch_finalize(); apm_control(APM_CNT_FINALIZE); + sa_finalize(); /* Indicate finalize step with post code */ post_code(POST_OS_BOOT); diff --git a/src/soc/intel/jasperlake/fsp_params.c b/src/soc/intel/jasperlake/fsp_params.c index bb41b28..11b146b 100644 --- a/src/soc/intel/jasperlake/fsp_params.c +++ b/src/soc/intel/jasperlake/fsp_params.c @@ -75,6 +75,7 @@ params->PchLockDownBiosInterface = lockdown_by_fsp; params->PchUnlockGpioPads = !lockdown_by_fsp; params->RtcMemoryLock = lockdown_by_fsp; + params->SkipPamLock = !lockdown_by_fsp; /* coreboot will send EOP before loading payload */ params->EndOfPostMessage = EOP_DISABLE; -- To view, visit https://review.coreboot.org/c/coreboot/+/57183 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I10f859f30b260d012f0bc8755f32413d8b2cf267 Gerrit-Change-Number: 57183 Gerrit-PatchSet: 2 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/asrock/e350m1: Enable USB on mPCIe
by Swift Geek (Sebastian Grzywna) (Code Review) 05 Sep '21

05 Sep '21

Attention is currently required from: Angel Pons. Swift Geek (Sebastian Grzywna) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57307 ) Change subject: mb/asrock/e350m1: Enable USB on mPCIe ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > Do you have a lspci log? I'd like to see what exactly these devices are. 00:16.0 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 USB OHCI0 Controller [1002:4397] 00:16.2 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 USB EHCI Controller [1002:4396] -- To view, visit https://review.coreboot.org/c/coreboot/+/57307 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6ee7e3679c9cd87b81f955c68ec89db1dda30aec Gerrit-Change-Number: 57307 Gerrit-PatchSet: 1 Gerrit-Owner: Swift Geek (Sebastian Grzywna) <swiftgeek(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sun, 05 Sep 2021 18:29:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: smbios.c: Rename two local functions
by Felix Held (Code Review) 05 Sep '21

05 Sep '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/57361 ) Change subject: smbios.c: Rename two local functions ...................................................................... smbios.c: Rename two local functions Rename two functions that have `walk` in their name but do not perform any walk. The new names are derived from the comments just above these functions' definitions. Also, remove these now-redundant comments. Change-Id: I380a5b60b3f4e820e8f6d6f960826de97c0446be Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57361 Reviewed-by: Nico Huber <nico.h(a)gmx.de> Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/arch/x86/smbios.c 1 file changed, 6 insertions(+), 8 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Felix Held: Looks good to me, approved diff --git a/src/arch/x86/smbios.c b/src/arch/x86/smbios.c index f09b2d6..eebfd72 100644 --- a/src/arch/x86/smbios.c +++ b/src/arch/x86/smbios.c @@ -1132,9 +1132,8 @@ } } -/* Generate Type41 entries from devicetree */ -static int smbios_walk_device_tree_type41(struct device *dev, int *handle, - unsigned long *current) +static int smbios_generate_type41_from_devtree(struct device *dev, int *handle, + unsigned long *current) { static u8 type41_inst_cnt[SMBIOS_DEVICE_TYPE_COUNT + 1] = {}; @@ -1164,9 +1163,8 @@ device_type); } -/* Generate Type9 entries from devicetree */ -static int smbios_walk_device_tree_type9(struct device *dev, int *handle, - unsigned long *current) +static int smbios_generate_type9_from_devtree(struct device *dev, int *handle, + unsigned long *current) { enum misc_slot_usage usage; enum slot_data_bus_bandwidth bandwidth; @@ -1225,8 +1223,8 @@ printk(BIOS_INFO, "%s (%s)\n", dev_path(dev), dev_name(dev)); len += dev->ops->get_smbios_data(dev, handle, current); } - len += smbios_walk_device_tree_type9(dev, handle, current); - len += smbios_walk_device_tree_type41(dev, handle, current); + len += smbios_generate_type9_from_devtree(dev, handle, current); + len += smbios_generate_type41_from_devtree(dev, handle, current); } return len; } -- To view, visit https://review.coreboot.org/c/coreboot/+/57361 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I380a5b60b3f4e820e8f6d6f960826de97c0446be Gerrit-Change-Number: 57361 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: smbios.c: Rename two local functions
by Felix Held (Code Review) 05 Sep '21

05 Sep '21

Attention is currently required from: Angel Pons. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57361 ) Change subject: smbios.c: Rename two local functions ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/57361 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I380a5b60b3f4e820e8f6d6f960826de97c0446be Gerrit-Change-Number: 57361 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sun, 05 Sep 2021 18:17:56 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: device/device.h: Drop unused function declaration
by Felix Held (Code Review) 05 Sep '21

05 Sep '21

Attention is currently required from: Paul Menzel, Angel Pons, Patrick Rudolph. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57398 ) Change subject: device/device.h: Drop unused function declaration ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/57398 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I902bda3244c6496a04f364fad3ecbbdd118dd543 Gerrit-Change-Number: 57398 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Sun, 05 Sep 2021 18:14:47 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/fsp2_0/Kconfig: select HAVE_DISPLAY_MTRRS
by Felix Held (Code Review) 05 Sep '21

05 Sep '21

Attention is currently required from: Raul Rangel, Martin Roth, Furquan Shaikh, Marshall Dawson, Angel Pons, Andrey Petrov, Patrick Rudolph. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51575 ) Change subject: drivers/intel/fsp2_0/Kconfig: select HAVE_DISPLAY_MTRRS ...................................................................... Patch Set 2: (2 comments) Patchset: PS2: > Felix, is this something to update and merge or abandon? this patch improves things for socs using the fsp 2.x. didn't have the time to investigate if this can be enabled for all x86, but for that case i'd need to check if all x86 socs/cpus have code to actually print the mtrrs, since announcing to have functionality to display the mtrrs, but not actually having that, would be bad too. i'd say that this can be merged as-is right now, since it fixes this for the fsp 2.x platforms File src/drivers/intel/fsp2_0/Kconfig: https://review.coreboot.org/c/coreboot/+/51575/comment/32c87606_c7fd55c9 PS2, Line 6: select HAVE_DISPLAY_MTRRS > Wouldn't a `depends on` clause be more appropriate? It's the AMD SoCs that should be selecting `HAVE […] no, a depends on isn't the right thing to do here, since the fsp driver itself provides some functionality to print the mtrrs, so we can unhide the option to print the mtrrs with selecting this option in the fsp driver's Kconfig. if some component provides certain functionality that has a kconfig option to show that the is implemented, that component needs to select that option -- To view, visit https://review.coreboot.org/c/coreboot/+/51575 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2894689ce58e7404d9d5a894f3c288bc4016ea19 Gerrit-Change-Number: 51575 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Sun, 05 Sep 2021 18:13:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Martin Roth <martinroth(a)google.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/broadwell: Drop unused PCH PCI device macros
by Felix Held (Code Review) 05 Sep '21

05 Sep '21

Attention is currently required from: Matt DeVillier, Angel Pons, Arthur Heymans, Patrick Rudolph. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55529 ) Change subject: soc/intel/broadwell: Drop unused PCH PCI device macros ...................................................................... Patch Set 11: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/55529 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I366e064f3fe708b55fb381aee25b2795b1c61142 Gerrit-Change-Number: 55529 Gerrit-PatchSet: 11 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Sun, 05 Sep 2021 18:03:32 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/fsp2_0: add warning when ADD_FSP_BINARIES isn't selected
by Felix Held (Code Review) 05 Sep '21

05 Sep '21

Attention is currently required from: Nico Huber, Andrey Petrov, Patrick Rudolph. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57368 ) Change subject: drivers/intel/fsp2_0: add warning when ADD_FSP_BINARIES isn't selected ...................................................................... Patch Set 2: (1 comment) File src/drivers/intel/fsp2_0/Makefile.inc: https://review.coreboot.org/c/coreboot/+/57368/comment/04fa2370_b816e641 PS1, Line 121: likely won't boot\n" : printf "successfully > I guess we know for sure that it won't boot without the blobs, so how about: […] good point; changed this in patchset 2 -- To view, visit https://review.coreboot.org/c/coreboot/+/57368 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6efc184ecc4059818474937fd31574f703c9bdc6 Gerrit-Change-Number: 57368 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Sun, 05 Sep 2021 17:59:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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coreboot-gerrit September 2021