Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/55161 )
Change subject: util/cbfstool/linux_trampoline.h: Fix typo in comment
......................................................................
util/cbfstool/linux_trampoline.h: Fix typo in comment
inlucde ---> include
Change-Id: I38987119ddabb08c457c9a7c8aecb8025fe2d9d3
Signed-off-by: Angel Pons <th3fanbus(a)gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55161
Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Reviewed-by: Michael Niewöhner <foss(a)mniewoehner.de>
Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M util/cbfstool/linux_trampoline.h
1 file changed, 1 insertion(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Kyösti Mälkki: Looks good to me, approved
Arthur Heymans: Looks good to me, approved
Michael Niewöhner: Looks good to me, approved
diff --git a/util/cbfstool/linux_trampoline.h b/util/cbfstool/linux_trampoline.h
index 9851b52..839d7ca 100644
--- a/util/cbfstool/linux_trampoline.h
+++ b/util/cbfstool/linux_trampoline.h
@@ -3,7 +3,7 @@
/*
* This file contains #define constants used by both the Linux
* trampoline C-code and assembly language code. As such it can only
- * contain preprocessor macros. Do not inlucde C language
+ * contain preprocessor macros. Do not include C language
* declarations in this file.
*/
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54901 )
Change subject: amdfwtool: Add a function to extract firmwares
......................................................................
Patch Set 15:
(1 comment)
File util/amdfwtool/extract.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120760):
https://review.coreboot.org/c/coreboot/+/54901/comment/bbe2ceb0_86f5da38
PS15, Line 91: close (mod_fd);
space prohibited between function name and open parenthesis '('
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Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54385 )
Change subject: Documentation: Add proposal to allow enabling serial console with a flag
......................................................................
Patch Set 4:
(1 comment)
File Documentation/technotes/2021-05-selectable-serial-console.md:
https://review.coreboot.org/c/coreboot/+/54385/comment/4d3ac7f0_5339793d
PS1, Line 112: and change the default to whatever is found there.
> > SGTM in general, but you removed the part about forgoing the bootblock now? That part is still imp […]
Thanks for the feedback, I incorporated it.
As for the "avoid recursion" bit, I'm not sure this must be part of the document but I'll certainly ensure that the implementation takes care of that and has comments about it.
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Hello build bot (Jenkins), Paul Menzel, Stefan Reinauer, Julius Werner, Arthur Heymans,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#4).
Change subject: Documentation: Add proposal to allow enabling serial console with a flag
......................................................................
Documentation: Add proposal to allow enabling serial console with a flag
BUG=b:172341184, b:151780766
Change-Id: If1b0efc55880095f9d5d6d6e448f2c8677d57ff5
Signed-off-by: Patrick Georgi <pgeorgi(a)google.com>
---
A Documentation/technotes/2021-05-selectable-serial-console.md
M Documentation/technotes/index.md
2 files changed, 136 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/54385/4
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Hello build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, Angel Pons,
I'd like you to reexamine a change. Please visit
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Change subject: mb/intel/sm: Use device aliases
......................................................................
mb/intel/sm: Use device aliases
Use the device aliases provided by alderlake chipset.cb instead of
the raw pci device+function. Take advantage of the default states
in chipset.cb and only list the devices that are enabled for all
shadowmountain board variants.
TEST=Dump devicetree device enable list without and with this CL, no
difference observed.
Change-Id: I2b769d653ad8ad8ff069a0787d00ff33ead5c912
Signed-off-by: Subrata Banik <subrata.banik(a)intel.com>
---
M src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb
1 file changed, 41 insertions(+), 73 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/55206/4
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55206 )
Change subject: mb/intel/sm: Use device aliases
......................................................................
Patch Set 3: Code-Review+1
(2 comments)
Patchset:
PS3:
Other than one thing, looks good. I'd like to have others take a look as well.
File src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/55206/comment/a34e7d7f_416900f2
PS3, Line 180: ipu
pcie4_0
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Change subject: mb/intel/adlrvp: Use device aliases
......................................................................
Patch Set 4: Code-Review+1
(1 comment)
Patchset:
PS4:
Looks good, but I'll let others take a look as well. I may have missed something.
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