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Hello build bot (Jenkins), Furquan Shaikh, Maulik V Vaghela, Rizwan Qureshi, Tim Wawrzynczak, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/55254
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Change subject: soc/intel/alderlake: Update PMC Descriptor for Alderlake B0 silicon
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soc/intel/alderlake: Update PMC Descriptor for Alderlake B0 silicon
The patch updates PMC Descriptpr which is part of Descriptor Region if
system equipped with Alderlake B silicon.
TEST=Verified PMC Descriptor getting modified for Alderlake B silicon if
not updated.
Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com>
Change-Id: I6d9a2ce0f0b3e386eefa1962ce706b58f31a8576
---
M src/soc/intel/alderlake/romstage/romstage.c
1 file changed, 72 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/55254/3
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55185 )
Change subject: drivers/generic/ioapic: Use arch/x86/ioapic
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Patch Set 4: Code-Review+1
(1 comment)
File src/drivers/generic/ioapic/ioapic.c:
https://review.coreboot.org/c/coreboot/+/55185/comment/899c61cb_5f8024db
PS3, Line 17: config->enable_virtual_wire);
> I doubt if irq_on_fsb is worth keeping in devicetree. Usage is bound to CPU model AFAICS. […]
The only boards that set `irq_on_fsb` are gm45 boards and samsung/lumpy. I don't get the point of CB:1462 (commit message body does not exist)
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Change subject: sb/intel/lynxpoint: Add SerialIO UART console support
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Patch Set 11:
(1 comment)
File src/southbridge/intel/lynxpoint/uart_init.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120886):
https://review.coreboot.org/c/coreboot/+/52489/comment/09ff7ef8_a3c41f5a
PS11, Line 16: switch (CONFIG_UART_FOR_CONSOLE) {
switch and case should be at the same indent
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