Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52907 )
Change subject: [WIP] soc/amd/cezanne/early_fch: add missing fch_spi_early_init call
......................................................................
[WIP] soc/amd/cezanne/early_fch: add missing fch_spi_early_init call
Before this can be merged, the mainboard's devicetrees need to be
updated to set common_config.spi_config to working value, since the
frequencies default to 66MHz in non-EM100 mode which might be too much.
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
Change-Id: I224b99b1aace3e4220bccec836efee0130ebbfdb
---
M src/soc/amd/cezanne/early_fch.c
1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/52907/1
diff --git a/src/soc/amd/cezanne/early_fch.c b/src/soc/amd/cezanne/early_fch.c
index fdfa17a..2da338f 100644
--- a/src/soc/amd/cezanne/early_fch.c
+++ b/src/soc/amd/cezanne/early_fch.c
@@ -36,6 +36,7 @@
void fch_pre_init(void)
{
lpc_early_init();
+ fch_spi_early_init();
enable_acpimmio_decode_pm04();
fch_smbus_init();
--
To view, visit https://review.coreboot.org/c/coreboot/+/52907
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I224b99b1aace3e4220bccec836efee0130ebbfdb
Gerrit-Change-Number: 52907
Gerrit-PatchSet: 1
Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-MessageType: newchange
Karthik Ramasubramanian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52906 )
Change subject: mb/google/guybrush: Configure Pen Detect device
......................................................................
mb/google/guybrush: Configure Pen Detect device
Pen Detect GPIO is exported through GPIO keys driver to the kernel so
that stylus tools is popped on pen eject event. Hence enable the GPIO
keys driver and configure the devicetree.
BUG=b:186011392
TEST=Build and boot to OS in guybrush. Ensure that PRP0001 device is
added to the ACPI SSDT table. Ensure that the Pen Eject events are
detected.
Event: time 1620159356.243180, type 5 (EV_SW), code 15 (SW_PEN_INSERTED), value 1
Event: time 1620159356.243180, -------------- SYN_REPORT ------------
Event: time 1620159356.735316, type 5 (EV_SW), code 15 (SW_PEN_INSERTED), value 0
Ensure that when the device is suspended, it wake on Pen Eject event and
does not wake on Pen Insert event.
Change-Id: I4d2aa29c0f1839c563b40734527a687a5618ba5c
Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com>
---
M src/mainboard/google/guybrush/Kconfig
M src/mainboard/google/guybrush/variants/guybrush/overridetree.cb
2 files changed, 16 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/52906/1
diff --git a/src/mainboard/google/guybrush/Kconfig b/src/mainboard/google/guybrush/Kconfig
index 51ac55d..8c23cf0 100644
--- a/src/mainboard/google/guybrush/Kconfig
+++ b/src/mainboard/google/guybrush/Kconfig
@@ -12,6 +12,7 @@
select DISABLE_KEYBOARD_RESET_PIN
select DISABLE_SPI_FLASH_ROM_SHARING
select DRIVERS_AMD_I2S_MACHINE_DEV
+ select DRIVERS_GENERIC_GPIO_KEYS
select DRIVERS_I2C_GENERIC
select DRIVERS_I2C_HID
select DRIVERS_UART_ACPI
diff --git a/src/mainboard/google/guybrush/variants/guybrush/overridetree.cb b/src/mainboard/google/guybrush/variants/guybrush/overridetree.cb
index 53e821e..416d058 100644
--- a/src/mainboard/google/guybrush/variants/guybrush/overridetree.cb
+++ b/src/mainboard/google/guybrush/variants/guybrush/overridetree.cb
@@ -84,6 +84,21 @@
end
end # I2C0
+ device ref i2c_1 on
+ chip drivers/generic/gpio_keys
+ register "name" = ""PENH""
+ register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPIO_4)"
+ register "key.dev_name" = ""EJCT""
+ register "key.wakeup_event_action" = "EV_ACT_DEASSERTED"
+ register "key.linux_code" = "SW_PEN_INSERTED"
+ register "key.linux_input_type" = "EV_SW"
+ register "key.label" = ""pen_eject""
+ register "key.debounce_interval" = "100"
+ register "key.wakeup_route" = "WAKEUP_ROUTE_GPIO_IRQ"
+ device generic 0 on end
+ end
+ end # I2C1
+
device ref i2c_2 on
chip drivers/i2c/generic
register "hid" = ""10EC5682""
--
To view, visit https://review.coreboot.org/c/coreboot/+/52906
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I4d2aa29c0f1839c563b40734527a687a5618ba5c
Gerrit-Change-Number: 52906
Gerrit-PatchSet: 1
Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com>
Gerrit-MessageType: newchange
Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson.
Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/52905
to look at the new patch set (#2).
Change subject: [UNTESTED] soc/amd/cezanne: add GNB IOAPIC support
......................................................................
[UNTESTED] soc/amd/cezanne: add GNB IOAPIC support
To configure and enable the IOAPIC in the graphics and northbridge (GNB)
container, FSP needs to write an undocumented register, so pass the GNB
IOAPIC MMIO base address to make it show up at that address.
BUG=b:187083211
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
Change-Id: I1e127ce500d052783f0a6e13fb2ad16a8e408b0e
---
M src/soc/amd/cezanne/acpi.c
M src/soc/amd/cezanne/fsp_m_params.c
M src/soc/amd/cezanne/include/soc/iomap.h
M src/soc/amd/cezanne/root_complex.c
4 files changed, 29 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/52905/2
--
To view, visit https://review.coreboot.org/c/coreboot/+/52905
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I1e127ce500d052783f0a6e13fb2ad16a8e408b0e
Gerrit-Change-Number: 52905
Gerrit-PatchSet: 2
Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com>
Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com>
Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com>
Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org>
Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com>
Gerrit-MessageType: newpatchset
Attention is currently required from: Jason Glenesk, Paul Menzel, Felix Held.
Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52857 )
Change subject: mb/amd/majolica:Set S0i3 enabled by default
......................................................................
Patch Set 2:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/52857/comment/99980e85_642f7681
PS2, Line 9: Set enable S0i3 for Majolica.
> Why was it disabled in the first place, and what changed?
We're still adding features to the board and soc, and rounding out the level of support. Once we got s0i3 to work...
https://review.coreboot.org/c/coreboot/+/52857/comment/c2811a5d_34638a02
PS2, Line 11: BUG=178728116
BUG=b:178728116
File src/mainboard/amd/majolica/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/52857/comment/0455df36_311ffe4b
PS2, Line 17: 1
"true"?
--
To view, visit https://review.coreboot.org/c/coreboot/+/52857
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I808e78f41509cb03821513b5b63cc8856c891d8c
Gerrit-Change-Number: 52857
Gerrit-PatchSet: 2
Gerrit-Owner: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com>
Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com>
Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com>
Gerrit-Reviewer: Matt Papageorge <matthewpapa07(a)gmail.com>
Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com>
Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com>
Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Comment-Date: Tue, 04 May 2021 20:12:30 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-MessageType: comment
Attention is currently required from: Shaunak Saha, Furquan Shaikh, Maulik V Vaghela, Selma Bensaid, Usha P, Bernardo Perez Priego, Anil Kumar K.
Anil Kumar K has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52614 )
Change subject: mb/intel/adlrvp: Enable support for Chrome OS mode switches
......................................................................
Patch Set 4:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/52614/comment/2c175b0f_0507955b
PS3, Line 9: Signed-off-by: Anil Kumar <anil.kumar.k(a)intel.com>
> This is added in the last part of the commit message along with the "Change-Id" field.
Done
--
To view, visit https://review.coreboot.org/c/coreboot/+/52614
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I771f0ef14b1c273f9d1af22c96de0eabd08e9a8c
Gerrit-Change-Number: 52614
Gerrit-PatchSet: 4
Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com>
Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com>
Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.corp-partner.google.com>
Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com>
Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com>
Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com>
Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com>
Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com>
Gerrit-Reviewer: Usha P <usha.p(a)intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Shaunak Saha <shaunak.saha(a)intel.com>
Gerrit-Attention: Furquan Shaikh <furquan(a)google.com>
Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com>
Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com>
Gerrit-Attention: Usha P <usha.p(a)intel.com>
Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com>
Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.corp-partner.google.com>
Gerrit-Comment-Date: Tue, 04 May 2021 20:03:38 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com>
Gerrit-MessageType: comment
Attention is currently required from: Marc Jones, Patrick Rudolph, Jonathan Zhang, Johnny Lin, Rocky Phagura, Jingle Hsu, Angel Pons, Arthur Heymans, Morgan Jang, Kyösti Mälkki.
Rocky Phagura has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49460 )
Change subject: cpu/x86/smm: Add smm_board_info for SMM that can be set from mainboard
......................................................................
Patch Set 16: Code-Review+1
--
To view, visit https://review.coreboot.org/c/coreboot/+/49460
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I81722a4f1bf75ec942cc06e403ad702dfe938e71
Gerrit-Change-Number: 49460
Gerrit-PatchSet: 16
Gerrit-Owner: Johnny Lin <Johnny_Lin(a)wiwynn.com>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Jingle Hsu <jingle_hsu(a)wiwynn.com>
Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com>
Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com>
Gerrit-Reviewer: Morgan Jang <Morgan_Jang(a)wiwynn.com>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com>
Gerrit-Reviewer: Rocky Phagura
Gerrit-Reviewer: Rocky Phagura <rphagura(a)fb.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com>
Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com>
Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com>
Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com>
Gerrit-Attention: Rocky Phagura <rphagura(a)fb.com>
Gerrit-Attention: Jingle Hsu <jingle_hsu(a)wiwynn.com>
Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Attention: Morgan Jang <Morgan_Jang(a)wiwynn.com>
Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Gerrit-Comment-Date: Tue, 04 May 2021 20:03:04 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment
Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held.
Matt Papageorge has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52857 )
Change subject: mb/amd/majolica:Set S0i3 enabled by default
......................................................................
Patch Set 2: Code-Review+1
--
To view, visit https://review.coreboot.org/c/coreboot/+/52857
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I808e78f41509cb03821513b5b63cc8856c891d8c
Gerrit-Change-Number: 52857
Gerrit-PatchSet: 2
Gerrit-Owner: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com>
Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com>
Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com>
Gerrit-Reviewer: Matt Papageorge <matthewpapa07(a)gmail.com>
Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com>
Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com>
Gerrit-Attention: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com>
Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Comment-Date: Tue, 04 May 2021 20:00:27 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment