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Change subject: mb/amd/majolica:Set S0i3 enabled by default
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Patch Set 2:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/52857/comment/99980e85_642f7681
PS2, Line 9: Set enable S0i3 for Majolica.
> Why was it disabled in the first place, and what changed?
We're still adding features to the board and soc, and rounding out the level of support. Once we got s0i3 to work...
https://review.coreboot.org/c/coreboot/+/52857/comment/c2811a5d_34638a02
PS2, Line 11: BUG=178728116
BUG=b:178728116
File src/mainboard/amd/majolica/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/52857/comment/0455df36_311ffe4b
PS2, Line 17: 1
"true"?
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Change subject: mb/intel/adlrvp: Enable support for Chrome OS mode switches
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Patch Set 4:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/52614/comment/2c175b0f_0507955b
PS3, Line 9: Signed-off-by: Anil Kumar <anil.kumar.k(a)intel.com>
> This is added in the last part of the commit message along with the "Change-Id" field.
Done
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Change subject: cpu/x86/smm: Add smm_board_info for SMM that can be set from mainboard
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Change subject: mb/amd/majolica:Set S0i3 enabled by default
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Patch Set 2: Code-Review+1
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