coreboot-gerrit May 2021

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Change in coreboot[master]: vc/amd/fsp/cezanne/FspGuids: add AMD_FSP_ACPI_ALIB_HOB_GUID
by Raul Rangel (Code Review) 04 May '21

04 May '21

Attention is currently required from: Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52903 ) Change subject: vc/amd/fsp/cezanne/FspGuids: add AMD_FSP_ACPI_ALIB_HOB_GUID ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52903 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I531c8e8d0ee2aa72b51cba59e09e7a7d253da4f9 Gerrit-Change-Number: 52903 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 04 May 2021 19:29:39 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: [TESTME] soc/amd/cezanne/agesa_acpi: add add_agesa_fsp_acpi_table call
by Raul Rangel (Code Review) 04 May '21

04 May '21

Attention is currently required from: Jason Glenesk, Marshall Dawson, Matt Papageorge, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52904 ) Change subject: [TESTME] soc/amd/cezanne/agesa_acpi: add add_agesa_fsp_acpi_table call ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52904 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8a7dae5789eee442b321ddf276494eb53fc5f499 Gerrit-Change-Number: 52904 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 04 May 2021 19:29:34 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/picasso/agesa_acpi: add comment to add_agesa_fsp_acpi_table call
by Raul Rangel (Code Review) 04 May '21

04 May '21

Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52901 ) Change subject: soc/amd/picasso/agesa_acpi: add comment to add_agesa_fsp_acpi_table call ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52901 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I409993dcecd38bd2ad603ba467b299a6eab177ab Gerrit-Change-Number: 52901 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 04 May 2021 19:28:56 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/adlrvp_m: Disable Type-C xDCI
by Bernardo Perez Priego (Code Review) 04 May '21

04 May '21

Attention is currently required from: Anil Kumar K, Selma Bensaid, Bernardo Perez Priego. Hello Bora Guvendik, build bot (Jenkins), Anil Kumar K, Selma Bensaid, Sukumar Ghorai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52744 to look at the new patch set (#2). Change subject: mb/intel/adlrvp_m: Disable Type-C xDCI ...................................................................... mb/intel/adlrvp_m: Disable Type-C xDCI Disabling this pci 0d.1 device since it is not required. TEST= Boot to OS. Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Change-Id: Iccdf38111e3961ba887829abfa4146a9b37df9be --- M src/mainboard/intel/adlrvp/devicetree_m.cb 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/52744/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52744 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iccdf38111e3961ba887829abfa4146a9b37df9be Gerrit-Change-Number: 52744 Gerrit-PatchSet: 2 Gerrit-Owner: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: [TESTME] soc/amd/cezanne/agesa_acpi: add add_agesa_fsp_acpi_table call
by Felix Held (Code Review) 04 May '21

04 May '21

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Change in coreboot[master]: vc/amd/fsp/cezanne/FspGuids: add AMD_FSP_ACPI_ALIB_HOB_GUID
by Felix Held (Code Review) 04 May '21

04 May '21

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52903 ) Change subject: vc/amd/fsp/cezanne/FspGuids: add AMD_FSP_ACPI_ALIB_HOB_GUID ...................................................................... vc/amd/fsp/cezanne/FspGuids: add AMD_FSP_ACPI_ALIB_HOB_GUID Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I531c8e8d0ee2aa72b51cba59e09e7a7d253da4f9 --- M src/vendorcode/amd/fsp/cezanne/FspGuids.h 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/52903/1 diff --git a/src/vendorcode/amd/fsp/cezanne/FspGuids.h b/src/vendorcode/amd/fsp/cezanne/FspGuids.h index 7f7a91d..ca8cfc5 100644 --- a/src/vendorcode/amd/fsp/cezanne/FspGuids.h +++ b/src/vendorcode/amd/fsp/cezanne/FspGuids.h @@ -13,4 +13,8 @@ GUID_INIT(0xa21f7ab5, 0x6a89, 0x4df2, \ 0xb9, 0x19, 0x51, 0xad, 0x95, 0x50, 0x5b, 0xd8) +#define AMD_FSP_ACPI_ALIB_HOB_GUID \ + GUID_INIT(0x42494c41, 0x4002, 0x403b, \ + 0x87, 0xE1, 0x3F, 0xEB, 0x13, 0xC5, 0x66, 0x9A) + #endif /* __FSP_GUIDS__ */ -- To view, visit https://review.coreboot.org/c/coreboot/+/52903 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I531c8e8d0ee2aa72b51cba59e09e7a7d253da4f9 Gerrit-Change-Number: 52903 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/amd/cezanne/agesa_acpi: add and call agesa_write_acpi_tables
by Felix Held (Code Review) 04 May '21

04 May '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson. Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52902 ) Change subject: soc/amd/cezanne/agesa_acpi: add and call agesa_write_acpi_tables ...................................................................... soc/amd/cezanne/agesa_acpi: add and call agesa_write_acpi_tables This function will be used to add some SSDTs. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Ia88cb5ea483850a8659f3bae8040c82eb2735d26 --- M src/soc/amd/cezanne/Makefile.inc A src/soc/amd/cezanne/agesa_acpi.c M src/soc/amd/cezanne/chip.c M src/soc/amd/cezanne/include/soc/acpi.h 4 files changed, 25 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/52902/1 diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc index e51a616..ebdad45 100644 --- a/src/soc/amd/cezanne/Makefile.inc +++ b/src/soc/amd/cezanne/Makefile.inc @@ -32,6 +32,7 @@ ramstage-y += i2c.c ramstage-y += acpi.c +ramstage-y += agesa_acpi.c ramstage-y += chip.c ramstage-y += cpu.c ramstage-y += data_fabric.c diff --git a/src/soc/amd/cezanne/agesa_acpi.c b/src/soc/amd/cezanne/agesa_acpi.c new file mode 100644 index 0000000..8084e4d --- /dev/null +++ b/src/soc/amd/cezanne/agesa_acpi.c @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <acpi/acpi.h> +#include <amdblocks/acpi.h> +#include <device/device.h> +#include <soc/acpi.h> +#include <types.h> + +uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current, + acpi_rsdp_t *rsdp) +{ + return current; +} diff --git a/src/soc/amd/cezanne/chip.c b/src/soc/amd/cezanne/chip.c index 8625bd7..625f46c 100644 --- a/src/soc/amd/cezanne/chip.c +++ b/src/soc/amd/cezanne/chip.c @@ -4,6 +4,7 @@ #include <device/device.h> #include <device/pci.h> #include <fsp/api.h> +#include <soc/acpi.h> #include <soc/cpu.h> #include <soc/data_fabric.h> #include <soc/pci_devs.h> @@ -79,6 +80,8 @@ static void soc_init(void *chip_info) { + default_dev_ops_root.write_acpi_tables = agesa_write_acpi_tables; + fsp_silicon_init(); data_fabric_set_mmio_np(); diff --git a/src/soc/amd/cezanne/include/soc/acpi.h b/src/soc/amd/cezanne/include/soc/acpi.h index 1b1d2fb..ab90c96 100644 --- a/src/soc/amd/cezanne/include/soc/acpi.h +++ b/src/soc/amd/cezanne/include/soc/acpi.h @@ -3,6 +3,11 @@ #ifndef AMD_CEZANNE_ACPI_H #define AMD_CEZANNE_ACPI_H +#include <acpi/acpi.h> +#include <amdblocks/acpi.h> +#include <device/device.h> +#include <stdint.h> + #define ACPI_SCI_IRQ 9 /* RTC Registers */ @@ -10,4 +15,7 @@ #define RTC_ALT_CENTURY 0x32 #define RTC_CENTURY 0x48 +uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current, + acpi_rsdp_t *rsdp); + #endif /* AMD_CEZANNE_ACPI_H */ -- To view, visit https://review.coreboot.org/c/coreboot/+/52902 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia88cb5ea483850a8659f3bae8040c82eb2735d26 Gerrit-Change-Number: 52902 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/amd/picasso/agesa_acpi: add comment to add_agesa_fsp_acpi_table call
by Felix Held (Code Review) 04 May '21

04 May '21

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52901 ) Change subject: soc/amd/picasso/agesa_acpi: add comment to add_agesa_fsp_acpi_table call ...................................................................... soc/amd/picasso/agesa_acpi: add comment to add_agesa_fsp_acpi_table call Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I409993dcecd38bd2ad603ba467b299a6eab177ab --- M src/soc/amd/picasso/agesa_acpi.c 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/52901/1 diff --git a/src/soc/amd/picasso/agesa_acpi.c b/src/soc/amd/picasso/agesa_acpi.c index a8ce780..abac9c1 100644 --- a/src/soc/amd/picasso/agesa_acpi.c +++ b/src/soc/amd/picasso/agesa_acpi.c @@ -1002,6 +1002,7 @@ current += crat->header.length; acpi_add_table(rsdp, crat); + /* add ALIB SSDT from HOB */ current = add_agesa_fsp_acpi_table(AMD_FSP_ACPI_ALIB_HOB_GUID, "ALIB", rsdp, current); /* IVRS */ -- To view, visit https://review.coreboot.org/c/coreboot/+/52901 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I409993dcecd38bd2ad603ba467b299a6eab177ab Gerrit-Change-Number: 52901 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/amd/common/fsp/fsp-acpi: factor out SSDT from HOB functionality
by Raul Rangel (Code Review) 04 May '21

04 May '21

Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52896 ) Change subject: soc/amd/common/fsp/fsp-acpi: factor out SSDT from HOB functionality ...................................................................... Patch Set 1: Code-Review+2 (1 comment) File src/soc/amd/common/fsp/fsp-acpi.c: https://review.coreboot.org/c/coreboot/+/52896/comment/05b12029_b80d78c0 PS1, Line 18: add_agesa_fsp_acpi_table > this is a generic function to add a ssdt from a hob. […] ah, the GUID is what describes the table. Thanks for the clarification. -- To view, visit https://review.coreboot.org/c/coreboot/+/52896 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b256de712fe60d1c021cb875aaadec1d331584b Gerrit-Change-Number: 52896 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 04 May 2021 19:15:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/picasso/agesa_acpi: add missing device/device.h include
by Raul Rangel (Code Review) 04 May '21

04 May '21

Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52899 ) Change subject: soc/amd/picasso/agesa_acpi: add missing device/device.h include ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52899 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7892cf680661253f74c3e291f5e9fb372e1d4ce3 Gerrit-Change-Number: 52899 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 04 May 2021 19:13:49 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit May 2021