coreboot-gerrit May 2021

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Change in coreboot[master]: soc/mediatek/mt8195: set dram dma property
by Hung-Te Lin (Code Review) 11 May '21

11 May '21

Attention is currently required from: Rex-BC Chen, Yu-Ping Wu. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54052 ) Change subject: soc/mediatek/mt8195: set dram dma property ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: src/soc/mediatek/mt8195/mmu_operations.c has multiple final newlines. -- To view, visit https://review.coreboot.org/c/coreboot/+/54052 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I819d40431fc7c9e7549686736d9e70de1c1982f0 Gerrit-Change-Number: 54052 Gerrit-PatchSet: 2 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Tue, 11 May 2021 11:58:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in libgfxinit[master]: [HACK] Switch LSPCON to PCON mode
by Angel Pons (Code Review) 11 May '21

11 May '21

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/libgfxinit/+/46631 ) Change subject: [HACK] Switch LSPCON to PCON mode ...................................................................... [HACK] Switch LSPCON to PCON mode Change-Id: I3c9e67caf9511d62b19c0c175e8e75080fb7ac7d Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M common/hw-gfx-dp_aux_ch.adb M common/hw-gfx-dp_aux_ch.ads M common/hw-gfx-dp_info.adb 3 files changed, 156 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/31/46631/1 diff --git a/common/hw-gfx-dp_aux_ch.adb b/common/hw-gfx-dp_aux_ch.adb index b8eb510..7406d5e 100644 --- a/common/hw-gfx-dp_aux_ch.adb +++ b/common/hw-gfx-dp_aux_ch.adb @@ -371,6 +371,42 @@ ---------------------------------------------------------------------------- + procedure I2C_Write_Byte + (Port : in T; + Address : in I2C.Transfer_Address; + Offset : in Word8; + Value : in Word8; + Success : out Boolean) + is + Index_Payload : constant DP_Defs.Aux_Payload := (Offset, Value, others => 16#00#); + + Length : constant I2C.Transfer_Length := 1; + Data : constant I2C.Transfer_Data := (Value, others => 16#00#); + begin + Do_I2C_Write (Port, Address, 1 + Length, Index_Payload, Success); + end I2C_Write_Byte; + + procedure I2C_Read_Byte + (Port : in T; + Address : in I2C.Transfer_Address; + Offset : in Word8; + Value : out Word8; + Success : out Boolean) + is + Index_Payload : constant DP_Defs.Aux_Payload := (Offset, others => 16#00#); + + Length : I2C.Transfer_Length := 1; + Data : I2C.Transfer_Data := (others => 16#00#); + begin + Do_I2C_Write (Port, Address, 1, Index_Payload, Success); + + if Success then + Do_I2C_Read (Port, Address, Length, Data, Success); + Success := Success and Length = 1; + end if; + Value := Data (0); + end I2C_Read_Byte; + procedure I2C_Read (Port : in T; Address : in I2C.Transfer_Address; diff --git a/common/hw-gfx-dp_aux_ch.ads b/common/hw-gfx-dp_aux_ch.ads index 85fddd0..78709a8 100644 --- a/common/hw-gfx-dp_aux_ch.ads +++ b/common/hw-gfx-dp_aux_ch.ads @@ -45,6 +45,20 @@ ---------------------------------------------------------------------------- + procedure I2C_Write_Byte + (Port : in T; + Address : in I2C.Transfer_Address; + Offset : in Word8; + Value : in Word8; + Success : out Boolean); + + procedure I2C_Read_Byte + (Port : in T; + Address : in I2C.Transfer_Address; + Offset : in Word8; + Value : out Word8; + Success : out Boolean); + procedure I2C_Read (Port : in T; Address : in I2C.Transfer_Address; diff --git a/common/hw-gfx-dp_info.adb b/common/hw-gfx-dp_info.adb index bf09933..93a1caf 100644 --- a/common/hw-gfx-dp_info.adb +++ b/common/hw-gfx-dp_info.adb @@ -15,15 +15,115 @@ with Ada.Unchecked_Conversion; with HW.Debug; +with HW.Time; with GNAT.Source_Info; with HW.GFX.DP_Defs; +with HW.GFX.I2C; use type HW.Word8; use type HW.Word16; package body HW.GFX.DP_Info is + procedure Read_Lspcon_Mode + (Port : in T; + Mode : out Word8; + Success : out Boolean) + is + begin + pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); + + for I in 1 .. 6 loop + Aux_Ch.I2C_Read_Byte + (Port => Port, + Address => 16#40#, + Offset => 16#41#, + Value => Mode, + Success => Success); + exit when Success; + Time.U_Delay (500); + end loop; + end Read_Lspcon_Mode; + + procedure Write_Lspcon_Mode + (Port : in T; + Mode : in Word8; + Success : out Boolean) + is + begin + pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); + + for I in 1 .. 6 loop + Aux_Ch.I2C_Write_Byte + (Port => Port, + Address => 16#40#, + Offset => 16#40#, + Value => 16#01#, + Success => Success); + exit when Success; + Time.U_Delay (500); + end loop; + end Write_Lspcon_Mode; + + procedure Set_Lspcon_To_Pcon_Mode (Port : in T; Success : out Boolean) + is + Timeout : constant Natural := 20; + Lspcon_Mode : Word8; + begin + pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); + + Read_Lspcon_Mode + (Port => Port, + Mode => Lspcon_Mode, + Success => Success); + + if not Success then + pragma Debug (Debug.Put_Line ("Could not determine LSPCON mode.")); + return; + end if; + + pragma Debug (Debug.Put_Line ("Current LSPCON mode: " & Lspcon_Mode'Image)); + + if Lspcon_Mode /= 0 then + pragma Debug (Debug.Put_Line ("LSPCON mode is good enough.")); + return; + end if; + + -- Change to PCON mode if necessary + Write_Lspcon_Mode + (Port => Port, + Mode => Lspcon_Mode, + Success => Success); + + if not Success then + pragma Debug (Debug.Put_Line ("Could not write new LSPCON mode.")); + return; + end if; + + for I in 1 .. Timeout loop + Read_Lspcon_Mode + (Port => Port, + Mode => Lspcon_Mode, + Success => Success); + if not Success then + pragma Debug (Debug.Put_Line ("Could not determine new LSPCON mode.")); + return; + end if; + if Lspcon_Mode /= 0 then + pragma Debug (Debug.Put_Line ("Successfully set LSPCON to PCON mode.")); + pragma Debug (Debug.Put_Line ("Current LSPCON mode: " & Lspcon_Mode'Image)); + return; + end if; + Time.M_Delay (100); + end loop; + if Success then + pragma Debug (Debug.Put_Line ("Timed out waiting for LSPCON mode change.")); + pragma Debug (Debug.Put_Line ("Current LSPCON mode: " & Lspcon_Mode'Image)); + Success := False; + end if; + end Set_Lspcon_To_Pcon_Mode; + procedure Read_Caps (Link : in out DP_Link; Port : in T; @@ -36,6 +136,12 @@ begin pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); + Set_Lspcon_To_Pcon_Mode (Port, Success); + + if not Success then + pragma Debug (Debug.Put_Line ("Could not change LSPCON mode.")); + end if; + Length := Caps_Size; Aux_Ch.Aux_Read (Port => Port, -- To view, visit https://review.coreboot.org/c/libgfxinit/+/46631 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-Change-Id: I3c9e67caf9511d62b19c0c175e8e75080fb7ac7d Gerrit-Change-Number: 46631 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

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Change in libgfxinit[master]: Add support to switch LSPCON modes
by Angel Pons (Code Review) 11 May '21

11 May '21

Attention is currently required from: Martin Roth, Matt DeVillier. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/libgfxinit/+/51133 ) Change subject: Add support to switch LSPCON modes ...................................................................... Patch Set 12: (5 comments) Commit Message: https://review.coreboot.org/c/libgfxinit/+/51133/comment/bec5c63c_271e2b6a PS9, Line 11: The chip defaults to LS mode. > Maybe explain this, e.g. […] Done https://review.coreboot.org/c/libgfxinit/+/51133/comment/db062883_bf09ec0e PS9, Line 16: level shifter mode > `level-shifter mode` would probably read better, or `LS mode` […] Done Commit Message: https://review.coreboot.org/c/libgfxinit/+/51133/comment/2653e0d4_4419c10a PS11, Line 9: highly-cursed > I'd drop it. […] Gone Patchset: PS11: > Looks I forgot to publish some old drafts, sorry. […] IIRC, last time I checked it didn't cause any issues. I think I had problems when the LSPCON detection didn't work properly. File common/hw-gfx-dp_dual_mode.adb: https://review.coreboot.org/c/libgfxinit/+/51133/comment/cea6c09f_2be0ca73 PS11, Line 87: end case; > Could also remove all the pragmas here and put a single one around each call. […] SPARK still complains 😭 -- To view, visit https://review.coreboot.org/c/libgfxinit/+/51133 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-Change-Id: Idfa9bdff47a6591000cd5092d64a4cd4f8dbdc8d Gerrit-Change-Number: 51133 Gerrit-PatchSet: 12 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Tue, 11 May 2021 11:57:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in libgfxinit[master]: Add support to switch LSPCON modes
by Angel Pons (Code Review) 11 May '21

11 May '21

Attention is currently required from: Martin Roth, Angel Pons. Hello Nico Huber, Patrick Georgi, Martin Roth, Matt DeVillier, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/libgfxinit/+/51133 to look at the new patch set (#12). Change subject: Add support to switch LSPCON modes ...................................................................... Add support to switch LSPCON modes LSPCON is a level shifter and protocol converter chip. It is principally used to convert DisplayPort into HDMI 2.0, since some Intel iGPUs do not have native HDMI 2.0 support. The chip defaults to LS mode, in which the display engine has to generate an HDMI-protocol signal, which the LSPCON converts from DisplayPort signal levels to HDMI signal levels. Add code to detect LSPCON chips and put them in protocol-converter mode. This way, the LSPCON behaves like a regular DisplayPort sink. This needs to be done before any DPCD accesses, because the LSPCON does not respond to DPCD accesses in level-shifter mode. Tested on Purism Librem Mini v1 (WHL-U), HDMI port can now light up. Change-Id: Idfa9bdff47a6591000cd5092d64a4cd4f8dbdc8d Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M common/Makefile.inc A common/hw-gfx-dp_dual_mode.adb A common/hw-gfx-dp_dual_mode.ads M common/hw-gfx-gma-connector_info.adb A common/hw-gfx-gma-dp_dual_mode.ads 5 files changed, 265 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/33/51133/12 -- To view, visit https://review.coreboot.org/c/libgfxinit/+/51133 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-Change-Id: Idfa9bdff47a6591000cd5092d64a4cd4f8dbdc8d Gerrit-Change-Number: 51133 Gerrit-PatchSet: 12 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: [WIP] soc/intel/common: Add InSMM.STS support
by Angel Pons (Code Review) 11 May '21

11 May '21

Attention is currently required from: Nico Huber, Benjamin Doron, Paul Menzel, Patrick Rudolph. Hello build bot (Jenkins), Michael Niewöhner, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/51796 to look at the new patch set (#8). Change subject: [WIP] soc/intel/common: Add InSMM.STS support ...................................................................... [WIP] soc/intel/common: Add InSMM.STS support Tested on HP 280 G2, SMMSTORE (v1) still works. Other tests: - If one does not set BIOS_CONTROL bit WPD, SMMSTORE breaks. - If one does not write the magic MSR `or 1`, SMMSTORE breaks. Change-Id: Ia90c0e3f8ccf895bfb6d46ffe26750393dab95fb Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/soc/intel/common/block/smm/smihandler.c M src/soc/intel/common/pch/lockdown/lockdown.c 2 files changed, 27 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/51796/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/51796 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia90c0e3f8ccf895bfb6d46ffe26750393dab95fb Gerrit-Change-Number: 51796 Gerrit-PatchSet: 8 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: [WIP] soc/intel/common: Add InSMM.STS support
by Angel Pons (Code Review) 11 May '21

11 May '21

Attention is currently required from: Nico Huber, Benjamin Doron, Paul Menzel, Patrick Rudolph. Hello build bot (Jenkins), Michael Niewöhner, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/51796 to look at the new patch set (#7). Change subject: [WIP] soc/intel/common: Add InSMM.STS support ...................................................................... [WIP] soc/intel/common: Add InSMM.STS support Tested on HP 280 G2, SMMSTORE (v1) still works. Other tests: - If one does not set BIOS_CONTROL bit WPD, SMMSTORE breaks. - If one does not write the magic MSR `or 1`, SMMSTORE breaks. Change-Id: Ia90c0e3f8ccf895bfb6d46ffe26750393dab95fb Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/soc/intel/common/block/smm/smihandler.c M src/soc/intel/common/pch/lockdown/lockdown.c 2 files changed, 27 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/51796/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/51796 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia90c0e3f8ccf895bfb6d46ffe26750393dab95fb Gerrit-Change-Number: 51796 Gerrit-PatchSet: 7 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: nb/amd/pi/00730F01: Use generic allocation functions for northbridge
by Arthur Heymans (Code Review) 11 May '21

11 May '21

Attention is currently required from: Nico Huber, Michał Żygowski, Krystian Hebel, Kyösti Mälkki, Felix Held. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52926 ) Change subject: nb/amd/pi/00730F01: Use generic allocation functions for northbridge ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52926 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8dd5e40bce513c5ba7f1d42a06e7ab0846666942 Gerrit-Change-Number: 52926 Gerrit-PatchSet: 4 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 11 May 2021 11:29:48 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/prodrive/hermes: Disable ACPI S3 and S4 with SPS
by Arthur Heymans (Code Review) 11 May '21

11 May '21

Attention is currently required from: wouter.eckhardt(a)prodrive-technologies.com, Guido Beyer @ Prodrive Technologies, Justin van Son, Patrick Rudolph, Christian Walter, Angel Pons, Stef van Os. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54058 ) Change subject: mb/prodrive/hermes: Disable ACPI S3 and S4 with SPS ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/54058 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9d0fa8530e198e86415f92da6719d2fb0d2401ec Gerrit-Change-Number: 54058 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Guido Beyer @ Prodrive Technologies <guido.beyer(a)prodrive-technologies.com> Gerrit-Reviewer: Justin van Son <justin.van.son(a)prodrive-technologies.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Stef van Os <stef.van.os(a)prodrive-technologies.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: wouter.eckhardt(a)prodrive-technologies.com Gerrit-Attention: wouter.eckhardt(a)prodrive-technologies.com Gerrit-Attention: Guido Beyer @ Prodrive Technologies <guido.beyer(a)prodrive-technologies.com> Gerrit-Attention: Justin van Son <justin.van.son(a)prodrive-technologies.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Stef van Os <stef.van.os(a)prodrive-technologies.com> Gerrit-Comment-Date: Tue, 11 May 2021 11:14:56 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/prodrive/hermes: Disable ACPI S3 and S4 with SPS
by Angel Pons (Code Review) 11 May '21

11 May '21

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/54058 ) Change subject: mb/prodrive/hermes: Disable ACPI S3 and S4 with SPS ...................................................................... mb/prodrive/hermes: Disable ACPI S3 and S4 with SPS Hermes can be used with either CSME or SPS firmware. However, the SPS (Server Platform Services) firmware does not support ACPI S3 and S4 sleep states, and coreboot should not report S3 and S4 as supported. Add a Kconfig option to be selected when building coreboot to use with SPS firmware, which allows disabling ACPI S3 and S4 sleep state support. Change-Id: I9d0fa8530e198e86415f92da6719d2fb0d2401ec Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/prodrive/hermes/Kconfig 1 file changed, 9 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/54058/1 diff --git a/src/mainboard/prodrive/hermes/Kconfig b/src/mainboard/prodrive/hermes/Kconfig index 178acce..ac497e6 100644 --- a/src/mainboard/prodrive/hermes/Kconfig +++ b/src/mainboard/prodrive/hermes/Kconfig @@ -14,10 +14,18 @@ select INTEL_GMA_HAVE_VBT select SOC_INTEL_COMMON_BLOCK_HDA_VERB select ONBOARD_VGA_IS_PRIMARY - select HAVE_ACPI_RESUME + select HAVE_ACPI_RESUME if !HERMES_USES_SPS_FIRMWARE + select DISABLE_ACPI_HIBERNATE if HERMES_USES_SPS_FIRMWARE if BOARD_PRODRIVE_HERMES_BASEBOARD +config HERMES_USES_SPS_FIRMWARE + bool "Build for use with SPS (Server Platform Services) firmware" + help + Depending on the intended use case, the Hermes mainboard can use either + CSME or SPS firmware SKUs. Choose this option if using SPS firmware, as + SPS doesn't support ACPI S3 and S4 sleep states. + config MAINBOARD_FAMILY string default "PRODRIVE_HERMES_SERIES" -- To view, visit https://review.coreboot.org/c/coreboot/+/54058 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9d0fa8530e198e86415f92da6719d2fb0d2401ec Gerrit-Change-Number: 54058 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: acpi: add SRAT Generic Initiator Affinity structure
by Lance Zhao (Code Review) 11 May '21

11 May '21

Attention is currently required from: Jonathan Zhang, Tim Wawrzynczak. Lance Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52734 ) Change subject: acpi: add SRAT Generic Initiator Affinity structure ...................................................................... Patch Set 3: (2 comments) File src/acpi/acpi.c: https://review.coreboot.org/c/coreboot/+/52734/comment/b0819b59_ff9e2bdb PS3, Line 519: memcpy(gia->dev_handle, &seg, sizeof(seg)) memcpy(gia->dev_handle, &seg, 2) https://review.coreboot.org/c/coreboot/+/52734/comment/7dd8b9ba_606b84dd PS3, Line 520: gia->dev_handle[2] = bus; /* Byte 2 has bus number */ : /* Byte 3 has bits 7:3 for dev, bits 2:0 for func */ : gia->dev_handle[3] = PCI_SLOT(dev) | PCI_FUNC(func); Create a seperated dev_handle_pci and dev_handle_acpi to make it easier to understand? -- To view, visit https://review.coreboot.org/c/coreboot/+/52734 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic6ef01c59e02f30dc290f27e741027e16f5d8359 Gerrit-Change-Number: 52734 Gerrit-PatchSet: 3 Gerrit-Owner: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Tue, 11 May 2021 10:33:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit May 2021