coreboot-gerrit May 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/google/brya: Enable HECI1 communication
by Jamie Ryu (Code Review) 13 May '21

13 May '21

Attention is currently required from: Furquan Shaikh, Tim Wawrzynczak, Sridhar Siricilla. Jamie Ryu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54210 ) Change subject: mb/google/brya: Enable HECI1 communication ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/54210 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I73acdd99788f9b60b7bcea372145e9694a124174 Gerrit-Change-Number: 54210 Gerrit-PatchSet: 1 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Comment-Date: Thu, 13 May 2021 06:50:39 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Enable HECI1 communication
by Rizwan Qureshi (Code Review) 13 May '21

13 May '21

Attention is currently required from: Furquan Shaikh, Jamie Ryu, Tim Wawrzynczak, Sridhar Siricilla. Rizwan Qureshi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54210 ) Change subject: mb/google/brya: Enable HECI1 communication ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/54210 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I73acdd99788f9b60b7bcea372145e9694a124174 Gerrit-Change-Number: 54210 Gerrit-PatchSet: 1 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Comment-Date: Thu, 13 May 2021 06:50:05 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8195: enable ARM64_USE_ARM_TRUSTED_FIRMWARE
by Rex-BC Chen (Code Review) 13 May '21

13 May '21

Attention is currently required from: Hung-Te Lin, Paul Menzel, Rex-BC Chen. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/53898 ) Change subject: soc/mediatek/mt8195: enable ARM64_USE_ARM_TRUSTED_FIRMWARE ...................................................................... Patch Set 4: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/53898/comment/0e95acde_9c60b68a PS3, Line 9: Enable ATF support. > > … to support multiple cores? […] Done https://review.coreboot.org/c/coreboot/+/53898/comment/b3e2ad30_9b6a68db PS3, Line 12: > No bug entry? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/53898 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id1ef29894fa3a6022574c3874dee62617133b12c Gerrit-Change-Number: 53898 Gerrit-PatchSet: 4 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidi.lin(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Thu, 13 May 2021 06:19:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8195: enable ARM64_USE_ARM_TRUSTED_FIRMWARE
by Rex-BC Chen (Code Review) 13 May '21

13 May '21

Attention is currently required from: Hung-Te Lin. Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu, Yidi Lin, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/53898 to look at the new patch set (#4). Change subject: soc/mediatek/mt8195: enable ARM64_USE_ARM_TRUSTED_FIRMWARE ...................................................................... soc/mediatek/mt8195: enable ARM64_USE_ARM_TRUSTED_FIRMWARE Enable ATF configuration to support multi-core. TEST=boot to kernel with multi-core support. BUG=b:177593590 Signed-off-by: Yidi Lin <yidi.lin(a)mediatek.com> Change-Id: Id1ef29894fa3a6022574c3874dee62617133b12c --- M src/soc/mediatek/mt8195/Kconfig M src/soc/mediatek/mt8195/Makefile.inc 2 files changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/53898/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/53898 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id1ef29894fa3a6022574c3874dee62617133b12c Gerrit-Change-Number: 53898 Gerrit-PatchSet: 4 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidi.lin(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/mediatek/mt8195: enable ARM64_USE_ARM_TRUSTED_FIRMWARE
by Rex-BC Chen (Code Review) 13 May '21

13 May '21

Attention is currently required from: Hung-Te Lin. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/53898 ) Change subject: soc/mediatek/mt8195: enable ARM64_USE_ARM_TRUSTED_FIRMWARE ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: @yupingso is there any progress for this patch? -- To view, visit https://review.coreboot.org/c/coreboot/+/53898 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id1ef29894fa3a6022574c3874dee62617133b12c Gerrit-Change-Number: 53898 Gerrit-PatchSet: 3 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidi.lin(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Comment-Date: Thu, 13 May 2021 06:10:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Enable HECI1 communication
by Sridhar Siricilla (Code Review) 13 May '21

13 May '21

Sridhar Siricilla has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/54210 ) Change subject: mb/google/brya: Enable HECI1 communication ...................................................................... mb/google/brya: Enable HECI1 communication The patch enables HECI1 interface to allow OS applications to communicate with CSE. TEST=Verify PCI device 0:16.0 exposed in the lspci output Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Change-Id: I73acdd99788f9b60b7bcea372145e9694a124174 --- M src/mainboard/google/brya/variants/baseboard/devicetree.cb 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/54210/1 diff --git a/src/mainboard/google/brya/variants/baseboard/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/devicetree.cb index e7a6ed3..4097ab6 100644 --- a/src/mainboard/google/brya/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/devicetree.cb @@ -17,6 +17,9 @@ # S0ix enable register "s0ix_enable" = "1" + # Enable heci communication + register "HeciEnabled" = "1" + # This disabled autonomous GPIO power management, otherwise # old cr50 FW only supports short pulses; need to clarify # the minimum PCH IRQ pulse width with Intel, b/180111628 -- To view, visit https://review.coreboot.org/c/coreboot/+/54210 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I73acdd99788f9b60b7bcea372145e9694a124174 Gerrit-Change-Number: 54210 Gerrit-PatchSet: 1 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/mediatek: Remove duplicate enum declaration
by Rex-BC Chen (Code Review) 13 May '21

13 May '21

Rex-BC Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/54209 ) Change subject: soc/mediatek: Remove duplicate enum declaration ...................................................................... soc/mediatek: Remove duplicate enum declaration Remove dram_cbt_mode in dramc_soc.h. TEST=emerge-asurada coreboot Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: Idc4a3887c9cc3f77cbdd7282e2977f6df858817d --- M src/soc/mediatek/common/include/soc/dramc_param.h M src/soc/mediatek/mt8192/include/soc/dramc_soc.h 2 files changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/54209/1 diff --git a/src/soc/mediatek/common/include/soc/dramc_param.h b/src/soc/mediatek/common/include/soc/dramc_param.h index 00bf7c0..7794a73 100644 --- a/src/soc/mediatek/common/include/soc/dramc_param.h +++ b/src/soc/mediatek/common/include/soc/dramc_param.h @@ -129,7 +129,7 @@ u32 support_ranks; u64 rank_size[RANK_MAX]; struct emi_mdl emi_config; - dram_cbt_mode cbt_mode[RANK_MAX]; + DRAM_CBT_MODE_T cbt_mode[RANK_MAX]; }; struct dramc_data { diff --git a/src/soc/mediatek/mt8192/include/soc/dramc_soc.h b/src/soc/mediatek/mt8192/include/soc/dramc_soc.h index 1b90eb1..8710563 100644 --- a/src/soc/mediatek/mt8192/include/soc/dramc_soc.h +++ b/src/soc/mediatek/mt8192/include/soc/dramc_soc.h @@ -36,7 +36,7 @@ typedef enum { CBT_NORMAL_MODE = 0, CBT_BYTE_MODE1 -} DRAM_CBT_MODE_T, dram_cbt_mode; +} DRAM_CBT_MODE_T; #define DRAM_DFS_SHU_MAX DRAM_DFS_SHUFFLE_MAX -- To view, visit https://review.coreboot.org/c/coreboot/+/54209 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idc4a3887c9cc3f77cbdd7282e2977f6df858817d Gerrit-Change-Number: 54209 Gerrit-PatchSet: 1 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/volteer: Configure TCSS OC pins
by Zhuohao Lee (Code Review) 13 May '21

13 May '21

Attention is currently required from: Furquan Shaikh, Nick Vaccaro. Zhuohao Lee has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54076 ) Change subject: mb/google/volteer: Configure TCSS OC pins ...................................................................... Patch Set 5: Code-Review+1 (1 comment) Patchset: PS5: All volteer variants, ie: Copano, Collis, Delbin, Drobit, Eldrid, Elemi, Lillipup/Lindar, Terrador, Voema, Volet, Volteer, Voxel/Volta, use the same OC gpio pin as the volteer -- To view, visit https://review.coreboot.org/c/coreboot/+/54076 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I12da755a1d3b9ec3ed0a2dbfb0782313dd49c7e9 Gerrit-Change-Number: 54076 Gerrit-PatchSet: 5 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Thu, 13 May 2021 05:58:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/octopus/var/phaser: add audio codec into SSFC support for P...
by Tiffany Li (Code Review) 13 May '21

13 May '21

Tiffany Li has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52878 ) Change subject: mb/google/octopus/var/phaser: add audio codec into SSFC support for Phaser ...................................................................... Patch Set 9: (2 comments) Patchset: PS9: > Please kindly help to cherry-pick to TOT PS9: Please kindly help to cherry-pick to TOT -- To view, visit https://review.coreboot.org/c/coreboot/+/52878 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I202f71f57ad2db84fb90b52f9ffd7a1fd05494a3 Gerrit-Change-Number: 52878 Gerrit-PatchSet: 9 Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Marco Chen <marcochen(a)chromium.org> Gerrit-Reviewer: Marco Chen <marcochen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tiffany Li <tiffany.li(a)lcfc.corp-partner.google.com> Gerrit-Comment-Date: Thu, 13 May 2021 05:41:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tiffany Li <tiffany.li(a)lcfc.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/octopus/var/phaser: add audio codec into SSFC support for P...
by Tiffany Li (Code Review) 13 May '21

13 May '21

Tiffany Li has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52878 ) Change subject: mb/google/octopus/var/phaser: add audio codec into SSFC support for Phaser ...................................................................... Patch Set 9: (1 comment) Patchset: PS9: Please kindly help to review and merge to TOT -- To view, visit https://review.coreboot.org/c/coreboot/+/52878 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I202f71f57ad2db84fb90b52f9ffd7a1fd05494a3 Gerrit-Change-Number: 52878 Gerrit-PatchSet: 9 Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Marco Chen <marcochen(a)chromium.org> Gerrit-Reviewer: Marco Chen <marcochen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tiffany Li <tiffany.li(a)lcfc.corp-partner.google.com> Gerrit-Comment-Date: Thu, 13 May 2021 05:39:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit May 2021