coreboot-gerrit May 2021

coreboot-gerrit@coreboot.org

1 participants
6048 discussions

Change in coreboot[master]: vendor/mediatek: Add MT8195 dram initialization code
by Rex-BC Chen (Code Review) 13 May '21

13 May '21

Rex-BC Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/54230 ) Change subject: vendor/mediatek: Add MT8195 dram initialization code ...................................................................... vendor/mediatek: Add MT8195 dram initialization code This is the DRAM initialization code from the reference implementation released by Mediatek for MT8195. The DRAM calibration code can be taken as a standalone library, used by different boot loaders for initializing DRAM and following a different coding style (coreboot was using Linux Kernel coding style), so we have to put it in vendor code folder. Signed-off-by: Ryan Chuang <ryan.chuang(a)mediatek.com> Change-Id: Iada3ec5ae8a39a8e9253caba550c834d486dddcd --- M src/vendorcode/mediatek/Makefile.inc A src/vendorcode/mediatek/mt8195/Makefile.inc A src/vendorcode/mediatek/mt8195/dramc/ANA_init_config.c A src/vendorcode/mediatek/mt8195/dramc/DIG_NONSHUF_config.c A src/vendorcode/mediatek/mt8195/dramc/DIG_SHUF_config.c A src/vendorcode/mediatek/mt8195/dramc/DRAMC_SUBSYS_config.c A src/vendorcode/mediatek/mt8195/dramc/DRAM_config_collctioin.c A src/vendorcode/mediatek/mt8195/dramc/Hal_io.c A src/vendorcode/mediatek/mt8195/dramc/LP4_dram_init.c A src/vendorcode/mediatek/mt8195/dramc/Makefile.inc A src/vendorcode/mediatek/mt8195/dramc/dramc_actiming.c A src/vendorcode/mediatek/mt8195/dramc/dramc_debug.c A src/vendorcode/mediatek/mt8195/dramc/dramc_dv_freq_related.c A src/vendorcode/mediatek/mt8195/dramc/dramc_dvfs.c A src/vendorcode/mediatek/mt8195/dramc/dramc_lowpower.c A src/vendorcode/mediatek/mt8195/dramc/dramc_pi_basic_api.c A src/vendorcode/mediatek/mt8195/dramc/dramc_pi_calibration_api.c A src/vendorcode/mediatek/mt8195/dramc/dramc_pi_main.c A src/vendorcode/mediatek/mt8195/dramc/dramc_top.c A src/vendorcode/mediatek/mt8195/dramc/dramc_tracking.c A src/vendorcode/mediatek/mt8195/dramc/dramc_utility.c A src/vendorcode/mediatek/mt8195/dramc/emi.c A src/vendorcode/mediatek/mt8195/include/8195_Register_DDRPHY_AO.h A src/vendorcode/mediatek/mt8195/include/8195_Register_DDRPHY_MD32.h A src/vendorcode/mediatek/mt8195/include/8195_Register_DDRPHY_NAO.h A src/vendorcode/mediatek/mt8195/include/8195_Register_DRAMC_AO.h A src/vendorcode/mediatek/mt8195/include/8195_Register_DRAMC_NAO.h A src/vendorcode/mediatek/mt8195/include/dramc_actiming.h A src/vendorcode/mediatek/mt8195/include/dramc_common.h A src/vendorcode/mediatek/mt8195/include/dramc_custom.h A src/vendorcode/mediatek/mt8195/include/dramc_dv_init.h A src/vendorcode/mediatek/mt8195/include/dramc_int_global.h A src/vendorcode/mediatek/mt8195/include/dramc_int_slt.h A src/vendorcode/mediatek/mt8195/include/dramc_pi_api.h A src/vendorcode/mediatek/mt8195/include/dramc_register.h A src/vendorcode/mediatek/mt8195/include/dramc_top.h A src/vendorcode/mediatek/mt8195/include/dramc_typedefs.h A src/vendorcode/mediatek/mt8195/include/emi.h A src/vendorcode/mediatek/mt8195/include/emi_hw.h A src/vendorcode/mediatek/mt8195/include/emi_mpu_mt.h A src/vendorcode/mediatek/mt8195/include/mt8195.h A src/vendorcode/mediatek/mt8195/include/pll.h A src/vendorcode/mediatek/mt8195/include/print.h A src/vendorcode/mediatek/mt8195/include/reg.h A src/vendorcode/mediatek/mt8195/include/sv_c_data_traffic.h A src/vendorcode/mediatek/mt8195/include/x_hal_io.h 46 files changed, 96,771 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/54230/1 -- To view, visit https://review.coreboot.org/c/coreboot/+/54230 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iada3ec5ae8a39a8e9253caba550c834d486dddcd Gerrit-Change-Number: 54230 Gerrit-PatchSet: 1 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-MessageType: newchange

1 0

Change in coreboot[master]: soc/mediatek/mt8195: Initialize DRAM in romstage
by Rex-BC Chen (Code Review) 13 May '21

13 May '21

Attention is currently required from: Hung-Te Lin, Yidi Lin. Hello Yidi Lin, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/54229 to review the following change. Change subject: soc/mediatek/mt8195: Initialize DRAM in romstage ...................................................................... soc/mediatek/mt8195: Initialize DRAM in romstage Initialize DRAM in romstage and porting DRAM fast-k. Change-Id: I89b87be62c8e88ae4a620d56aa7a35e47f97952d Signed-off-by: Yidi Lin <yidi.lin(a)mediatek.com> Signed-off-by: Ryan Chuang <ryan.chuang(a)mediatek.com> --- M src/soc/mediatek/mt8195/Kconfig M src/soc/mediatek/mt8195/Makefile.inc A src/soc/mediatek/mt8195/include/soc/dramc_soc.h D src/soc/mediatek/mt8195/include/soc/emi.h 4 files changed, 67 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/54229/1 diff --git a/src/soc/mediatek/mt8195/Kconfig b/src/soc/mediatek/mt8195/Kconfig index bed3e04..203e925 100644 --- a/src/soc/mediatek/mt8195/Kconfig +++ b/src/soc/mediatek/mt8195/Kconfig @@ -5,6 +5,7 @@ select ARCH_VERSTAGE_ARMV8_64 select ARCH_ROMSTAGE_ARMV8_64 select ARCH_RAMSTAGE_ARMV8_64 + select CACHE_MRC_SETTINGS select HAVE_UART_SPECIAL select SOC_MEDIATEK_COMMON select CLEAR_WDT_MODE_REG diff --git a/src/soc/mediatek/mt8195/Makefile.inc b/src/soc/mediatek/mt8195/Makefile.inc index a04ccf4..20efb4a 100644 --- a/src/soc/mediatek/mt8195/Makefile.inc +++ b/src/soc/mediatek/mt8195/Makefile.inc @@ -22,10 +22,13 @@ romstage-y += ../common/cbmem.c romstage-y += ../common/clkbuf.c +romstage-y += ../common/dram_init.c +romstage-y += ../common/dramc_param.c romstage-y += emi.c romstage-y += ../common/flash_controller.c romstage-y += ../common/gpio.c gpio.c romstage-y += ../common/i2c.c i2c.c +romstage-y += ../common/memory.c ../common/memory_test.c romstage-y += ../common/mmu_operations.c mmu_operations.c romstage-y += ../common/pll.c pll.c romstage-y += scp.c @@ -55,8 +58,21 @@ ramstage-y += ../common/wdt.c ramstage-y += mt6360.c +BL31_MAKEARGS += PLAT=mt8195 + +MT8195_BLOB_DIR := 3rdparty/blobs/soc/mediatek/mt8195 + +DRAM_CBFS := $(CONFIG_CBFS_PREFIX)/dram +$(DRAM_CBFS)-file := $(MT8195_BLOB_DIR)/dram.elf +$(DRAM_CBFS)-type := stage +$(DRAM_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG) +ifneq ($(wildcard $($(DRAM_CBFS)-file)),) + cbfs-files-y += $(DRAM_CBFS) +endif + CPPFLAGS_common += -Isrc/soc/mediatek/mt8195/include CPPFLAGS_common += -Isrc/soc/mediatek/common/include +CPPFLAGS_common += -Isrc/vendorcode/mediatek/mt8195/include $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin ./util/mtkheader/gen-bl-img.py mt8183 sf $< $@ diff --git a/src/soc/mediatek/mt8195/include/soc/dramc_soc.h b/src/soc/mediatek/mt8195/include/soc/dramc_soc.h new file mode 100644 index 0000000..6040297 --- /dev/null +++ b/src/soc/mediatek/mt8195/include/soc/dramc_soc.h @@ -0,0 +1,50 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __SOC_MEDIATEK_MT8195_DRAMC_SOC_H__ +#define __SOC_MEDIATEK_MT8195_DRAMC_SOC_H__ + +typedef enum { + CHANNEL_A = 0, + CHANNEL_B, + CHANNEL_C, + CHANNEL_D, + CHANNEL_MAX, +} DRAM_CHANNEL_T; + +typedef enum { + RANK_0 = 0, + RANK_1, + RANK_MAX, +} DRAM_RANK_T; + +/* DRAM SHUFFLE register type */ +typedef enum { + DRAM_DFS_SHUFFLE_1 = 0, + DRAM_DFS_SHUFFLE_2, + DRAM_DFS_SHUFFLE_3, + DRAM_DFS_SHUFFLE_4, + DRAM_DFS_SHUFFLE_5, + DRAM_DFS_SHUFFLE_6, + DRAM_DFS_SHUFFLE_7, + DRAM_DFS_SHUFFLE_MAX, +} DRAM_DFS_SHUFFLE_TYPE_T; + +/* + * Internal CBT mode enum + * 1. Calibration flow uses vGet_Dram_CBT_Mode to + * differentiate between mixed vs non-mixed LP4 + * 2. Declared as dram_cbt_mode[RANK_MAX] internally to + * store each rank's CBT mode type + */ +typedef enum { + CBT_NORMAL_MODE = 0, + CBT_BYTE_MODE1, +} DRAM_CBT_MODE_T; + +#define DRAM_DFS_SHU_MAX DRAM_DFS_SHUFFLE_MAX + +#define DQS_NUMBER_LP4 2 +#define DQS_BIT_NUMBER 8 +#define DQ_DATA_WIDTH_LP4 16 + +#endif /* __SOC_MEDIATEK_MT8195_DRAMC_SOC_H__ */ diff --git a/src/soc/mediatek/mt8195/include/soc/emi.h b/src/soc/mediatek/mt8195/include/soc/emi.h deleted file mode 100644 index 33ff1bf..0000000 --- a/src/soc/mediatek/mt8195/include/soc/emi.h +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef SOC_MEDIATEK_MT8195_EMI_H -#define SOC_MEDIATEK_MT8195_EMI_H - -#include <stddef.h> - -size_t sdram_size(void); - -#endif /* SOC_MEDIATEK_MT8195_EMI_H */ -- To view, visit https://review.coreboot.org/c/coreboot/+/54229 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I89b87be62c8e88ae4a620d56aa7a35e47f97952d Gerrit-Change-Number: 54229 Gerrit-PatchSet: 1 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidi.lin(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidi.lin(a)mediatek.com> Gerrit-MessageType: newchange

1 0

Change in coreboot[master]: soc/mediatek/mt8195: enable ARM64_USE_ARM_TRUSTED_FIRMWARE
by Rex-BC Chen (Code Review) 13 May '21

13 May '21

Attention is currently required from: Hung-Te Lin, Paul Menzel, Rex-BC Chen. Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu, Yidi Lin, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/53898 to look at the new patch set (#5). Change subject: soc/mediatek/mt8195: enable ARM64_USE_ARM_TRUSTED_FIRMWARE ...................................................................... soc/mediatek/mt8195: enable ARM64_USE_ARM_TRUSTED_FIRMWARE Enable ATF configuration to support multi-core. TEST=boot to kernel with multi-core support. BUG=b:177593590 Signed-off-by: Yidi Lin <yidi.lin(a)mediatek.com> Change-Id: Id1ef29894fa3a6022574c3874dee62617133b12c --- M src/soc/mediatek/mt8195/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/53898/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/53898 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id1ef29894fa3a6022574c3874dee62617133b12c Gerrit-Change-Number: 53898 Gerrit-PatchSet: 5 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidi.lin(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: mb/google/brya: enable DPTF functionality for brya
by Sumeet R Pawnikar (Code Review) 13 May '21

13 May '21

Attention is currently required from: V Sowmya, John Su, Furquan Shaikh, Tim Wawrzynczak. Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52859 ) Change subject: mb/google/brya: enable DPTF functionality for brya ...................................................................... Patch Set 4: (2 comments) Patchset: PS3: > Hi Sumeet […] I do not have permission to add/cc. I have requested Google team to add you and your team to this b:187911222. File src/mainboard/google/brya/variants/brya0/overridetree.cb: https://review.coreboot.org/c/coreboot/+/52859/comment/00883fdd_b65894d8 PS3, Line 14: Ambient > 👍 Done -- To view, visit https://review.coreboot.org/c/coreboot/+/52859 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I33266c85aa30869466034ccbab04a3c7820ae2b0 Gerrit-Change-Number: 52859 Gerrit-PatchSet: 4 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alan Lee <alan_lee(a)compal.corp-partner.google.com> Gerrit-CC: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Ivy Jian <ivy_jian(a)compal.corp-partner.google.com> Gerrit-CC: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: V Sowmya <v.sowmya(a)intel.com> Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Thu, 13 May 2021 07:41:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: John Su <john_su(a)compal.corp-partner.google.com> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/mediatek: Remove duplicate enum declaration
by Xi Chen (Code Review) 13 May '21

13 May '21

Attention is currently required from: Hung-Te Lin, Rex-BC Chen. Xi Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54209 ) Change subject: soc/mediatek: Remove duplicate enum declaration ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/54209 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idc4a3887c9cc3f77cbdd7282e2977f6df858817d Gerrit-Change-Number: 54209 Gerrit-PatchSet: 1 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Thu, 13 May 2021 07:31:46 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/alderlake: Update CPU and IGD Device IDs
by Subrata Banik (Code Review) 13 May '21

13 May '21

Attention is currently required from: Furquan Shaikh, Maulik V Vaghela, Tim Wawrzynczak, Patrick Rudolph. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54211 ) Change subject: soc/intel/alderlake: Update CPU and IGD Device IDs ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/54211 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2759a41a0db1eba5d159edfc89460992914fcc3c Gerrit-Change-Number: 54211 Gerrit-PatchSet: 2 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-CC: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-CC: V Sowmya <v.sowmya(a)intel.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 13 May 2021 07:28:37 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb/google/brya: enable DPTF functionality for brya
by Sumeet R Pawnikar (Code Review) 13 May '21

13 May '21

Attention is currently required from: V Sowmya, Furquan Shaikh, Sumeet R Pawnikar. Hello V Sowmya, build bot (Jenkins), Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52859 to look at the new patch set (#4). Change subject: mb/google/brya: enable DPTF functionality for brya ...................................................................... mb/google/brya: enable DPTF functionality for brya Enable DPTF functionality for Alder Lake based brya BRANCH=None BUG=None TEST=Built and tested on brya board Change-Id: I33266c85aa30869466034ccbab04a3c7820ae2b0 Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> --- M src/mainboard/google/brya/Kconfig M src/mainboard/google/brya/variants/baseboard/devicetree.cb M src/mainboard/google/brya/variants/brya0/overridetree.cb 3 files changed, 90 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/52859/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/52859 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I33266c85aa30869466034ccbab04a3c7820ae2b0 Gerrit-Change-Number: 52859 Gerrit-PatchSet: 4 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alan Lee <alan_lee(a)compal.corp-partner.google.com> Gerrit-CC: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Ivy Jian <ivy_jian(a)compal.corp-partner.google.com> Gerrit-CC: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: V Sowmya <v.sowmya(a)intel.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: tests: Add lib/spd_cache-test test case
by Jakub Czapiga (Code Review) 13 May '21

13 May '21

Attention is currently required from: Jakub Czapiga, Jan Dabros. Hello build bot (Jenkins), Paul Fagerburg, Jan Dabros, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52938 to look at the new patch set (#5). Change subject: tests: Add lib/spd_cache-test test case ...................................................................... tests: Add lib/spd_cache-test test case Signed-off-by: Jakub Czapiga <jacz(a)semihalf.com> Change-Id: Ic9a1420e49e1e80d180117c931e630e54c90cd75 --- A tests/include/tests/lib/spd_cache_data.h M tests/lib/Makefile.inc A tests/lib/spd_cache-test.c 3 files changed, 387 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/52938/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/52938 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic9a1420e49e1e80d180117c931e630e54c90cd75 Gerrit-Change-Number: 52938 Gerrit-PatchSet: 5 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Jan Dabros <jsd(a)semihalf.com> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Jan Dabros <jsd(a)semihalf.com> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: soc/mediatek/mt8195: enable ARM64_USE_ARM_TRUSTED_FIRMWARE
by Yu-Ping Wu (Code Review) 13 May '21

13 May '21

Attention is currently required from: Hung-Te Lin, Paul Menzel, Rex-BC Chen. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/53898 ) Change subject: soc/mediatek/mt8195: enable ARM64_USE_ARM_TRUSTED_FIRMWARE ...................................................................... Patch Set 4: (1 comment) Patchset: PS3: > @yupingso is there any progress for this patch? I've sent out a mail internally asking how to update 3rdparty/arm-trusted-firmware. Still waiting for their reply... -- To view, visit https://review.coreboot.org/c/coreboot/+/53898 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id1ef29894fa3a6022574c3874dee62617133b12c Gerrit-Change-Number: 53898 Gerrit-PatchSet: 4 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidi.lin(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Thu, 13 May 2021 06:55:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/mediatek: Remove duplicate enum declaration
by Yu-Ping Wu (Code Review) 13 May '21

13 May '21

Attention is currently required from: Hung-Te Lin, Rex-BC Chen. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54209 ) Change subject: soc/mediatek: Remove duplicate enum declaration ...................................................................... Patch Set 1: Code-Review+2 (1 comment) Commit Message: PS1: Please upload a similar patch for mtk-dramk repo. -- To view, visit https://review.coreboot.org/c/coreboot/+/54209 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idc4a3887c9cc3f77cbdd7282e2977f6df858817d Gerrit-Change-Number: 54209 Gerrit-PatchSet: 1 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Thu, 13 May 2021 06:52:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit May 2021