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Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/51982
to look at the new patch set (#4).
Change subject: security/intel/cbnt: Allow for an externally provided bg-prov bin
......................................................................
security/intel/cbnt: Allow for an externally provided bg-prov bin
Building the bg-prov tool requires godeps which does not work if
offline. Therefor add an option to provide this binary via Kconfig.
It's the responsibility of the user to use a compatible binary then.
Change-Id: I06ff4ee01bf58cae45648ddb8a30a30b9a7e027a
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/security/intel/cbnt/Kconfig
M src/security/intel/cbnt/Makefile.inc
2 files changed, 22 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/51982/4
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Gerrit-Change-Number: 51982
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Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51197 )
Change subject: vc/amd/fsp/cezanne: add platform_descriptors.h
......................................................................
Patch Set 10:
(1 comment)
File src/vendorcode/amd/fsp/cezanne/platform_descriptors.h:
https://review.coreboot.org/c/coreboot/+/51197/comment/1e4d7e0a_79a51db5
PS10, Line 196: Currently unused by FSP
Based on Matt's comment, I infer this should change too.
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Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52028 )
Change subject: vc/amd/fsp/picasso/platform_descriptors: fix typos in enum element names
......................................................................
Patch Set 1: Code-Review+2
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Change subject: mb/facebook/fbg1701/vboot-rw.fmd: Expand RO_SECTION
......................................................................
Patch Set 1: Code-Review+2
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Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/51958 )
Change subject: soc/amd/cezanne: Add device tree support for I2C
......................................................................
soc/amd/cezanne: Add device tree support for I2C
This allows the cr50 on guybrush to show up in ACPI.
BUG=b:183737011
TEST=Boot OS and see I2C devices initialized
Signed-off-by: Raul E Rangel <rrangel(a)chromium.org>
Change-Id: Ifb5679b7bbefbf753217981874bb1bdaef35f6db
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51958
Reviewed-by: Karthik Ramasubramanian <kramasub(a)google.com>
Reviewed-by: Mathew King <mathewk(a)chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd(a)gmail.com>
Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M src/soc/amd/cezanne/chip.c
1 file changed, 8 insertions(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
Felix Held: Looks good to me, approved
Marshall Dawson: Looks good to me, approved
Karthik Ramasubramanian: Looks good to me, approved
Mathew King: Looks good to me, approved
diff --git a/src/soc/amd/cezanne/chip.c b/src/soc/amd/cezanne/chip.c
index 2612243..c2d7af7 100644
--- a/src/soc/amd/cezanne/chip.c
+++ b/src/soc/amd/cezanne/chip.c
@@ -10,6 +10,8 @@
#include <types.h>
#include "chip.h"
+/* Supplied by i2c.c */
+extern struct device_operations soc_amd_i2c_mmio_ops;
/* Supplied by uart.c */
extern struct device_operations cezanne_uart_mmio_ops;
@@ -42,6 +44,12 @@
static void set_mmio_dev_ops(struct device *dev)
{
switch (dev->path.mmio.addr) {
+ case APU_I2C0_BASE:
+ case APU_I2C1_BASE:
+ case APU_I2C2_BASE:
+ case APU_I2C3_BASE:
+ dev->ops = &soc_amd_i2c_mmio_ops;
+ break;
case APU_UART0_BASE:
case APU_UART1_BASE:
dev->ops = &cezanne_uart_mmio_ops;
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