coreboot-gerrit April 2021

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Change in coreboot[master]: mb/google/zork/var/vilboz: Update WiFi SAR for Vilboz/Vilboz360 LTE
by Frank Wu (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Martin Roth, Isaac Lee, Eric Peers. Frank Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51935 ) Change subject: mb/google/zork/var/vilboz: Update WiFi SAR for Vilboz/Vilboz360 LTE ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: Hi Google, Would you help to merge the CL? Thank you. -- To view, visit https://review.coreboot.org/c/coreboot/+/51935 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I37a40456970e3f1dc8b2eed26aa23e3d75748222 Gerrit-Change-Number: 51935 Gerrit-PatchSet: 2 Gerrit-Owner: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Isaac Lee <isaaclee(a)google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alan Lee <alan_lee(a)compal.corp-partner.google.com> Gerrit-CC: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Isaac Lee <isaaclee(a)google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Comment-Date: Tue, 06 Apr 2021 02:14:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek: add new driver 'msdc' for eMMC
by Hung-Te Lin (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Wenbin Mei. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51966 ) Change subject: soc/mediatek: add new driver 'msdc' for eMMC ...................................................................... Patch Set 5: (1 comment) File src/soc/mediatek/common/include/soc/msdc.h: https://review.coreboot.org/c/coreboot/+/51966/comment/1d54285a_92571e8d PS5, Line 18: #define MSDC_CFG 0x0 : #define MSDC_IOCON 0x04 : #define MSDC_PS 0x08 : #define MSDC_INT 0x0c : #define MSDC_INTEN 0x10 : #define MSDC_FIFOCS 0x14 : #define MSDC_TXDATA 0x18 : #define MSDC_RXDATA 0x1c : #define SDC_CFG 0x30 : #define SDC_CMD 0x34 : #define SDC_ARG 0x38 : #define SDC_STS 0x3c : #define SDC_RESP0 0x40 : #define SDC_RESP1 0x44 : #define SDC_RESP2 0x48 : #define SDC_RESP3 0x4c : #define SDC_BLK_NUM 0x50 : #define SDC_ADV_CFG0 0x64 : #define EMMC_IOCON 0x7c : #define SDC_ACMD_RESP 0x80 : #define DMA_SA_H4BIT 0x8c : #define MSDC_DMA_SA 0x90 : #define MSDC_DMA_CTRL 0x98 : #define MSDC_DMA_CFG 0x9c : #define MSDC_PATCH_BIT 0xb0 : #define MSDC_PATCH_BIT1 0xb4 : #define MSDC_PATCH_BIT2 0xb8 : #define MSDC_PAD_TUNE 0xec : #define MSDC_PAD_TUNE0 0xf0 : #define PAD_DS_TUNE 0x188 : #define PAD_CMD_TUNE 0x18c : #define EMMC51_CFG0 0x204 : #define EMMC50_CFG0 0x208 : #define EMMC50_CFG1 0x20c : #define EMMC50_CFG3 0x220 : #define SDC_FIFO_CFG 0x228 : Will you consider changing this to a struct? struct msdc_regs { u32 cfg; u32 iocon; ... } -- To view, visit https://review.coreboot.org/c/coreboot/+/51966 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I54a7749ed167c00cd631a76af7c67c654c7bc725 Gerrit-Change-Number: 51966 Gerrit-PatchSet: 5 Gerrit-Owner: Wenbin Mei <wenbin.mei(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidi.lin(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Wenbin Mei <wenbin.mei(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Tue, 06 Apr 2021 01:34:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek: add new driver 'msdc' for eMMC
by Hung-Te Lin (Code Review) 06 Apr '21

06 Apr '21

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Change in coreboot[master]: soc/mediatek: add new driver 'msdc' for eMMC
by Hung-Te Lin (Code Review) 06 Apr '21

06 Apr '21

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Change in coreboot[master]: mb/google/volteer/var/lindar: Increase Goodix touchscreen reset delay...
by Zhuohao Lee (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Kevin Chang, Paul Menzel, Nick Vaccaro. Zhuohao Lee has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51739 ) Change subject: mb/google/volteer/var/lindar: Increase Goodix touchscreen reset delay to 180 ms ...................................................................... Patch Set 6: (1 comment) Patchset: PS6: Hi Tim/Nick, could we merge this patch? -- To view, visit https://review.coreboot.org/c/coreboot/+/51739 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I82222ca094eead7e9e691857e128243cfe7c310e Gerrit-Change-Number: 51739 Gerrit-PatchSet: 6 Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com> Gerrit-CC: Lauren Ting <lauren.ting(a)lcfc.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Tue, 06 Apr 2021 01:11:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: Lindar/Lillipup: Enable Bayhub SD card reader power-saving mode
by Zhuohao Lee (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Kevin Chang, Nick Vaccaro. Zhuohao Lee has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51623 ) Change subject: Lindar/Lillipup: Enable Bayhub SD card reader power-saving mode ...................................................................... Patch Set 4: (1 comment) Patchset: PS4: Hi Tim/Nick, could we merge this patch? -- To view, visit https://review.coreboot.org/c/coreboot/+/51623 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I923d6e1beacd007c0e501f39c1f434c3e1085b9e Gerrit-Change-Number: 51623 Gerrit-PatchSet: 4 Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com> Gerrit-CC: Lauren Ting <lauren.ting(a)lcfc.corp-partner.google.com> Gerrit-Attention: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Tue, 06 Apr 2021 01:11:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush: Add aux PCIe reset GPIOs to dxio descriptors
by Martin Roth (Code Review) 05 Apr '21

05 Apr '21

Martin Roth has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/52114 ) Change subject: mb/google/guybrush: Add aux PCIe reset GPIOs to dxio descriptors ...................................................................... mb/google/guybrush: Add aux PCIe reset GPIOs to dxio descriptors pcie_rst isn't working correctly, so use the AUX resets to reset the PCIe devices before training. BUG=b:182202136 TEST=See PCIe devices train & enumerate Change-Id: I6db21c79dcbd40c7a8c3f01c60b02882a3851278 Signed-off-by: Martin Roth <martinroth(a)chromium.org> --- M src/mainboard/google/guybrush/port_descriptors.c 1 file changed, 5 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/52114/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52114 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6db21c79dcbd40c7a8c3f01c60b02882a3851278 Gerrit-Change-Number: 52114 Gerrit-PatchSet: 2 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/guybrush: PCIe GPIOs - enable enables, disable resets
by Martin Roth (Code Review) 05 Apr '21

05 Apr '21

Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52115 ) Change subject: mb/google/guybrush: PCIe GPIOs - enable enables, disable resets ...................................................................... mb/google/guybrush: PCIe GPIOs - enable enables, disable resets To train PCIe devices, the devices need to be enabled and taken out of reset. Copy the enables for WWAN & WLAN into early GPIO Init so that they're enabled before FSP-M runs and trains the PCIe busses. BUG=b:182202136 TEST=Boot guybrush from NVME. Signed-off-by: Martin Roth <martinroth(a)chromium.org> Change-Id: I3807e02de1e9ae40b0a4162217afd6aabb5b04ed --- M src/mainboard/google/guybrush/variants/baseboard/gpio.c 1 file changed, 16 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/52115/1 diff --git a/src/mainboard/google/guybrush/variants/baseboard/gpio.c b/src/mainboard/google/guybrush/variants/baseboard/gpio.c index 719590f..4f04c08 100644 --- a/src/mainboard/google/guybrush/variants/baseboard/gpio.c +++ b/src/mainboard/google/guybrush/variants/baseboard/gpio.c @@ -20,11 +20,11 @@ /* EN_PP5000_PEN */ PAD_GPO(GPIO_5, LOW), /* EN_PP3300_WLAN */ - PAD_GPO(GPIO_6, LOW), + PAD_GPO(GPIO_6, HIGH), /* EN_PP3300_TCHPAD */ PAD_GPO(GPIO_7, HIGH), /* EN_PWR_WWAN_X */ - PAD_GPO(GPIO_8, LOW), + PAD_GPO(GPIO_8, HIGH), /* SOC_TCHPAD_INT_ODL */ PAD_INT(GPIO_9, PULL_NONE, EDGE_HIGH, STATUS_DELIVERY), /* S0A3 */ @@ -51,7 +51,7 @@ /* AC_PRES */ PAD_NF(GPIO_23, AC_PRES, PULL_UP), /* WWAN_RST_L */ - PAD_GPO(GPIO_24, LOW), + PAD_GPO(GPIO_24, HIGH), /* GPIO_25: Not available */ /* PCIE_RST0_L */ /* TODO: change back to PCIE_RST_L when we figure out why PCIE_RST doesn't go high. */ @@ -60,7 +60,7 @@ PAD_NF(GPIO_27, PCIE_RST1_L, PULL_NONE), /* GPIO_28: Not available */ /* WLAN_AUX_RESET */ - PAD_GPO(GPIO_29, HIGH), + PAD_GPO(GPIO_29, LOW), /* ESPI_CS_L */ PAD_NF(GPIO_30, ESPI_CS_L, PULL_NONE), /* SPI_CS3_L */ @@ -69,7 +69,7 @@ PAD_GPO(GPIO_32, LOW), /* GPIO_33 - GPIO_39: Not available */ /* SSD_AUX_RESET_L */ - PAD_GPO(GPIO_40, LOW), + PAD_GPO(GPIO_40, HIGH), /* GPIO_41: Not available */ /* WWAN_DPR_SAR_ODL */ PAD_GPO(GPIO_42, LOW), @@ -81,7 +81,7 @@ /* EN_SPKR */ PAD_GPO(GPIO_69, LOW), /* SD_AUX_RESET_L */ - PAD_GPO(GPIO_70, LOW), + PAD_GPO(GPIO_70, HIGH), /* GPIO_71 - GPIO_73: Not available */ /* RAM_ID_CHAN_SEL */ PAD_GPI(GPIO_74, PULL_NONE), @@ -93,7 +93,7 @@ /* EC_SOC_INT_ODL */ PAD_GPI(GPIO_84, PULL_NONE), /* WWAN_DISABLE */ - PAD_GPO(GPIO_85, HIGH), + PAD_GPO(GPIO_85, LOW), /* ESPI_SOC_CLK */ PAD_NF(GPIO_86, SPI_CLK, PULL_NONE), /* RAM_ID_1 / DEV_BEEP_DATA */ @@ -139,7 +139,7 @@ /* SOC_DISABLE_DISP_BL */ PAD_GPO(GPIO_129, LOW), /* WLAN_DISABLE */ - PAD_GPO(GPIO_130, HIGH), + PAD_GPO(GPIO_130, LOW), /* CLK_REQ3_L */ PAD_NF(GPIO_131, CLK_REQ3_L, PULL_NONE), /* BT_DISABLE */ @@ -166,6 +166,14 @@ /* Early GPIO configuration */ static const struct soc_amd_gpio early_gpio_table[] = { + /* EN_PP3300_WLAN */ + PAD_GPO(GPIO_6, HIGH), + /* EN_PWR_WWAN_X */ + PAD_GPO(GPIO_8, HIGH), + /* WWAN_DISABLE */ + PAD_GPO(GPIO_85, LOW), + /* WLAN_DISABLE */ + PAD_GPO(GPIO_130, LOW), /* GSC_SOC_INT_L */ PAD_INT(GPIO_3, PULL_NONE, EDGE_LOW, STATUS_DELIVERY), /* I2C3_SCL */ -- To view, visit https://review.coreboot.org/c/coreboot/+/52115 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3807e02de1e9ae40b0a4162217afd6aabb5b04ed Gerrit-Change-Number: 52115 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/guybrush: Add aux PCIe reset GPIOs to dxio descriptors
by Martin Roth (Code Review) 05 Apr '21

05 Apr '21

Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52114 ) Change subject: mb/google/guybrush: Add aux PCIe reset GPIOs to dxio descriptors ...................................................................... mb/google/guybrush: Add aux PCIe reset GPIOs to dxio descriptors pcie_rst isn't working correctly, so use the AUX resets to reset the PCIe devices before training. BUG=b:182202136 TEST=See PCIe devices train & enumerate Change-Id: I6db21c79dcbd40c7a8c3f01c60b02882a3851278 --- M src/mainboard/google/guybrush/port_descriptors.c 1 file changed, 5 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/52114/1 diff --git a/src/mainboard/google/guybrush/port_descriptors.c b/src/mainboard/google/guybrush/port_descriptors.c index b0f4fa9..3227812 100644 --- a/src/mainboard/google/guybrush/port_descriptors.c +++ b/src/mainboard/google/guybrush/port_descriptors.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <soc/platform_descriptors.h> +#include <soc/gpio.h> #include <types.h> /* TODO: test if this really works */ @@ -14,6 +15,7 @@ .function_number = 1, .turn_off_unused_lanes = true, .clk_req = CLK_REQ0, + .gpio_group_id = GPIO_29, .port_params = {PP_PSPP_AC, 0x133, PP_PSPP_DC, 0x122} }, { /* SD */ @@ -25,6 +27,7 @@ .function_number = 2, .turn_off_unused_lanes = true, .clk_req = CLK_REQ1, + .gpio_group_id = GPIO_70, .port_params = {PP_PSPP_AC, 0x133, PP_PSPP_DC, 0x122} }, { /* WWAN */ @@ -36,6 +39,7 @@ .function_number = 3, .turn_off_unused_lanes = true, .clk_req = CLK_REQ2, + .gpio_group_id = GPIO_18, .port_params = {PP_PSPP_AC, 0x133, PP_PSPP_DC, 0x122} }, { /* NVME */ @@ -47,6 +51,7 @@ .function_number = 4, .turn_off_unused_lanes = true, .clk_req = CLK_REQ3, + .gpio_group_id = GPIO_40, .port_params = {PP_PSPP_AC, 0x133, PP_PSPP_DC, 0x122} } }; -- To view, visit https://review.coreboot.org/c/coreboot/+/52114 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6db21c79dcbd40c7a8c3f01c60b02882a3851278 Gerrit-Change-Number: 52114 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: decompressor: Add CBFS_VERIFICATION support
by Aaron Durbin (Code Review) 05 Apr '21

05 Apr '21

Attention is currently required from: Martin Roth, Furquan Shaikh, Julius Werner. Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52085 ) Change subject: decompressor: Add CBFS_VERIFICATION support ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52085 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2e6d7384cfb8339a24369eb6c01fc12f911c974e Gerrit-Change-Number: 52085 Gerrit-PatchSet: 2 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Mon, 05 Apr 2021 23:27:55 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit April 2021