coreboot-gerrit April 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mem_pool: Track the last two allocations (not just one)
by Aaron Durbin (Code Review) 05 Apr '21

05 Apr '21

Attention is currently required from: Furquan Shaikh, Julius Werner. Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52087 ) Change subject: mem_pool: Track the last two allocations (not just one) ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52087 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic5c4c56a8482752ed65e10cf35565f9b2d3e4b17 Gerrit-Change-Number: 52087 Gerrit-PatchSet: 1 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Mon, 05 Apr 2021 20:19:48 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: verstage: Add debug print when returning from verstage
by Aaron Durbin (Code Review) 05 Apr '21

05 Apr '21

Attention is currently required from: Furquan Shaikh, Julius Werner. Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52086 ) Change subject: verstage: Add debug print when returning from verstage ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52086 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ca68a32d7a50c95d9a6948d35816fee583611bc Gerrit-Change-Number: 52086 Gerrit-PatchSet: 1 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Mon, 05 Apr 2021 20:04:40 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: decompressor: Add CBFS_VERIFICATION support
by Aaron Durbin (Code Review) 05 Apr '21

05 Apr '21

Attention is currently required from: Martin Roth, Furquan Shaikh, Julius Werner. Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52085 ) Change subject: decompressor: Add CBFS_VERIFICATION support ...................................................................... Patch Set 1: Code-Review+2 (1 comment) File src/lib/metadata_hash.c: https://review.coreboot.org/c/coreboot/+/52085/comment/5c3e0a2a_bfacd203 PS1, Line 33: return &anchor_ptr->cbfs_hash; I know it's not likely (and much badness would have to occur), but do you think it's worth doing checks on anchor_ptr == NULL? -- To view, visit https://review.coreboot.org/c/coreboot/+/52085 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2e6d7384cfb8339a24369eb6c01fc12f911c974e Gerrit-Change-Number: 52085 Gerrit-PatchSet: 1 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Mon, 05 Apr 2021 20:04:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: WIP: Backlight enable patches.
by Martin Roth (Code Review) 05 Apr '21

05 Apr '21

Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52113 ) Change subject: WIP: Backlight enable patches. ...................................................................... WIP: Backlight enable patches. The change in smihandler.c shouldn't be needed, but the ACPI didn't seem to be doing the trick. Matt's looking into this. BUG=b:184198808 TEST=Backlight enabled in the OS Signed-off-by: Martin Roth <martinroth(a)chromium.org> Change-Id: I3e0a6c06120ac5abf0a0d82494e03d9cf80c1f8c --- M src/mainboard/google/guybrush/mainboard.c M src/mainboard/google/guybrush/smihandler.c M src/mainboard/google/guybrush/variants/baseboard/gpio.c 3 files changed, 65 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/52113/1 diff --git a/src/mainboard/google/guybrush/mainboard.c b/src/mainboard/google/guybrush/mainboard.c index 57f658c..3ad03a4 100644 --- a/src/mainboard/google/guybrush/mainboard.c +++ b/src/mainboard/google/guybrush/mainboard.c @@ -1,13 +1,23 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ +#include <acpi/acpi.h> +#include <acpi/acpigen.h> #include <amdblocks/amd_pci_util.h> #include <baseboard/variants.h> #include <device/device.h> +#include <gpio.h> #include <soc/acpi.h> #include <variant/ec.h> #include <vendorcode/google/chromeos/chromeos.h> -/* +#define BACKLIGHT_GPIO GPIO_129 +#define METHOD_BACKLIGHT_ENABLE "\\_SB.BKEN" +#define METHOD_BACKLIGHT_DISABLE "\\_SB.BKDS" +#define METHOD_MAINBOARD_INI "\\_SB.MINI" +#define METHOD_MAINBOARD_WAK "\\_SB.MWAK" +#define METHOD_MAINBOARD_PTS "\\_SB.MPTS" + +/*********************************************************** * These arrays set up the FCH PCI_INTR registers 0xC00/0xC01. * This table is responsible for physically routing the PIC and * IOAPIC IRQs to the different PCI devices on the system. It @@ -104,15 +114,62 @@ mainboard_ec_init(); } +static void mainboard_write_blken(void) +{ + acpigen_write_method(METHOD_BACKLIGHT_ENABLE, 0); + acpigen_soc_clear_tx_gpio(BACKLIGHT_GPIO); + acpigen_pop_len(); +} + +static void mainboard_write_blkdis(void) +{ + acpigen_write_method(METHOD_BACKLIGHT_DISABLE, 0); + acpigen_soc_set_tx_gpio(BACKLIGHT_GPIO); + acpigen_pop_len(); +} + +static void mainboard_write_mini(void) +{ + acpigen_write_method(METHOD_MAINBOARD_INI, 0); + acpigen_emit_namestring(METHOD_BACKLIGHT_ENABLE); + acpigen_pop_len(); +} + +static void mainboard_write_mwak(void) +{ + acpigen_write_method(METHOD_MAINBOARD_WAK, 0); + acpigen_emit_namestring(METHOD_BACKLIGHT_ENABLE); + acpigen_pop_len(); +} + +static void mainboard_write_mpts(void) +{ + acpigen_write_method(METHOD_MAINBOARD_PTS, 0); + acpigen_emit_namestring(METHOD_BACKLIGHT_DISABLE); + acpigen_pop_len(); +} + +static void mainboard_fill_ssdt(const struct device *dev) +{ + mainboard_write_blken(); + mainboard_write_blkdis(); + mainboard_write_mini(); + mainboard_write_mpts(); + mainboard_write_mwak(); +} + static void mainboard_enable(struct device *dev) { printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n"); dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; + dev->ops->acpi_fill_ssdt = mainboard_fill_ssdt; init_tables(); /* Initialize the PIRQ data structures for consumption */ pirq_setup(); + + } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/google/guybrush/smihandler.c b/src/mainboard/google/guybrush/smihandler.c index 6facb76..e1138fc 100644 --- a/src/mainboard/google/guybrush/smihandler.c +++ b/src/mainboard/google/guybrush/smihandler.c @@ -4,6 +4,7 @@ #include <cpu/x86/smm.h> #include <ec/google/chromeec/ec.h> #include <ec/google/chromeec/smm.h> +#include <gpio.h> #include <elog.h> #include <variant/ec.h> @@ -27,6 +28,11 @@ { chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS, MAINBOARD_EC_SMI_EVENTS); + /* Temporary fix - Needs to go into ACPI instead */ + /* Turn on the backlight when we go to ACPI mode */ + if (apmc == APM_CNT_ACPI_ENABLE) + gpio_set(GPIO_129, 0); + return 0; } diff --git a/src/mainboard/google/guybrush/variants/baseboard/gpio.c b/src/mainboard/google/guybrush/variants/baseboard/gpio.c index 719590f..ddd7ee3 100644 --- a/src/mainboard/google/guybrush/variants/baseboard/gpio.c +++ b/src/mainboard/google/guybrush/variants/baseboard/gpio.c @@ -137,7 +137,7 @@ PAD_GPO(GPIO_121, LOW), /* GPIO_122 - GPIO_128: Not available */ /* SOC_DISABLE_DISP_BL */ - PAD_GPO(GPIO_129, LOW), + PAD_GPO(GPIO_129, HIGH), /* WLAN_DISABLE */ PAD_GPO(GPIO_130, HIGH), /* CLK_REQ3_L */ -- To view, visit https://review.coreboot.org/c/coreboot/+/52113 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3e0a6c06120ac5abf0a0d82494e03d9cf80c1f8c Gerrit-Change-Number: 52113 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: vc/amd/fsp/picasso/platform_descriptors: fix typos in enum element names
by Martin Roth (Code Review) 05 Apr '21

05 Apr '21

Martin Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/52028 ) Change subject: vc/amd/fsp/picasso/platform_descriptors: fix typos in enum element names ...................................................................... vc/amd/fsp/picasso/platform_descriptors: fix typos in enum element names Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I5cad6a6a585320b33bfab7b3950888241f7c179c Reviewed-on: https://review.coreboot.org/c/coreboot/+/52028 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Raul Rangel <rrangel(a)chromium.org> --- M src/vendorcode/amd/fsp/picasso/platform_descriptors.h 1 file changed, 2 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved diff --git a/src/vendorcode/amd/fsp/picasso/platform_descriptors.h b/src/vendorcode/amd/fsp/picasso/platform_descriptors.h index 81293c6..717be1f 100644 --- a/src/vendorcode/amd/fsp/picasso/platform_descriptors.h +++ b/src/vendorcode/amd/fsp/picasso/platform_descriptors.h @@ -31,7 +31,7 @@ /* Upstream Auto Speed Change Allowed */ typedef enum { SPDC_DEFAULT = 0, // Enabled for Gen2 and Gen3 - SPDC_DISBLED, + SPDC_DISABLED, SPDC_ENABLED, SPDC_INVALID } dxio_upstream_auto_speed_change; @@ -105,7 +105,7 @@ EDP_TO_LVDS, // eDP-to-LVDS translator chip without AMD SW init EDP_TO_LVDS_SW, // eDP-to-LVDS translator which requires AMD SW init AUTO_DETECT, // VBIOS auto detect connector type - UNUSED_PTYPE, // UnusedType + UNUSED_TYPE, // UnusedType MAX_CONNECTOR_TYPE // Not valid value, used to verify input } ddi_connector_type; -- To view, visit https://review.coreboot.org/c/coreboot/+/52028 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5cad6a6a585320b33bfab7b3950888241f7c179c Gerrit-Change-Number: 52028 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/guybrush/var/guybrush: Add Codec and Speaker configration
by Martin Roth (Code Review) 05 Apr '21

05 Apr '21

Martin Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/52046 ) Change subject: mb/google/guybrush/var/guybrush: Add Codec and Speaker configration ...................................................................... mb/google/guybrush/var/guybrush: Add Codec and Speaker configration Enable I2C2 in devicetree and fill ACPI information for Codec and Speaker amplifiers. Pass correct IRQ GPIO for headset jack. BUG=None BRANCH=None TEST=Ensure that the Codec and Speaker Amplifiers are detected in i2cdetect. Change-Id: I1ae52a8bbaa0181c906cd14a94de22e0250ed4c1 Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52046 Reviewed-by: Furquan Shaikh <furquan(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/guybrush/variants/guybrush/overridetree.cb 1 file changed, 27 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved diff --git a/src/mainboard/google/guybrush/variants/guybrush/overridetree.cb b/src/mainboard/google/guybrush/variants/guybrush/overridetree.cb index 5f9b037..707a63f 100644 --- a/src/mainboard/google/guybrush/variants/guybrush/overridetree.cb +++ b/src/mainboard/google/guybrush/variants/guybrush/overridetree.cb @@ -71,4 +71,31 @@ device i2c 15 on end end end # I2C0 + + device ref i2c_2 on + chip drivers/i2c/generic + register "hid" = ""10EC5682"" + register "name" = ""RT58"" + register "desc" = ""Realtek RT5682"" + register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPIO_90)" + register "property_count" = "1" + register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" + register "property_list[0].name" = ""realtek,jd-src"" + register "property_list[0].integer" = "1" + device i2c 1a on end + end + chip drivers/i2c/generic + register "hid" = ""10EC1019"" + register "desc" = ""Realtek SPK AMP L"" + register "uid" = "0" + device i2c 28 on end + end + chip drivers/i2c/generic + register "hid" = ""10EC1019"" + register "desc" = ""Realtek SPK AMP R"" + register "uid" = "1" + device i2c 29 on end + end + end # I2C2 + end # chip soc/amd/cezanne -- To view, visit https://review.coreboot.org/c/coreboot/+/52046 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1ae52a8bbaa0181c906cd14a94de22e0250ed4c1 Gerrit-Change-Number: 52046 Gerrit-PatchSet: 3 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Mathew King <mathewk(a)chromium.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/guybrush: Add Bluetooth configuration
by Martin Roth (Code Review) 05 Apr '21

05 Apr '21

Martin Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/51963 ) Change subject: mb/google/guybrush: Add Bluetooth configuration ...................................................................... mb/google/guybrush: Add Bluetooth configuration Configure the BT disable GPIO to logic low in order to enable Bluetooth. Add USB ACPI configuration for BT device. BUG=b:182201890 TEST=Build and boot to OS. Change-Id: I647c301e2db6d4a7c5c8cb31cbc47a44cba5e734 Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51963 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Furquan Shaikh <furquan(a)google.com> --- M src/mainboard/google/guybrush/variants/baseboard/devicetree.cb M src/mainboard/google/guybrush/variants/baseboard/gpio.c 2 files changed, 2 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved diff --git a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb index b90ea0b..f5f9018 100644 --- a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb @@ -119,6 +119,7 @@ chip drivers/usb/acpi register "desc" = ""Bluetooth"" register "type" = "UPC_TYPE_INTERNAL" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_132)" device ref usb2_port6 on end end end diff --git a/src/mainboard/google/guybrush/variants/baseboard/gpio.c b/src/mainboard/google/guybrush/variants/baseboard/gpio.c index 05b57fc..719590f 100644 --- a/src/mainboard/google/guybrush/variants/baseboard/gpio.c +++ b/src/mainboard/google/guybrush/variants/baseboard/gpio.c @@ -143,7 +143,7 @@ /* CLK_REQ3_L */ PAD_NF(GPIO_131, CLK_REQ3_L, PULL_NONE), /* BT_DISABLE */ - PAD_GPO(GPIO_132, HIGH), + PAD_GPO(GPIO_132, LOW), /* UART1_TXD */ PAD_NF(GPIO_140, UART1_TXD, PULL_NONE), /* UART0_RXD */ -- To view, visit https://review.coreboot.org/c/coreboot/+/51963 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I647c301e2db6d4a7c5c8cb31cbc47a44cba5e734 Gerrit-Change-Number: 51963 Gerrit-PatchSet: 6 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Mathew King <mathewk(a)chromium.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/guybrush: Add Bluetooth configuration
by Karthik Ramasubramanian (Code Review) 05 Apr '21

05 Apr '21

Attention is currently required from: Raul Rangel, Martin Roth, Mathew King, Bhanu Prakash Maiya. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51963 ) Change subject: mb/google/guybrush: Add Bluetooth configuration ...................................................................... Patch Set 5: (1 comment) File src/mainboard/google/guybrush/variants/baseboard/devicetree.cb: https://review.coreboot.org/c/coreboot/+/51963/comment/888ab924_87250ead PS5, Line 122: reset_gpio > Does this also work for non-Intel wifi chips? I tried it on BT + WLAN module from Dalboz - reportedly from Qualcomm. Even that is not going to be part of the final product. Just used it for preliminary testing. -- To view, visit https://review.coreboot.org/c/coreboot/+/51963 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I647c301e2db6d4a7c5c8cb31cbc47a44cba5e734 Gerrit-Change-Number: 51963 Gerrit-PatchSet: 5 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Mathew King <mathewk(a)chromium.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Mathew King <mathewk(a)chromium.org> Gerrit-Attention: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-Comment-Date: Mon, 05 Apr 2021 19:46:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: 3rdparty/blobs: Update blobs pointer to f388b6794e6f
by Martin Roth (Code Review) 05 Apr '21

05 Apr '21

Attention is currently required from: Raul Rangel, Felix Held. Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52112 ) Change subject: 3rdparty/blobs: Update blobs pointer to f388b6794e6f ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52112 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I445d753c712670fe80efcdf29459736df2b76666 Gerrit-Change-Number: 52112 Gerrit-PatchSet: 2 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 05 Apr 2021 19:44:52 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/aldrvp: Update iDisp Link UPD settings
by Francois Toguo Fotso (Code Review) 05 Apr '21

05 Apr '21

Attention is currently required from: Sathyanarayana Nujella, Varshit B Pandya, Subrata Banik, Maulik V Vaghela, Paul Menzel, Ronak Kanabar, Jairaj Arava, Patrick Rudolph. Francois Toguo Fotso has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51353 ) Change subject: mb/intel/aldrvp: Update iDisp Link UPD settings ...................................................................... Patch Set 10: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/51353/comment/72da7902_fc1e9550 PS9, Line 9: 8T > Can you please add the reason for this change to commit message? Done Patchset: PS10: All comments addressed. -- To view, visit https://review.coreboot.org/c/coreboot/+/51353 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9d0bf7dc76348f7e184e8496f042badc30bf3211 Gerrit-Change-Number: 51353 Gerrit-PatchSet: 10 Gerrit-Owner: Francois Toguo Fotso <francois.toguo.fotso(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jairaj Arava <jairaj.arava(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Sathyanarayana Nujella <sathyanarayana.nujella(a)intel.com> Gerrit-Reviewer: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Sathyanarayana Nujella <sathyanarayana.nujella(a)intel.com> Gerrit-Attention: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Attention: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Jairaj Arava <jairaj.arava(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 05 Apr 2021 19:40:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

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coreboot-gerrit April 2021