coreboot-gerrit April 2021

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Change in coreboot[master]: [WIP] mb/google/guybrush/port_descriptors: add dummy descriptors
by Felix Held (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Matt Papageorge. Hello Matt Papageorge, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/52141 to review the following change. Change subject: [WIP] mb/google/guybrush/port_descriptors: add dummy descriptors ...................................................................... [WIP] mb/google/guybrush/port_descriptors: add dummy descriptors Signed-off-by: Matt Papageorge <matthewpapa07(a)gmail.com> Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Ie4c8ff8e827901112fd8b2e993898006bc133241 --- M src/mainboard/google/guybrush/port_descriptors.c 1 file changed, 22 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/52141/1 diff --git a/src/mainboard/google/guybrush/port_descriptors.c b/src/mainboard/google/guybrush/port_descriptors.c index 3227812..cc1fa1a 100644 --- a/src/mainboard/google/guybrush/port_descriptors.c +++ b/src/mainboard/google/guybrush/port_descriptors.c @@ -53,6 +53,28 @@ .clk_req = CLK_REQ3, .gpio_group_id = GPIO_40, .port_params = {PP_PSPP_AC, 0x133, PP_PSPP_DC, 0x122} + }, + { /* TODO: remove this temporay workaround */ + .engine_type = PCIE_ENGINE, + .port_present = true, + .start_logical_lane = 8, + .end_logical_lane = 11, + .device_number = 2, + .function_number = 5, + .turn_off_unused_lanes = true, + .clk_req = CLK_REQ5, + .port_params = {PP_PSPP_AC, 0x133, PP_PSPP_DC, 0x122} + }, + { /* TODO: remove this temporay workaround */ + .engine_type = PCIE_ENGINE, + .port_present = true, + .start_logical_lane = 16, + .end_logical_lane = 23, + .device_number = 1, + .function_number = 1, + .turn_off_unused_lanes = true, + .clk_req = CLK_REQ6, + .port_params = {PP_PSPP_AC, 0x133, PP_PSPP_DC, 0x122} } }; -- To view, visit https://review.coreboot.org/c/coreboot/+/52141 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie4c8ff8e827901112fd8b2e993898006bc133241 Gerrit-Change-Number: 52141 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-Attention: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/amd/majolica: add PCIe devices to devicetree
by Felix Held (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Jason Glenesk, Marshall Dawson. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52045 to look at the new patch set (#2). Change subject: mb/amd/majolica: add PCIe devices to devicetree ...................................................................... mb/amd/majolica: add PCIe devices to devicetree Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I838aeda2e6c403eaa3388a6b934e7ab6b4e918e3 --- M src/mainboard/amd/majolica/devicetree.cb 1 file changed, 7 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/52045/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52045 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I838aeda2e6c403eaa3388a6b934e7ab6b4e918e3 Gerrit-Change-Number: 52045 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/guybrush: add DXIO and DDI descriptors
by Felix Held (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Marshall Dawson, Matt Papageorge. Hello build bot (Jenkins), Matt Papageorge, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/51957 to look at the new patch set (#7). Change subject: mb/google/guybrush: add DXIO and DDI descriptors ...................................................................... mb/google/guybrush: add DXIO and DDI descriptors Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Signed-off-by: Matt Papageorge <matthewpapa07(a)gmail.com> Change-Id: Ic8a4349315f8759c79dc6b087b2a933c307cd573 --- M src/mainboard/google/guybrush/port_descriptors.c 1 file changed, 71 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/51957/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/51957 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic8a4349315f8759c79dc6b087b2a933c307cd573 Gerrit-Change-Number: 51957 Gerrit-PatchSet: 7 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-CC: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/amd/cezanne: Pass DXIO and DDI Descriptors to FSP
by Felix Held (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Martin Roth, Felix Held. Felix Held has uploaded a new patch set (#7) to the change originally created by Matt Papageorge. ( https://review.coreboot.org/c/coreboot/+/51948 ) Change subject: soc/amd/cezanne: Pass DXIO and DDI Descriptors to FSP ...................................................................... soc/amd/cezanne: Pass DXIO and DDI Descriptors to FSP This patch adds the functionality to write the DXIO and DDI descriptors to the UPD data structure to the SoC code and adds the mainboard_get_dxio_ddi_descriptors function to each mainboard using the Cezanne SoC that gets called to get the descriptors from the board code. Change-Id: I1cb36addcf0202cd56ce99e610a13d6d230bc981 Signed-off-by: Matt Papageorge <matthewpapa07(a)gmail.com> Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> --- M src/mainboard/amd/majolica/Makefile.inc A src/mainboard/amd/majolica/port_descriptors.c M src/mainboard/google/guybrush/Makefile.inc A src/mainboard/google/guybrush/port_descriptors.c M src/mainboard/google/mancomb/Makefile.inc A src/mainboard/google/mancomb/port_descriptors.c M src/soc/amd/cezanne/fsp_m_params.c A src/soc/amd/cezanne/include/soc/platform_descriptors.h 8 files changed, 126 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/51948/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/51948 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1cb36addcf0202cd56ce99e610a13d6d230bc981 Gerrit-Change-Number: 51948 Gerrit-PatchSet: 7 Gerrit-Owner: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: vc/amd/fsp/cezanne: update UPD headers
by Felix Held (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Furquan Shaikh, Marshall Dawson, Paul Menzel, Felix Held. Felix Held has uploaded a new patch set (#10) to the change originally created by Matt Papageorge. ( https://review.coreboot.org/c/coreboot/+/51806 ) Change subject: vc/amd/fsp/cezanne: update UPD headers ...................................................................... vc/amd/fsp/cezanne: update UPD headers The UPD header files get generated as part of the FSP build process. For the initial Cezanne development we took the Picasso UPD data structures as a starting point. This patch replaces it with the first version of the Cezanne-specific UPD data structures that is present in version 12 of the internal work-in-progress FSP binary drops. The serial_port_stride UPD-M field is removed, since the information is already given by serial_port_use_mmio. The stride is 4 bytes for the MMIO UART case and 1 byte for the legacy I/O case. BUG=b:182524631 TEST=NVMe works on google/guybrush when the rest of the patch train is applied as well. Change-Id: Idca235029bf2e68d403230d55308820cab61a6c0 Signed-off-by: Matt Papageorge <matthewpapa07(a)gmail.com> Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> --- M src/soc/amd/cezanne/fsp_m_params.c M src/soc/amd/cezanne/fsp_s_params.c M src/vendorcode/amd/fsp/cezanne/FspmUpd.h M src/vendorcode/amd/fsp/cezanne/FspsUpd.h 4 files changed, 109 insertions(+), 101 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/51806/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/51806 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idca235029bf2e68d403230d55308820cab61a6c0 Gerrit-Change-Number: 51806 Gerrit-PatchSet: 10 Gerrit-Owner: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: vc/amd/fsp/cezanne: add platform_descriptors.h
by Felix Held (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Justin Frodsham, Marshall Dawson, Felix Held. Hello build bot (Jenkins), Raul Rangel, Marshall Dawson, Nikolai Vyssotski, Matt Papageorge, Justin Frodsham, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/51197 to look at the new patch set (#13). Change subject: vc/amd/fsp/cezanne: add platform_descriptors.h ...................................................................... vc/amd/fsp/cezanne: add platform_descriptors.h Not sure if CLK_GPP_REQx in cpm_clk_req are valid options; left a TODO in the code for that. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Ib16f133b270c99c6e060e5bd0c156cbb03293474 --- A src/vendorcode/amd/fsp/cezanne/platform_descriptors.h 1 file changed, 218 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/51197/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/51197 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib16f133b270c99c6e060e5bd0c156cbb03293474 Gerrit-Change-Number: 51197 Gerrit-PatchSet: 13 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Justin Frodsham <justin.frodsham(a)protonmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-Reviewer: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Justin Frodsham <justin.frodsham(a)amd.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Justin Frodsham <justin.frodsham(a)amd.corp-partner.google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Justin Frodsham <justin.frodsham(a)protonmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake: Enable NPK/VISA for PCH and CPU tracing
by Subrata Banik (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Bora Guvendik, Anil Kumar K, Cliff Huang, Maulik V Vaghela, Bernardo Perez Priego, Thejaswani Putta, Patrick Rudolph. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52140 ) Change subject: soc/intel/alderlake: Enable NPK/VISA for PCH and CPU tracing ...................................................................... Patch Set 1: (1 comment) File src/mainboard/intel/adlrvp/Kconfig: https://review.coreboot.org/c/coreboot/+/52140/comment/c14e20f0_a4a519ae PS1, Line 65: SOC_INTEL_ALDERLAKE_DEBUG_CONSENT its already here https://github.com/coreboot/coreboot/blob/master/src/soc/intel/alderlake/Kc… if you want to override the value just do this config SOC_INTEL_ALDERLAKE_DEBUG_CONSENT int default 7 -- To view, visit https://review.coreboot.org/c/coreboot/+/52140 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I16086e3ce92c5d54fbeae9444c0608b31c1ad01e Gerrit-Change-Number: 52140 Gerrit-PatchSet: 1 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.corp-partner.google.com> Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Thejaswani Putta <thejaswani.putta(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.corp-partner.google.com> Gerrit-Attention: Thejaswani Putta <thejaswani.putta(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 06 Apr 2021 20:45:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: [WIP] mb/google/guybrush: add DXIO and DDI descriptors
by Felix Held (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Marshall Dawson, Matt Papageorge. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51957 ) Change subject: [WIP] mb/google/guybrush: add DXIO and DDI descriptors ...................................................................... Patch Set 6: (5 comments) File src/mainboard/google/guybrush/port_descriptors.c: https://review.coreboot.org/c/coreboot/+/51957/comment/8037c216_87c5c6ce PS3, Line 12: .device_number = 0, > iirc that will automatically select a working configuration. […] Done https://review.coreboot.org/c/coreboot/+/51957/comment/7f9631c7_2645b780 PS3, Line 23: device_number = 0 > 2. […] Done https://review.coreboot.org/c/coreboot/+/51957/comment/4d94cc0f_37f3db6c PS3, Line 34: device_number = 0, > 2. […] Done https://review.coreboot.org/c/coreboot/+/51957/comment/75b6c42a_24db0318 PS3, Line 45: device_number = 0, > 2. […] Done https://review.coreboot.org/c/coreboot/+/51957/comment/2773e65d_f7c1b8d3 PS3, Line 55: DDI_DP > Ok, but my previous comment still stands. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/51957 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic8a4349315f8759c79dc6b087b2a933c307cd573 Gerrit-Change-Number: 51957 Gerrit-PatchSet: 6 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-CC: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-Comment-Date: Tue, 06 Apr 2021 20:44:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Marshall Dawson <marshalldawson3rd(a)gmail.com> Comment-In-Reply-To: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush: PCIe GPIOs - enable enables, disable resets
by Martin Roth (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Furquan Shaikh. Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52115 ) Change subject: mb/google/guybrush: PCIe GPIOs - enable enables, disable resets ...................................................................... Patch Set 2: (2 comments) File src/mainboard/google/guybrush/variants/baseboard/gpio.c: https://review.coreboot.org/c/coreboot/+/52115/comment/7c047b42_38eef4a4 PS1, Line 54: HIGH > Wouldn't you run into issues during the bringup if you are not ensuring that the timings are met? It […] Not in my experience, no. Regardless, the timings are NOT a part of this patch and will not be handled as a part of this patch. This is getting the setting to what they should have been before the bringup started, and that is it. https://review.coreboot.org/c/coreboot/+/52115/comment/d4191ac8_7063693b PS1, Line 169: /* EN_PP3300_WLAN */ > > The early gpio init is getting moved from bootblock to psp_verstage. […] Yes, I absolutely agree with you. I'll get to that when I'm working on the other bug. -- To view, visit https://review.coreboot.org/c/coreboot/+/52115 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3807e02de1e9ae40b0a4162217afd6aabb5b04ed Gerrit-Change-Number: 52115 Gerrit-PatchSet: 2 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Comment-Date: Tue, 06 Apr 2021 20:18:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Comment-In-Reply-To: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: intel/tigerlake: Add Acoustic features
by Shaunak Saha (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Caveh Jalali, Duncan Laurie, Nick Vaccaro, Patrick Rudolph. Shaunak Saha has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50870 ) Change subject: intel/tigerlake: Add Acoustic features ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/50870/comment/35b1d8db_211850a6 PS3, Line 24: > Can you also please mention here that TGL has a single VR domain(Vccin)? Hence, the chip config is u […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/50870 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ica7f1f29995df33bdebb1fd55169cdb36f329ff8 Gerrit-Change-Number: 50870 Gerrit-PatchSet: 4 Gerrit-Owner: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <duncan(a)iceblink.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Duncan Laurie <duncan(a)iceblink.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 06 Apr 2021 20:09:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

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coreboot-gerrit April 2021