Attention is currently required from: Kevin Chang.
Hello build bot (Jenkins), Patrick Rudolph, Zhuohao Lee,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/51200
to look at the new patch set (#3).
Change subject: mb/google/volteer/variant/lindar: Disable SA GV for EVT build MB
......................................................................
mb/google/volteer/variant/lindar: Disable SA GV for EVT build MB
Disable SA GV in EVT MB, because some MB is using wrong Samsung date code memory.
BUG=b:179747696
BRANCH=firmware-volteer-13672.B
TEST=Built and booted into OS.
Signed-off-by: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com>
Change-Id: I51f4adcf0dd8dbf1cf39d8aec6e4303565551e5f
Signed-off-by: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com>
---
M src/mainboard/google/volteer/romstage.c
M src/mainboard/google/volteer/variants/lindar/memory.c
M src/soc/intel/tigerlake/include/soc/romstage.h
3 files changed, 15 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/51200/3
--
To view, visit https://review.coreboot.org/c/coreboot/+/51200
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I51f4adcf0dd8dbf1cf39d8aec6e4303565551e5f
Gerrit-Change-Number: 51200
Gerrit-PatchSet: 3
Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com>
Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com>
Gerrit-CC: Lauren Ting <lauren.ting(a)lcfc.corp-partner.google.com>
Gerrit-Attention: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com>
Gerrit-MessageType: newpatchset
Attention is currently required from: Kevin Chang.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51200 )
Change subject: mb/google/volteer/variant/lindar: Disable SA GV for EVT build MB
......................................................................
Patch Set 2:
(2 comments)
File src/mainboard/google/volteer/variants/lindar/memory.c:
https://review.coreboot.org/c/coreboot/+/51200/comment/a949718a_f8dec7d5
PS2, Line 72: if (google_chromeec_get_board_version(&board_version) == 0 && board_version == 1)
suspect code indent for conditional statements (8, 8)
File src/soc/intel/tigerlake/include/soc/romstage.h:
https://review.coreboot.org/c/coreboot/+/51200/comment/177fbcfb_fe3fb1a3
PS2, Line 10: void __weak memcfg_variant_init(FSPM_UPD *mupd);
Using weak declarations can have unintended link defects
--
To view, visit https://review.coreboot.org/c/coreboot/+/51200
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I51f4adcf0dd8dbf1cf39d8aec6e4303565551e5f
Gerrit-Change-Number: 51200
Gerrit-PatchSet: 2
Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com>
Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com>
Gerrit-CC: Lauren Ting <lauren.ting(a)lcfc.corp-partner.google.com>
Gerrit-Attention: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com>
Gerrit-Comment-Date: Wed, 03 Mar 2021 09:57:12 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Gerrit-MessageType: comment
Hello Patrick Rudolph, Zhuohao Lee,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/51200
to look at the new patch set (#2).
Change subject: mb/google/volteer/variant/lindar: Disable SA GV for EVT build MB
......................................................................
mb/google/volteer/variant/lindar: Disable SA GV for EVT build MB
Disable SA GV in EVT MB, because some MB is using wrong Samsung date code memory.
BUG=b:179747696
BRANCH=firmware-volteer-13672.B
TEST=Built and booted into OS.
Signed-off-by: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com>
Change-Id: I51f4adcf0dd8dbf1cf39d8aec6e4303565551e5f
Signed-off-by: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com>
---
M src/mainboard/google/volteer/romstage.c
M src/mainboard/google/volteer/variants/lindar/memory.c
M src/soc/intel/tigerlake/include/soc/romstage.h
3 files changed, 15 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/51200/2
--
To view, visit https://review.coreboot.org/c/coreboot/+/51200
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I51f4adcf0dd8dbf1cf39d8aec6e4303565551e5f
Gerrit-Change-Number: 51200
Gerrit-PatchSet: 2
Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com>
Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)chromium.org>
Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com>
Gerrit-CC: Lauren Ting <lauren.ting(a)lcfc.corp-partner.google.com>
Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-MessageType: newpatchset
Kevin Chang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51200 )
Change subject: mb/google/volteer/variant/lindar: Disable SA GV for EVT build MB
......................................................................
Patch Set 1:
This change is ready for review.
--
To view, visit https://review.coreboot.org/c/coreboot/+/51200
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I51f4adcf0dd8dbf1cf39d8aec6e4303565551e5f
Gerrit-Change-Number: 51200
Gerrit-PatchSet: 1
Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com>
Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)chromium.org>
Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com>
Gerrit-CC: Lauren Ting <lauren.ting(a)lcfc.corp-partner.google.com>
Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Comment-Date: Wed, 03 Mar 2021 09:49:56 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: No
Gerrit-MessageType: comment
zanxi chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/51201 )
Change subject: mb/google/dedede/var/blipper: Generate SPD ID for supported memory parts
......................................................................
mb/google/dedede/var/blipper: Generate SPD ID for supported memory parts
Add supported memory parts in the mem_parts_used.txt and generate the
SPD ID for the memory parts. The memory parts being added are:
MT53E512M32D2NP-046 WT:E
K4U6E3S4AA-MGCR
H9HCNNNBKMMLXR-NEE
BUG=None
TEST=Build the blipper board.
Change-Id: Ia7e4c1d5c06013c1902816d6dcafb5a8a0386bb3
Signed-off-by: Zanxi Chen <chenzanxi(a)huaqin.corp-partner.google.com>
---
M src/mainboard/google/dedede/variants/blipper/memory/Makefile.inc
M src/mainboard/google/dedede/variants/blipper/memory/dram_id.generated.txt
M src/mainboard/google/dedede/variants/blipper/memory/mem_parts_used.txt
3 files changed, 8 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/51201/1
diff --git a/src/mainboard/google/dedede/variants/blipper/memory/Makefile.inc b/src/mainboard/google/dedede/variants/blipper/memory/Makefile.inc
index b0ca222..d0960c7 100644
--- a/src/mainboard/google/dedede/variants/blipper/memory/Makefile.inc
+++ b/src/mainboard/google/dedede/variants/blipper/memory/Makefile.inc
@@ -1,5 +1,5 @@
## SPDX-License-Identifier: GPL-2.0-or-later
## This is an auto-generated file. Do not edit!!
-## Add memory parts in mem_parts_used.txt and run spd_tools to regenerate.
-SPD_SOURCES = placeholder.spd.hex
+SPD_SOURCES =
+SPD_SOURCES += lp4x-spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E, K4U6E3S4AA-MGCR, H9HCNNNBKMMLXR-NEE
diff --git a/src/mainboard/google/dedede/variants/blipper/memory/dram_id.generated.txt b/src/mainboard/google/dedede/variants/blipper/memory/dram_id.generated.txt
index fa24790..0df7bfc 100644
--- a/src/mainboard/google/dedede/variants/blipper/memory/dram_id.generated.txt
+++ b/src/mainboard/google/dedede/variants/blipper/memory/dram_id.generated.txt
@@ -1 +1,4 @@
DRAM Part Name ID to assign
+MT53E512M32D2NP-046 WT:E 0 (0000)
+K4U6E3S4AA-MGCR 0 (0000)
+H9HCNNNBKMMLXR-NEE 0 (0000)
diff --git a/src/mainboard/google/dedede/variants/blipper/memory/mem_parts_used.txt b/src/mainboard/google/dedede/variants/blipper/memory/mem_parts_used.txt
index e4258b5..47159f8 100644
--- a/src/mainboard/google/dedede/variants/blipper/memory/mem_parts_used.txt
+++ b/src/mainboard/google/dedede/variants/blipper/memory/mem_parts_used.txt
@@ -1,11 +1,3 @@
-# This is a CSV file containing a list of memory parts used by this variant.
-# One part per line with an optional fixed ID in column 2.
-# Only include a fixed ID if it is required for legacy reasons!
-# Generated IDs are dependent on the order of parts in this file,
-# so new parts must always be added at the end of the file!
-#
-# Generate an updated Makefile.inc and dram_id.generated.txt by running the
-# gen_part_id tool from util/spd_tools/{ddr4,lp4x}.
-# See util/spd_tools/{ddr4,lp4x}/README.md for more details and instructions.
-
-# Part Name
+MT53E512M32D2NP-046 WT:E
+K4U6E3S4AA-MGCR
+H9HCNNNBKMMLXR-NEE
--
To view, visit https://review.coreboot.org/c/coreboot/+/51201
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ia7e4c1d5c06013c1902816d6dcafb5a8a0386bb3
Gerrit-Change-Number: 51201
Gerrit-PatchSet: 1
Gerrit-Owner: zanxi chen <chenzanxi(a)huaqin.corp-partner.google.com>
Gerrit-MessageType: newchange
Attention is currently required from: Patrick Rudolph.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51200 )
Change subject: mb/google/volteer/variant/lindar: Disable SA GV for EVT build MB
......................................................................
Patch Set 1:
(2 comments)
File src/mainboard/google/volteer/variants/lindar/memory.c:
https://review.coreboot.org/c/coreboot/+/51200/comment/e6391d1f_2f74f024
PS1, Line 72: if (google_chromeec_get_board_version(&board_version) == 0
suspect code indent for conditional statements (8, 8)
File src/soc/intel/tigerlake/include/soc/romstage.h:
https://review.coreboot.org/c/coreboot/+/51200/comment/e70868b0_24c8d1bf
PS1, Line 10: void __weak memcfg_variant_init(FSPM_UPD *mupd);
Using weak declarations can have unintended link defects
--
To view, visit https://review.coreboot.org/c/coreboot/+/51200
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I51f4adcf0dd8dbf1cf39d8aec6e4303565551e5f
Gerrit-Change-Number: 51200
Gerrit-PatchSet: 1
Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com>
Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Comment-Date: Wed, 03 Mar 2021 09:48:27 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Gerrit-MessageType: comment
Attention is currently required from: Hung-Te Lin, Cindy Ching, Martin Roth, Shaoming Chen, Paul Menzel, Duan huayang.
Xi Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51125 )
Change subject: src/mediatek/mt8192: use Mediatek mt8192 vendor code (CB:50294)
......................................................................
Patch Set 13:
(2 comments)
Patchset:
PS12:
> this patch has too many things in one patch. Please split into: […]
I have created a new TOT, which process the patch split, will update the patchlist later.
PS12:
> also, the message macros (especially those related to 73/83) should be moved to a new patch.
Yes, will split the seperate patch.
--
To view, visit https://review.coreboot.org/c/coreboot/+/51125
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I2b2f41d774c6b85f106867144fb0b29a4a1bdfcf
Gerrit-Change-Number: 51125
Gerrit-PatchSet: 13
Gerrit-Owner: Xi Chen <xixi.chen(a)mediatek.com>
Gerrit-Reviewer: Cindy Ching <cindy.ching(a)mediatek.corp-partner.google.com>
Gerrit-Reviewer: Duan huayang <huayang.duan(a)mediatek.com>
Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org>
Gerrit-Reviewer: Martin Roth <martinroth(a)google.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com>
Gerrit-Reviewer: Shaoming Chen <shaoming.chen(a)mediatek.corp-partner.google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org>
Gerrit-Attention: Cindy Ching <cindy.ching(a)mediatek.corp-partner.google.com>
Gerrit-Attention: Martin Roth <martinroth(a)google.com>
Gerrit-Attention: Shaoming Chen <shaoming.chen(a)mediatek.corp-partner.google.com>
Gerrit-Attention: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Attention: Duan huayang <huayang.duan(a)mediatek.com>
Gerrit-Comment-Date: Wed, 03 Mar 2021 09:42:07 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Hung-Te Lin <hungte(a)chromium.org>
Gerrit-MessageType: comment
Attention is currently required from: CK HU.
Hello CK HU,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/51199
to review the following change.
Change subject: DO-NOT-SUBMIT: Asurada DRAM vendorcode ToT - Coreboot
......................................................................
DO-NOT-SUBMIT: Asurada DRAM vendorcode ToT - Coreboot
Signed-off-by: Xi Chen <xixi.chen(a)mediatek.com>
Change-Id: I46dd98961d40fadacb8f9285deb3a7fcec0b0c79
---
M 3rdparty/amd_blobs
M 3rdparty/blobs
M 3rdparty/intel-microcode
M 3rdparty/qc_blobs
M README.md
5 files changed, 5 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/51199/1
diff --git a/3rdparty/amd_blobs b/3rdparty/amd_blobs
index 302c9f6..6d49f8b 160000
--- a/3rdparty/amd_blobs
+++ b/3rdparty/amd_blobs
@@ -1 +1 @@
-Subproject commit 302c9f61488b2117f5315e4094ec044cc8ceb0ea
+Subproject commit 6d49f8b451536677289328be63890178a4f44d4b
diff --git a/3rdparty/blobs b/3rdparty/blobs
index 02ab6c6..df2853c 160000
--- a/3rdparty/blobs
+++ b/3rdparty/blobs
@@ -1 +1 @@
-Subproject commit 02ab6c66480ccd5f6bdfddd6fa090156d436fa4b
+Subproject commit df2853ce418efea5218c59cfe5f520deec2a8b4c
diff --git a/3rdparty/intel-microcode b/3rdparty/intel-microcode
index 49bb67f..ee319ae 160000
--- a/3rdparty/intel-microcode
+++ b/3rdparty/intel-microcode
@@ -1 +1 @@
-Subproject commit 49bb67f32a2e3e631ba1a9a73da1c52e1cac7fd9
+Subproject commit ee319ae7bc59e88b60142f40a9ec1b46656de4db
diff --git a/3rdparty/qc_blobs b/3rdparty/qc_blobs
index 6b7fe49..45b6c86 160000
--- a/3rdparty/qc_blobs
+++ b/3rdparty/qc_blobs
@@ -1 +1 @@
-Subproject commit 6b7fe498eb782b8f9758f28dd53bb0697be0d0b0
+Subproject commit 45b6c8618b729c1998606d605fc854f6ea7a5772
diff --git a/README.md b/README.md
index 14879c1..d2b1bc8 100644
--- a/README.md
+++ b/README.md
@@ -102,3 +102,4 @@
Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.
+
--
To view, visit https://review.coreboot.org/c/coreboot/+/51199
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I46dd98961d40fadacb8f9285deb3a7fcec0b0c79
Gerrit-Change-Number: 51199
Gerrit-PatchSet: 1
Gerrit-Owner: Xi Chen <xixi.chen(a)mediatek.com>
Gerrit-Reviewer: CK HU <ck.hu(a)mediatek.com>
Gerrit-Attention: CK HU <ck.hu(a)mediatek.com>
Gerrit-MessageType: newchange
Attention is currently required from: Xi Chen, Cindy Ching, Martin Roth, Shaoming Chen, Paul Menzel, Duan huayang.
Hello Hung-Te Lin, Cindy Ching, build bot (Jenkins), Patrick Georgi, Martin Roth, Shaoming Chen, Duan huayang,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/51125
to look at the new patch set (#13).
Change subject: src/mediatek/mt8192: use Mediatek mt8192 vendor code (CB:50294)
......................................................................
src/mediatek/mt8192: use Mediatek mt8192 vendor code (CB:50294)
Mediatek maintains the DRAM initialization code, the coding style
is different from coreboot, when CB:50294 is ready, soc/mediatek/mt8192
will not be used.
Signed-off-by: Xi Chen <xixi.chen(a)mediatek.com>
Change-Id: I2b2f41d774c6b85f106867144fb0b29a4a1bdfcf
---
M src/mainboard/google/asurada/boardid.c
M src/mainboard/google/asurada/sdram_configs.c
M src/mainboard/google/asurada/sdram_params/Makefile.inc
A src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-DISCRETE-1RANK-4GB.c
A src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-DISCRETE-2RANK-4GB.c
A src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-DISCRETE-2RANK-8GB-BYTE-MODE.c
A src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-DISCRETE-2RANK-8GB.c
A src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-EMCP-1RANK-4GB.c
A src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-EMCP-2RANK-4GB.c
A src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-EMCP-2RANK-8GB.c
A src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-KMDP6001DA-B425-4GB.c
A src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-KMDV6001DA-B620-4GB.c
M src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-MT29VZZZAD8GQFSL-046-4GB.c
M src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-MT29VZZZBD9DQKPR-046-6GB.c
A src/soc/mediatek/common/Kconfig
R src/soc/mediatek/common/dpm.c
A src/soc/mediatek/common/dram_init.c
R src/soc/mediatek/common/dramc_param.c
R src/soc/mediatek/common/include/soc/dpm.h
A src/soc/mediatek/common/include/soc/dramc_common.h
R src/soc/mediatek/common/include/soc/dramc_param.h
A src/soc/mediatek/common/include/soc/emi.h
R src/soc/mediatek/common/memory.c
M src/soc/mediatek/mt8173/Kconfig
M src/soc/mediatek/mt8173/dramc_pi_basic_api.c
M src/soc/mediatek/mt8173/dramc_pi_calibration_api.c
M src/soc/mediatek/mt8173/include/soc/dramc_pi_api.h
M src/soc/mediatek/mt8183/Kconfig
M src/soc/mediatek/mt8183/include/soc/dramc_pi_api.h
M src/soc/mediatek/mt8192/Kconfig
M src/soc/mediatek/mt8192/Makefile.inc
D src/soc/mediatek/mt8192/dramc_dvfs.c
D src/soc/mediatek/mt8192/dramc_pi_basic_api.c
D src/soc/mediatek/mt8192/dramc_pi_calibration_api.c
D src/soc/mediatek/mt8192/dramc_pi_main.c
D src/soc/mediatek/mt8192/dramc_utility.c
D src/soc/mediatek/mt8192/emi.c
D src/soc/mediatek/mt8192/include/soc/dramc_ac_timing.h
D src/soc/mediatek/mt8192/include/soc/dramc_common_mt8192.h
D src/soc/mediatek/mt8192/include/soc/dramc_pi_api.h
D src/soc/mediatek/mt8192/include/soc/dramc_register.h
D src/soc/mediatek/mt8192/include/soc/dramc_register_bits_def.h
A src/soc/mediatek/mt8192/include/soc/dramc_soc.h
D src/soc/mediatek/mt8192/include/soc/emi.h
M src/vendorcode/Makefile.inc
45 files changed, 524 insertions(+), 12,809 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/51125/13
--
To view, visit https://review.coreboot.org/c/coreboot/+/51125
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I2b2f41d774c6b85f106867144fb0b29a4a1bdfcf
Gerrit-Change-Number: 51125
Gerrit-PatchSet: 13
Gerrit-Owner: Xi Chen <xixi.chen(a)mediatek.com>
Gerrit-Reviewer: Cindy Ching <cindy.ching(a)mediatek.corp-partner.google.com>
Gerrit-Reviewer: Duan huayang <huayang.duan(a)mediatek.com>
Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org>
Gerrit-Reviewer: Martin Roth <martinroth(a)google.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com>
Gerrit-Reviewer: Shaoming Chen <shaoming.chen(a)mediatek.corp-partner.google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Attention: Xi Chen <xixi.chen(a)mediatek.com>
Gerrit-Attention: Cindy Ching <cindy.ching(a)mediatek.corp-partner.google.com>
Gerrit-Attention: Martin Roth <martinroth(a)google.com>
Gerrit-Attention: Shaoming Chen <shaoming.chen(a)mediatek.corp-partner.google.com>
Gerrit-Attention: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Attention: Duan huayang <huayang.duan(a)mediatek.com>
Gerrit-MessageType: newpatchset