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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49539 )
Change subject: nb/intel/pineview/bootblock.c: include <arch/pci_io_cfg.h>
......................................................................
Patch Set 3: Code-Review-1
(1 comment)
Patchset:
PS3:
`pci_ops.h` intentionally provides header-file abstraction,
cf. CB:50231. Please stop making people running around in
circles and jumping through hoops, and start documenting
and discussing instead. Otherwise you risk that your
patches have a negative impact on average.
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Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Martin Roth, Marshall Dawson, Chris Wang, EricR Lai, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/50212
to look at the new patch set (#6).
Change subject: soc/amd/picasso: clean up and re-sort UPD table
......................................................................
soc/amd/picasso: clean up and re-sort UPD table
Clean up the unused UPD and re-sort the table, and also update
the new phy parameter in the soc code and overridetree.
remove:
EDpPhySel
EDpVersion
rename:
DpPhyOverride -> edp_phy_override
EDpPhySel -> edp_physel
DpVsPemphLevel -> edp_dp_vs_pemph_level
MarginDeemPh -> edp_margin_deemph
Deemph6db4 -> edp_deemph_6db_4
BoostAdj -> edp_boost_adj
eDP phy setting:
DP_VS_LEVEL0_PREEMPH_LEVEL0 = 0x00(0.4v 0db swing 0,pre-emphasis 0)
COMMON_MAR_DEEMPH_NOM = 0x004b
COMMON_SELDEEMPH60 = 0x0
CMD_BUS_GLOBAL_FOR_TX_LANE0 = 0x80
BUG=b:171269338
BRANCH=zork
TEST=Build, verify the parameter pass to picasso-fsp
Signed-off-by: Chris Wang <chris.wang(a)amd.corp-partner.google.com>
Change-Id: I655af08e2f86398d088e30d330f49e71cf7e1275
---
M src/mainboard/google/zork/variants/vilboz/overridetree.cb
M src/soc/amd/picasso/chip.h
M src/soc/amd/picasso/fsp_params.c
M src/vendorcode/amd/fsp/picasso/FspsUpd.h
4 files changed, 37 insertions(+), 35 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/50212/6
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Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Martin Roth, Marshall Dawson, Chris Wang, EricR Lai, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/50212
to look at the new patch set (#5).
Change subject: soc/amd/picasso: clean up and re-sort UPD table
......................................................................
soc/amd/picasso: clean up and re-sort UPD table
Clean up the unused UPD and re-sort the table, and also update
the new phy parameter in the soc code and overridetree.
remove:
EDpPhySel
EDpVersion
rename:
DpPhyOverride -> edp_phy_override
EDpPhySel -> edp_physel
DpVsPemphLevel -> edp_dp_vs_pemph_level
MarginDeemPh -> edp_margin_deemph
Deemph6db4 -> edp_deemph_6db_4
BoostAdj -> edp_boost_adj
eDP phy setting:
DP_VS_LEVEL0_PREEMPH_LEVEL0 = 0x00 (0.4v 0db) swing 0, pre-emphasis 0)
COMMON_MAR_DEEMPH_NOM = 0x004b
COMMON_SELDEEMPH60 = 0x0
CMD_BUS_GLOBAL_FOR_TX_LANE0 = 0x80
BUG=b:171269338
BRANCH=zork
TEST=Build, verify the parameter pass to picasso-fsp
Signed-off-by: Chris Wang <chris.wang(a)amd.corp-partner.google.com>
Change-Id: I655af08e2f86398d088e30d330f49e71cf7e1275
---
M src/mainboard/google/zork/variants/vilboz/overridetree.cb
M src/soc/amd/picasso/chip.h
M src/soc/amd/picasso/fsp_params.c
M src/vendorcode/amd/fsp/picasso/FspsUpd.h
4 files changed, 37 insertions(+), 35 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/50212/5
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chris wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50212 )
Change subject: soc/amd/picasso: clean up and re-sort UPD table
......................................................................
Patch Set 4:
(1 comment)
File src/mainboard/google/zork/variants/vilboz/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/50212/comment/078892d4_94c49913
PS3, Line 34: .margin_deemph = 0x00CC,
> oh, you are right. Didn't notice this, should be lower case.
that should be typo. I had applied the correct value , and also update the phy setting on commit message.
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I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/50212
to look at the new patch set (#4).
Change subject: soc/amd/picasso: clean up and re-sort UPD table
......................................................................
soc/amd/picasso: clean up and re-sort UPD table
Clean up the unused UPD and re-sort the table, and also update
the new phy parameter in the soc code and overridetree.
remove:
EDpPhySel
EDpVersion
rename:
DpPhyOverride -> edp_phy_override
EDpPhySel -> edp_physel
DpVsPemphLevel -> edp_dp_vs_pemph_level
MarginDeemPh -> edp_margin_deemph
Deemph6db4 -> edp_deemph_6db_4
BoostAdj -> edp_boost_adj
eDP phy setting:
DP_VS_LEVEL0_PREEMPH_LEVEL0, = 0x00 (0.4v 0db) swing 0, pre-emphasis 0)
COMMON_MAR_DEEMPH_NOM = 0x004b
COMMON_SELDEEMPH60 = 0x0
CMD_BUS_GLOBAL_FOR_TX_LANE0 = 0x80
BUG=b:171269338
BRANCH=zork
TEST=Build, verify the parameter pass to picasso-fsp
Signed-off-by: Chris Wang <chris.wang(a)amd.corp-partner.google.com>
Change-Id: I655af08e2f86398d088e30d330f49e71cf7e1275
---
M src/mainboard/google/zork/variants/vilboz/overridetree.cb
M src/soc/amd/picasso/chip.h
M src/soc/amd/picasso/fsp_params.c
M src/vendorcode/amd/fsp/picasso/FspsUpd.h
4 files changed, 37 insertions(+), 35 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/50212/4
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Change subject: include/cbfs.h: Add comment for chain-includes of commonlib
......................................................................
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Change subject: include/cbfs.h: Add comment for chain-includes of commonlib
......................................................................
Patch Set 4: Code-Review-1
(1 comment)
Patchset:
PS4:
I am tempted to -2 works on indirect includes until something appears under Documentation/.
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