coreboot-gerrit February 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: drivers/generic/bayhub_lv2: Add driver for BayHub lv2
by Angel Pons (Code Review) 02 Feb '21

02 Feb '21

Attention is currently required from: Frank Wu, John Su, Furquan Shaikh, Martin Roth, Alan Lee, Ivy Jian. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49783 ) Change subject: drivers/generic/bayhub_lv2: Add driver for BayHub lv2 ...................................................................... Patch Set 8: Code-Review+1 (3 comments) File src/drivers/generic/bayhub_lv2/chip.h: https://review.coreboot.org/c/coreboot/+/49783/comment/f118eef2_1001fe4f PS8, Line 5: PCI PCIe? https://review.coreboot.org/c/coreboot/+/49783/comment/5bfdebf3_4bb5dffb PS8, Line 7: /* 1 to enable power-saving mode, 0 to disable */ : bool power_saving; I would rename the option to `enable_power_saving`, and drop the comment File src/drivers/generic/bayhub_lv2/lv2.h: https://review.coreboot.org/c/coreboot/+/49783/comment/9f0c0377_e786dd09 PS8, Line 3: PCI PCIe? -- To view, visit https://review.coreboot.org/c/coreboot/+/49783 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idc1340b1a6fe7063d16c8ea16488d6e2b8b308cc Gerrit-Change-Number: 49783 Gerrit-PatchSet: 8 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Alan Lee <alan_lee(a)compal.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Ivy Jian <ivy_jian(a)compal.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Peichao Wang <pwang12(a)lenovo.corp-partner.google.com> Gerrit-Attention: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Alan Lee <alan_lee(a)compal.corp-partner.google.com> Gerrit-Attention: Ivy Jian <ivy_jian(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Tue, 02 Feb 2021 15:41:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: nb/intel/x/bootblock.c Revert include <arch/pci_io_cfg.h>
by Kyösti Mälkki (Code Review) 02 Feb '21

02 Feb '21

Kyösti Mälkki has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/50229 ) Change subject: nb/intel/x/bootblock.c Revert include <arch/pci_io_cfg.h> ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/50229 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I562bf2cfd8c165338577a95c5c644cf5bea3a5c1 Gerrit-Change-Number: 50229 Gerrit-PatchSet: 2 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Damien Zammit Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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Change in coreboot[master]: nb/intel/x/bootblock.c Revert `include <arch/pci_io_cfg.h>`
by Kyösti Mälkki (Code Review) 02 Feb '21

02 Feb '21

Attention is currently required from: Damien Zammit, Angel Pons, Patrick Rudolph. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50231 ) Change subject: nb/intel/x/bootblock.c Revert `include <arch/pci_io_cfg.h>` ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Related changes on the topic: CB:31675 CB:49538 CB:50167 -- To view, visit https://review.coreboot.org/c/coreboot/+/50231 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifba05717dad404a844618815c5347a05e07a3362 Gerrit-Change-Number: 50231 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Damien Zammit Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Damien Zammit Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 02 Feb 2021 15:40:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: nb/intel/x/bootblock.c Revert include <arch/pci_io_cfg.h>
by Kyösti Mälkki (Code Review) 02 Feb '21

02 Feb '21

Attention is currently required from: Furquan Shaikh, Damien Zammit, Angel Pons, Julius Werner, Patrick Rudolph, HAOUAS Elyes. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50229 ) Change subject: nb/intel/x/bootblock.c Revert include <arch/pci_io_cfg.h> ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/50229/comment/fd0a3074_2fc09916 PS2, Line 20: to be an exception to this. > Under Documentstion/, no. Related changes on the topic: […] Not 49358, CB:49538 -- To view, visit https://review.coreboot.org/c/coreboot/+/50229 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I562bf2cfd8c165338577a95c5c644cf5bea3a5c1 Gerrit-Change-Number: 50229 Gerrit-PatchSet: 2 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Damien Zammit Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Damien Zammit Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Comment-Date: Tue, 02 Feb 2021 15:38:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/{skylake,cannonlake}: Co-ordinate lockdown configuration
by Nico Huber (Code Review) 02 Feb '21

02 Feb '21

Attention is currently required from: Benjamin Doron, Angel Pons, Patrick Rudolph. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50048 ) Change subject: soc/intel/{skylake,cannonlake}: Co-ordinate lockdown configuration ...................................................................... Patch Set 5: (1 comment) File src/soc/intel/skylake/chip.c: https://review.coreboot.org/c/coreboot/+/50048/comment/9a8ee7d1_9a703b83 PS5, Line 332: } The (implicit) else case would change depending on the defaults in the FSP binary. Is this change intended? If yes, how to test / verify it? If we can't, why do we drag get_lockdown_config() around when only one setting is supported? (IIRC, it was already broken when added.) -- To view, visit https://review.coreboot.org/c/coreboot/+/50048 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iab97f545597388d9c4811b5baac82d3e06d86484 Gerrit-Change-Number: 50048 Gerrit-PatchSet: 5 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 02 Feb 2021 15:37:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: include/cbfs.h: Add comment for chain-includes of commonlib
by Angel Pons (Code Review) 02 Feb '21

02 Feb '21

Attention is currently required from: Philipp Hug, Julius Werner, ron minnich, HAOUAS Elyes. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50167 ) Change subject: include/cbfs.h: Add comment for chain-includes of commonlib ...................................................................... Patch Set 4: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/50167 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I98fb5df0148a3f5fe0bc5b08c5a0b8b1e95c4624 Gerrit-Change-Number: 50167 Gerrit-PatchSet: 4 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: ron minnich <rminnich(a)gmail.com> Gerrit-Attention: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Comment-Date: Tue, 02 Feb 2021 15:34:41 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: nb/intel/x/bootblock.c Revert include <arch/pci_io_cfg.h>
by Angel Pons (Code Review) 02 Feb '21

02 Feb '21

Attention is currently required from: Furquan Shaikh, Damien Zammit, Julius Werner, Kyösti Mälkki, Patrick Rudolph, HAOUAS Elyes. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50229 ) Change subject: nb/intel/x/bootblock.c Revert include <arch/pci_io_cfg.h> ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/50229/comment/0786d7c7_5f1e8527 PS2, Line 20: to be an exception to this. > Under Documentstion/, no. Related changes on the topic: […] CB:49358 seems to be unrelated? I get where this is going, though. I made CB:50231 to only revert the include changes. -- To view, visit https://review.coreboot.org/c/coreboot/+/50229 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I562bf2cfd8c165338577a95c5c644cf5bea3a5c1 Gerrit-Change-Number: 50229 Gerrit-PatchSet: 2 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Damien Zammit Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Damien Zammit Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Comment-Date: Tue, 02 Feb 2021 15:33:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: nb/intel/x/bootblock.c Revert `include <arch/pci_io_cfg.h>`
by Angel Pons (Code Review) 02 Feb '21

02 Feb '21

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/50231 ) Change subject: nb/intel/x/bootblock.c Revert `include <arch/pci_io_cfg.h>` ...................................................................... nb/intel/x/bootblock.c Revert `include <arch/pci_io_cfg.h>` This partially reverts: - Commit 77d3b655ed - Commit 487c1a24f5 - Commit 875c21f491 - Commit c4d1b47ad9 - Commit b96c358751 - Commit 9cbf26d18e It is intentional to use <device/pci_ops.h> whenever one needs to use PCI config access. The bootblock.c files needing I/O config do not need to be an exception to this. Change-Id: Ifba05717dad404a844618815c5347a05e07a3362 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/northbridge/intel/gm45/bootblock.c M src/northbridge/intel/haswell/bootblock.c M src/northbridge/intel/i945/bootblock.c M src/northbridge/intel/ironlake/bootblock.c M src/northbridge/intel/sandybridge/bootblock.c M src/northbridge/intel/x4x/bootblock.c 6 files changed, 6 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/50231/1 diff --git a/src/northbridge/intel/gm45/bootblock.c b/src/northbridge/intel/gm45/bootblock.c index e2cabdb..a9a1e8e 100644 --- a/src/northbridge/intel/gm45/bootblock.c +++ b/src/northbridge/intel/gm45/bootblock.c @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <arch/bootblock.h> -#include <arch/pci_io_cfg.h> #include <assert.h> +#include <device/pci_ops.h> #include <types.h> #include "gm45.h" diff --git a/src/northbridge/intel/haswell/bootblock.c b/src/northbridge/intel/haswell/bootblock.c index 0bb8ae2..1336582 100644 --- a/src/northbridge/intel/haswell/bootblock.c +++ b/src/northbridge/intel/haswell/bootblock.c @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <arch/bootblock.h> -#include <arch/pci_io_cfg.h> #include <assert.h> +#include <device/pci_ops.h> #include <types.h> #include "haswell.h" diff --git a/src/northbridge/intel/i945/bootblock.c b/src/northbridge/intel/i945/bootblock.c index edb9a8d..448d5e4 100644 --- a/src/northbridge/intel/i945/bootblock.c +++ b/src/northbridge/intel/i945/bootblock.c @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <arch/bootblock.h> -#include <arch/pci_io_cfg.h> #include <assert.h> +#include <device/pci_ops.h> #include <types.h> #include "i945.h" diff --git a/src/northbridge/intel/ironlake/bootblock.c b/src/northbridge/intel/ironlake/bootblock.c index 02b63a6..6610a3e 100644 --- a/src/northbridge/intel/ironlake/bootblock.c +++ b/src/northbridge/intel/ironlake/bootblock.c @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <arch/bootblock.h> -#include <arch/pci_io_cfg.h> #include <assert.h> +#include <device/pci_ops.h> #include <types.h> #include "ironlake.h" diff --git a/src/northbridge/intel/sandybridge/bootblock.c b/src/northbridge/intel/sandybridge/bootblock.c index 92f9aee..1eba744 100644 --- a/src/northbridge/intel/sandybridge/bootblock.c +++ b/src/northbridge/intel/sandybridge/bootblock.c @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <arch/bootblock.h> -#include <arch/pci_io_cfg.h> #include <assert.h> +#include <device/pci_ops.h> #include <types.h> #include "sandybridge.h" diff --git a/src/northbridge/intel/x4x/bootblock.c b/src/northbridge/intel/x4x/bootblock.c index aedcdd9..f15d181 100644 --- a/src/northbridge/intel/x4x/bootblock.c +++ b/src/northbridge/intel/x4x/bootblock.c @@ -2,8 +2,8 @@ #include <arch/bootblock.h> #include <arch/mmio.h> -#include <arch/pci_io_cfg.h> #include <assert.h> +#include <device/pci_ops.h> #include <types.h> #include "x4x.h" -- To view, visit https://review.coreboot.org/c/coreboot/+/50231 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifba05717dad404a844618815c5347a05e07a3362 Gerrit-Change-Number: 50231 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: nb/intel/x/bootblock.c Revert include <arch/pci_io_cfg.h>
by Kyösti Mälkki (Code Review) 02 Feb '21

02 Feb '21

Attention is currently required from: Furquan Shaikh, Damien Zammit, Angel Pons, Julius Werner, Patrick Rudolph, HAOUAS Elyes. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50229 ) Change subject: nb/intel/x/bootblock.c Revert include <arch/pci_io_cfg.h> ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/50229/comment/780f3f74_c60ad4f4 PS2, Line 20: to be an exception to this. > Is this documented anywhere? Under Documentstion/, no. Related changes on the topic: CB:31675 CB:49358 CB:50167 -- To view, visit https://review.coreboot.org/c/coreboot/+/50229 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I562bf2cfd8c165338577a95c5c644cf5bea3a5c1 Gerrit-Change-Number: 50229 Gerrit-PatchSet: 2 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Damien Zammit Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Damien Zammit Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Comment-Date: Tue, 02 Feb 2021 15:22:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/fsp2_0: Add support for MP PPI services2 APIs
by Aamir Bohra (Code Review) 02 Feb '21

02 Feb '21

Attention is currently required from: Furquan Shaikh, Martin Roth, Tim Wawrzynczak, Meera Ravindranath, Andrey Petrov, Patrick Rudolph. Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49474 ) Change subject: drivers/intel/fsp2_0: Add support for MP PPI services2 APIs ...................................................................... Patch Set 6: (1 comment) Patchset: PS4: > > I can do that... […] Ok, uploaded a PS#6. Please review. -- To view, visit https://review.coreboot.org/c/coreboot/+/49474 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id74baf17fb90147d229c78be90268fdc3ec1badc Gerrit-Change-Number: 49474 Gerrit-PatchSet: 6 Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 02 Feb 2021 15:19:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-MessageType: comment

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coreboot-gerrit February 2021