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Change subject: mb/google/zork: update USB 3 controller phy Parameter for dirinboz
......................................................................
Patch Set 3: Code-Review+1
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Change subject: drivers/intel/fsp2_0: Add support for MP services2 PPI
......................................................................
Patch Set 10:
(5 comments)
File src/drivers/intel/fsp2_0/Kconfig:
https://review.coreboot.org/c/coreboot/+/49474/comment/89ab31b1_575e5cf9
PS4, Line 163: SOC_INTEL_ALDERLAKE
> yeah […]
Done
File src/drivers/intel/fsp2_0/ppi/Kconfig:
https://review.coreboot.org/c/coreboot/+/49474/comment/4511987c_2ff9aaa9
PS4, Line 5: default n
> As i understand the bool would be default n.
Done
https://review.coreboot.org/c/coreboot/+/49474/comment/d0ea9ad2_b6565fe4
PS4, Line 2:
> Ok. […]
Done
https://review.coreboot.org/c/coreboot/+/49474/comment/52af5009_2604a76c
PS4, Line 17: EFI_PEI_MP_SERVICES_PPI
> yes, should be EDKII_PEI_MP_SERVICES2_PPI, i'll make that change
Done
File src/soc/intel/common/block/cpu/Kconfig:
https://review.coreboot.org/c/coreboot/+/49474/comment/13790f2d_aa1f3775
PS4, Line 78: default y if FSP_PEIM_TO_PEIM_INTERFACE && (FSP_USES_MP_SERVICES_PPI || FSP_USES_MP_SERVICES2_PPI)
> Shouldn't this be: […]
Done
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Change subject: drivers/intel/fsp2_0: Add support for MP services2 PPI
......................................................................
Patch Set 10:
(2 comments)
File src/drivers/intel/fsp2_0/include/fsp/ppi/mp_service_ppi.h:
https://review.coreboot.org/c/coreboot/+/49474/comment/ccd01d89_8d9c24fd
PS6, Line 36: )
> Ok. I can push a follow up CL for that.
Done
https://review.coreboot.org/c/coreboot/+/49474/comment/7f5ab501_2a1635f1
PS6, Line 49: /*
: * switches the requested AP to be the BSP
: */
: efi_return_status_t mp_switch_bsp(void);
:
: /*
: * enable or disable an AP. This service may only be called from the BSP.
: */
: efi_return_status_t mp_enable_disable_ap(void);
:
> Yes, what Furquan said, not function pointer, that way you get the name in the list, and the code cl […]
Done
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Hello build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth, Subrata Banik, Meera Ravindranath, Tim Wawrzynczak, Andrey Petrov, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#10).
Change subject: drivers/intel/fsp2_0: Add support for MP services2 PPI
......................................................................
drivers/intel/fsp2_0: Add support for MP services2 PPI
Add support for MP services2 PPIs, which is slight modification
over MP services 1 PPIs. A new API StartupAllCPUs have been added
to allow running a task on BSP and all APs. Also the EFI_PEI_SERVICES
parameter has been removed from all MP PPI APIs.
This implementation also selects the respective MP services PPI version
supported for SoCs
BUG=b:169196864
Change-Id: Id74baf17fb90147d229c78be90268fdc3ec1badc
Signed-off-by: Aamir Bohra <aamir.bohra(a)intel.com>
---
M src/drivers/intel/fsp2_0/Kconfig
M src/drivers/intel/fsp2_0/include/fsp/ppi/mp_service_ppi.h
M src/drivers/intel/fsp2_0/ppi/Kconfig
M src/drivers/intel/fsp2_0/ppi/Makefile.inc
A src/drivers/intel/fsp2_0/ppi/mp_service1.c
A src/drivers/intel/fsp2_0/ppi/mp_service2.c
M src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c
M src/include/efi/efi_datatype.h
M src/soc/intel/alderlake/Kconfig
M src/soc/intel/elkhartlake/Kconfig
M src/soc/intel/icelake/Kconfig
M src/soc/intel/jasperlake/Kconfig
M src/soc/intel/tigerlake/Kconfig
A src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Ppi/MpServices2.h
14 files changed, 525 insertions(+), 85 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/49474/10
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Change subject: drivers/intel/fsp2_0: Add support for MP services2 PPI
......................................................................
Patch Set 9:
(4 comments)
File src/drivers/intel/fsp2_0/ppi/mp_service1.c:
https://review.coreboot.org/c/coreboot/+/49474/comment/ababcb41_df31fcbd
PS9, Line 13:
> nit: space instead of tab.
Done
https://review.coreboot.org/c/coreboot/+/49474/comment/84155b10_432af945
PS9, Line 58:
> nit: blank line not required -- to keep it consistent with above functions.
done.
File src/drivers/intel/fsp2_0/ppi/mp_service2.c:
https://review.coreboot.org/c/coreboot/+/49474/comment/0ab44c5f_49b5662c
PS9, Line 14:
> nit: space instead of tab.
Done
https://review.coreboot.org/c/coreboot/+/49474/comment/2d81afd1_c04f2a68
PS9, Line 67:
> nit: blank line not required -- to keep it consistent with above functions.
done.
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Change subject: soc/amd/cezanne/iomap: move MMIO range comment above MMIO ranges
......................................................................
Patch Set 1: Code-Review+1
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Change subject: mb/google/zork/variants/vilboz: Diasable ASPM L1.2 for SD card reader
......................................................................
Patch Set 3: Code-Review+1
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Change subject: soc/amd/picasso: add UPD for RV2 USB3 phy setting adjust
......................................................................
Patch Set 13: Code-Review+2
(1 comment)
File src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb:
https://review.coreboot.org/c/coreboot/+/50240/comment/261e872a_a33e4530
PS10, Line 138: "0"
> Yes, it can be setting in the variant, but for dalboz or trembyle Dali. […]
Ack
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/50293
to look at the new patch set (#2).
Change subject: mb/google/volteer/var/voxel: Add settings for noise mitgation
......................................................................
mb/google/volteer/var/voxel: Add settings for noise mitgation
Enable acoustic noise mitgation for volteer platforms.
BUG=b:179328166
BRANCH=none
TEST= Measure the change in noise level by changing the values
in devicetree.
Signed-off-by: Pan Sheng-Liang <sheng-liang.pan(a)quanta.corp-partner.google.com>
Change-Id: I279a85c7741094bb7ddf0c1fde74b31189b12171
---
M src/mainboard/google/volteer/variants/voxel/overridetree.cb
1 file changed, 11 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/50293/2
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