coreboot-gerrit December 2021

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Change in coreboot[master]: soc/intel/alderlake: Configure 9 I/O for ADL-N
by Usha P (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Reka Norman, Maulik V Vaghela, Rizwan Qureshi, Sridhar Siricilla, Subrata Banik, Krishna P Bhat D, Patrick Rudolph, Kangheui Won. Hello Reka Norman, build bot (Jenkins), Maulik V Vaghela, Rizwan Qureshi, Tim Wawrzynczak, Subrata Banik, Sridhar Siricilla, Krishna P Bhat D, Patrick Rudolph, Kangheui Won, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59752 to look at the new patch set (#2). Change subject: soc/intel/alderlake: Configure 9 I/O for ADL-N ...................................................................... soc/intel/alderlake: Configure 9 I/O for ADL-N Select number of I/O based on PCH for Alder Lake-N Document Number: 645548 Signed-off-by: Usha P <usha.p(a)intel.com> Change-Id: I7ebbcdcdb1ccc34b80ec71ac3e591fe4ad6b1904 --- M src/soc/intel/alderlake/Kconfig 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/59752/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59752 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7ebbcdcdb1ccc34b80ec71ac3e591fe4ad6b1904 Gerrit-Change-Number: 59752 Gerrit-PatchSet: 2 Gerrit-Owner: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: Kangheui Won <khwon(a)google.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Reka Norman <rekanorman(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Kangheui Won <khwon(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake: Select number of I/O for ADL-N
by Usha P (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Reka Norman, Maulik V Vaghela, Rizwan Qureshi, Sridhar Siricilla, Subrata Banik, Krishna P Bhat D, Patrick Rudolph, Kangheui Won. Usha P has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59752 ) Change subject: soc/intel/alderlake: Select number of I/O for ADL-N ...................................................................... Patch Set 1: (1 comment) File src/soc/intel/alderlake/Kconfig: https://review.coreboot.org/c/coreboot/+/59752/comment/f24a1312_e0fbc457 PS1, Line 177: SOC_INTEL_ALDERLAKE_PCH_N > ADL-N support max of 5 PCIE ports (upto 9 PCIe lanes). Please check once. ADL-N supports max of 5 PCIE ports to be enabled, but does not specify which 5. So we need to keep this config to max of total root ports , so that we can iterate over all the ports and decide which ones are enabled. -- To view, visit https://review.coreboot.org/c/coreboot/+/59752 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7ebbcdcdb1ccc34b80ec71ac3e591fe4ad6b1904 Gerrit-Change-Number: 59752 Gerrit-PatchSet: 1 Gerrit-Owner: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: Kangheui Won <khwon(a)google.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Reka Norman <rekanorman(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Kangheui Won <khwon(a)google.com> Gerrit-Comment-Date: Wed, 01 Dec 2021 07:06:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: helpers: Add fls support
by Jianjun Wang (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Hung-Te Lin, Shelley Chen, Paul Menzel, Julius Werner, Yu-Ping Wu. Jianjun Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59738 ) Change subject: helpers: Add fls support ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > > I will abandon this patch and use __ffs instead. […] Of course not, but I found there are some misunderstandings, __ffs only calculate the first significant bit, e.g. fls(0x3000000) = 26, __ffs(0x3000000) = 24, clz(0x3000000) = 6. So just like Julius said, we should either use clz(), or add another function to implements fls() by calling clz(), what do you think? -- To view, visit https://review.coreboot.org/c/coreboot/+/59738 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib458abfec7e03b2979569a8440a6e69b0285ac32 Gerrit-Change-Number: 59738 Gerrit-PatchSet: 1 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Wed, 01 Dec 2021 06:59:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Comment-In-Reply-To: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common/pmc: Drop unnecessary pmc_ipc.c entry
by Subrata Banik (Code Review) 01 Dec '21

01 Dec '21

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59747 ) Change subject: soc/intel/common/pmc: Drop unnecessary pmc_ipc.c entry ...................................................................... soc/intel/common/pmc: Drop unnecessary pmc_ipc.c entry This patch drops unnecessary `pmc_ipc.c` from Makefile as this file is getting included upon CONFIG_PMC_IPC_ACPI_INTERFACE selection. Change-Id: Ie66f0833daf033ec16210221610508f9fbb1e6c7 Signed-off-by: Subrata Banik <subi.banik(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59747 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/soc/intel/common/block/pmc/Makefile.inc 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/src/soc/intel/common/block/pmc/Makefile.inc b/src/soc/intel/common/block/pmc/Makefile.inc index de69b63..8dacc10 100644 --- a/src/soc/intel/common/block/pmc/Makefile.inc +++ b/src/soc/intel/common/block/pmc/Makefile.inc @@ -2,7 +2,7 @@ bootblock-y += pmclib.c romstage-y += pmclib.c ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE) += pmc.c -ramstage-y += pmclib.c pmc_ipc.c +ramstage-y += pmclib.c smm-y += pmclib.c verstage-y += pmclib.c postcar-y += pmclib.c 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. -- To view, visit https://review.coreboot.org/c/coreboot/+/59747 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie66f0833daf033ec16210221610508f9fbb1e6c7 Gerrit-Change-Number: 59747 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: [WIP] src/drivers/intel/fsp2_0: Update GUID for FSP_NON_VOLATILE_STOR...
by Subrata Banik (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Anil Kumar K, Tim Wawrzynczak, Andrey Petrov, Patrick Rudolph. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59638 ) Change subject: [WIP] src/drivers/intel/fsp2_0: Update GUID for FSP_NON_VOLATILE_STORAGE_HOB2 HOB introduced in FSP 2.3 ...................................................................... Patch Set 15: Code-Review+1 (1 comment) Patchset: PS15: LGTM -- To view, visit https://review.coreboot.org/c/coreboot/+/59638 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I27647e9ac1a4902256b3f1c34b60e1f0b787a06e Gerrit-Change-Number: 59638 Gerrit-PatchSet: 15 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 01 Dec 2021 06:31:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common Add support for CSE IOM/NPHY sub-parition update
by Krishna P Bhat D (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Marx Wang, Tim Wawrzynczak, Rizwan Qureshi, Sridhar Siricilla, Balaji Manigandan, Nick Vaccaro, Patrick Rudolph. Krishna P Bhat D has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59685 ) Change subject: soc/intel/common Add support for CSE IOM/NPHY sub-parition update ...................................................................... Patch Set 11: (3 comments) File src/soc/intel/common/block/cse/cse_lite.c: https://review.coreboot.org/c/coreboot/+/59685/comment/919bdfc7_a8c7b394 PS11, Line 888: cbfs_locate_file_in_region > should now be `cbfs_locate_file_in_region` Looks like this API is getting deprecated. Need to identify another API to get access to cbfs file in the region_device. https://review.coreboot.org/c/coreboot/+/59685/comment/745fc33b_24f35c88 PS11, Line 958: /* Get sub-partition blob's version */ > Should these blobs have a hash stored in FW_MAIN_A/FW_MAIN_B/COREBOOT, just like the me_rw hash (and […] These blobs are part of FW_MAIN_A/FW_MAIN_B/COREBOOT, they are verified by vboot. https://review.coreboot.org/c/coreboot/+/59685/comment/269aad06_5fc6bb25 PS11, Line 1035: void cse_fw_sync(void) > Since the mainboard is the entity with the knowledge of whether or not an update is ultimately requi […] cse_fw_sync() is being called from SoC romstage.c, but getting enabled from mainboard Kconfig. In the current scenario, IOM/NPHY update is specific to SoC. `is_cse_sub_part_update_req` should be determined by SoC, while Kconfig to enable this feature comes from mainboard. Your thoughts? -- To view, visit https://review.coreboot.org/c/coreboot/+/59685 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7c0cda51314c4f722f5432486a43e19b46f4b240 Gerrit-Change-Number: 59685 Gerrit-PatchSet: 11 Gerrit-Owner: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Marx Wang <marx.wang(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Attention: Marx Wang <marx.wang(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 01 Dec 2021 06:19:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: [WIP] src/drivers/intel/fsp2_0: Add FSP 2.3 support
by Anil Kumar K (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Paul Menzel, Subrata Banik, Andrey Petrov, Patrick Rudolph. Anil Kumar K has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59324 ) Change subject: [WIP] src/drivers/intel/fsp2_0: Add FSP 2.3 support ...................................................................... Patch Set 11: (1 comment) File src/drivers/intel/fsp2_0/hand_off_block.c: https://review.coreboot.org/c/coreboot/+/59324/comment/c5c6a1e8_e70ba173 PS3, Line 24: : #ifdef CONFIG_PLATFORM_USES_FSP2_3 > you don't need this guard […] Hi Subrata. For the HOB changes please use the new patch :https://review.coreboot.org/c/coreboot/+/59638/ -- To view, visit https://review.coreboot.org/c/coreboot/+/59324 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ica1bd004286c785aa8a431f39d8efc69982874c1 Gerrit-Change-Number: 59324 Gerrit-PatchSet: 11 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-CC: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 01 Dec 2021 06:04:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: [WIP] src/drivers/intel/fsp2_0: Update GUID for FSP_NON_VOLATILE_STOR...
by build bot (Jenkins) (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Tim Wawrzynczak, Subrata Banik, Andrey Petrov, Patrick Rudolph. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59638 ) Change subject: [WIP] src/drivers/intel/fsp2_0: Update GUID for FSP_NON_VOLATILE_STORAGE_HOB2 HOB introduced in FSP 2.3 ...................................................................... Patch Set 14: (1 comment) File src/drivers/intel/fsp2_0/hand_off_block.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134724): https://review.coreboot.org/c/coreboot/+/59638/comment/7c719866_111a89e8 PS14, Line 322: fsp_find_extension_hob_by_guid (fsp_nv_storage_guid_2, size); space prohibited between function name and open parenthesis '(' -- To view, visit https://review.coreboot.org/c/coreboot/+/59638 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I27647e9ac1a4902256b3f1c34b60e1f0b787a06e Gerrit-Change-Number: 59638 Gerrit-PatchSet: 14 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 01 Dec 2021 05:54:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/i2c/tpm: Add override function for TPM I2C bus
by EricR Lai (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Tim Wawrzynczak, Christian Walter. Hello Tim Wawrzynczak, Christian Walter, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59768 to look at the new patch set (#3). Change subject: drivers/i2c/tpm: Add override function for TPM I2C bus ...................................................................... drivers/i2c/tpm: Add override function for TPM I2C bus Provide a way to let boards can determine which TPM bus to use at runtime. Signed-off-by: Eric Lai <ericr_lai(a)compal.corp-partner.google.com> Change-Id: I658468ed3880de0a6b947c212fa8737956928c57 --- M src/drivers/i2c/tpm/Kconfig M src/drivers/i2c/tpm/tis.c M src/drivers/i2c/tpm/tis_atmel.c M src/security/tpm/tis.h 4 files changed, 18 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/59768/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/59768 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I658468ed3880de0a6b947c212fa8737956928c57 Gerrit-Change-Number: 59768 Gerrit-PatchSet: 3 Gerrit-Owner: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/dedede: Add SAR sensor for bugzzy
by SH Kim (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Gwendal Grignou. SH Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59609 ) Change subject: mb/google/dedede: Add SAR sensor for bugzzy ...................................................................... Patch Set 3: (1 comment) File src/mainboard/google/dedede/variants/bugzzy/overridetree.cb: https://review.coreboot.org/c/coreboot/+/59609/comment/3e2b53e2_7067f491 PS3, Line 231: device i2c 28 on end Can we add this as well: device i2c 28 on probe DB_PORTS DB_PORTS_1C_1A_LTE end -- To view, visit https://review.coreboot.org/c/coreboot/+/59609 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9feef9d132c60738bafb22ceb7d3468c798fab9b Gerrit-Change-Number: 59609 Gerrit-PatchSet: 3 Gerrit-Owner: Gwendal Grignou <gwendal(a)chromium.org> Gerrit-Reviewer: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Gwendal Grignou <gwendal(a)chromium.org> Gerrit-Comment-Date: Wed, 01 Dec 2021 05:21:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit December 2021