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Change subject: mb/google/gimble: Add PsysPmax setting to 143W
......................................................................
Patch Set 1:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59797/comment/e902bbf5_896f8d9c
PS1, Line 2: Jolin
Chia-Ling Hou?
$ git config --global user.name "Chia-Ling Hou"
$ git commit --amend --author="Chia-Ling Hou <chia-ling.hou(a)intel.corp-partner.google.com>"
https://review.coreboot.org/c/coreboot/+/59797/comment/703f0377_29572cc8
PS1, Line 7: gimble
brya/var/gimble
https://review.coreboot.org/c/coreboot/+/59797/comment/60a3b638_e18c132f
PS1, Line 7: Add PsysPmax setting to 143W
Set PsysPmax to 143 W
https://review.coreboot.org/c/coreboot/+/59797/comment/57839e63_854e62e5
PS1, Line 9: 143w
143 W
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Change subject: lib: Add fls() (Find Last Set)
......................................................................
Patch Set 4:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59738/comment/836c09fb_550f3d99
PS3, Line 7: lib: Add fls support
> lib: Add fls() (Find Last Set)
Done
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Change subject: mb/google/brya/var/gimble: Swap TPM I2C with touchscreen I2C
......................................................................
Patch Set 11:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59580/comment/8c22494e_11310457
PS11, Line 13: BUG=b:207613972
Above you use a different bug number?
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Hello Hung-Te Lin, Shelley Chen, Paul Menzel, Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/59738
to look at the new patch set (#4).
Change subject: lib: Add fls() (Find Last Set)
......................................................................
lib: Add fls() (Find Last Set)
Implement fls() by calling clz(), and remove the duplicate definitions
in commonlib/storage/sdhci.c.
Signed-off-by: Jianjun Wang <jianjun.wang(a)mediatek.com>
Change-Id: Ib458abfec7e03b2979569a8440a6e69b0285ac32
---
M src/commonlib/storage/sdhci.c
M src/include/lib.h
2 files changed, 4 insertions(+), 31 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/59738/4
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Change subject: libpayload: Add CBMEM_IMD_ENTRY support to coreboot tables parser
......................................................................
Patch Set 2: Code-Review+1
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59491/comment/a26ed5e2_a17ba10a
PS2, Line 9: many info
much information?
https://review.coreboot.org/c/coreboot/+/59491/comment/e5f9aa53_762f9122
PS2, Line 12: Moreover, the MRCDATA (previously MRC_CACHE) should now work on x86.
1. Please add a blank line above to separate paragraphs visually.
2. What do you mean by “should now work”?
Patchset:
PS2:
Some minor nits.
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Change subject: soc/intel/alderlake: Configure 9 I/O for ADL-N
......................................................................
Patch Set 2:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59752/comment/7f033d4e_cbe1c0f0
PS2, Line 7: soc/intel/alderlake: Configure 9 I/O for ADL-N
Please clarify number 9.
Better to word it as : Configure Root ports based on ADL-N
https://review.coreboot.org/c/coreboot/+/59752/comment/790860b6_102cbdb9
PS2, Line 9: Select number of I/O based on PCH for Alder Lake-N
Please elaborate the changes like what are different port supported such as 9 PCIe root ports, 5 Clk req and no CPU root ports.
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Change subject: mb/google/brya/var/felwinter: Swap TPM and touchscreen I2C bus
......................................................................
Patch Set 1:
(1 comment)
File src/mainboard/google/brya/variants/felwinter/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/59799/comment/e64740af_2e8e71e5
PS1, Line 68: }"
That seems to do more than the commit message summary says? (More than just swapping the busses?)
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Change subject: lib: Add fls support
......................................................................
Patch Set 3:
(2 comments)
File src/commonlib/bsd/include/commonlib/bsd/helpers.h:
https://review.coreboot.org/c/coreboot/+/59738/comment/d3c56c2f_18919617
PS1, Line 129: ARCH_X86
> So, will the latest patchset cause problems on x86 platforms?
I only have the environment for cherry board, and have no idea how to build for x86 platform, could you please provide some suggestions?
https://review.coreboot.org/c/coreboot/+/59738/comment/2ae09955_2bd01f4d
PS1, Line 137: fls
> It would still be nice to provide unit tests.
Sure, is there any document can tell how to do the unit tests?
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Hello build bot (Jenkins), Patrick Georgi, Julius Werner, Jan Dabros, Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/59697
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Change subject: libpayload: Add coreboot commonlib/bsd include path
......................................................................
libpayload: Add coreboot commonlib/bsd include path
Make BSD part of the coreboot commonlib accessible to libpayload.
Change-Id: I09f475d399ab785f3d3ffdb4b42950d2b397845e
Signed-off-by: Jakub Czapiga <jacz(a)semihalf.com>
---
M payloads/libpayload/Makefile
M payloads/libpayload/Makefile.inc
M payloads/libpayload/tests/Makefile.inc
3 files changed, 3 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/59697/2
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