coreboot-gerrit December 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: drivers/i2c/tpm: Add override function for TPM I2C bus
by EricR Lai (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Arthur Heymans, Nico Huber, Tim Wawrzynczak, Christian Walter, Angel Pons, Julius Werner. EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59768 ) Change subject: drivers/i2c/tpm: Add override function for TPM I2C bus ...................................................................... Patch Set 4: (1 comment) File src/drivers/i2c/tpm/tis.c: https://review.coreboot.org/c/coreboot/+/59768/comment/31c52d4e_298ba67c PS4, Line 22: int __weak get_tpm_i2c_bus(void) : { : return CONFIG_DRIVER_TPM_I2C_BUS; : } > +1, there's absolutely no reason to use weak symbols here. […] I see. DRIVER_TPM_I2C_BUS_RUNTIME_DEPENDENT seems a good idea. Any options? -- To view, visit https://review.coreboot.org/c/coreboot/+/59768 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I658468ed3880de0a6b947c212fa8737956928c57 Gerrit-Change-Number: 59768 Gerrit-PatchSet: 4 Gerrit-Owner: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Wed, 01 Dec 2021 11:09:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur.heymans(a)9elements.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake, soc/common: Add method to determine the cpu type
by Arthur Heymans (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Tim Wawrzynczak, Sridhar Siricilla, Arthur Heymans, Patrick Rudolph. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59360 ) Change subject: soc/intel/alderlake, soc/common: Add method to determine the cpu type ...................................................................... Patch Set 5: (1 comment) File src/soc/intel/common/block/acpi/cpu_hybrid.c: https://review.coreboot.org/c/coreboot/+/59360/comment/4f6f63ed_8201afa5 PS1, Line 25: return global_cpu_type_bitmask; > Done No. Threadsafe != won't cause threadrelated problems in the bootflow because of where they are called. This is explicitly **not** threadsafe and therefore it requires careful use in the bootflow. You need to document these things! -- To view, visit https://review.coreboot.org/c/coreboot/+/59360 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If4ceb24d9bb1e808750bf618c29b2b9ea6d4191b Gerrit-Change-Number: 59360 Gerrit-PatchSet: 5 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 01 Dec 2021 11:04:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur.heymans(a)9elements.com> Comment-In-Reply-To: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: libpayload: Add coreboot commonlib/bsd include path
by Jakub Czapiga (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Patrick Georgi, Julius Werner, Jan Dabros, Yu-Ping Wu. Jakub Czapiga has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59697 ) Change subject: libpayload: Add coreboot commonlib/bsd include path ...................................................................... Patch Set 2: (1 comment) File payloads/libpayload/Makefile: https://review.coreboot.org/c/coreboot/+/59697/comment/d6c469f4_1221e081 PS1, Line 37: := > Sure. Do not merge it yet. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/59697 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I09f475d399ab785f3d3ffdb4b42950d2b397845e Gerrit-Change-Number: 59697 Gerrit-PatchSet: 2 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Jan Dabros <jsd(a)semihalf.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Jan Dabros <jsd(a)semihalf.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Wed, 01 Dec 2021 10:40:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Georgi <patrick(a)coreboot.org> Comment-In-Reply-To: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/baseboard/brask: Add power limits functions
by Alan Huang (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Tim Wawrzynczak, Paul Menzel, Nick Vaccaro, Zhuohao Lee. Alan Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58241 ) Change subject: mb/google/brya/var/baseboard/brask: Add power limits functions ...................................................................... Patch Set 18: (3 comments) Patchset: PS18: Move function declarations to the front of function body. Add blank line after '}'. File src/mainboard/google/brya/variants/baseboard/brask/ramstage.c: https://review.coreboot.org/c/coreboot/+/58241/comment/5eda0bc5_d8f6d3d6 PS16, Line 92: if (!num_entries) : return; : : const struct device *policy_dev = DEV_PTR(dptf_policy); : if (!policy_dev) : return; : : size_t intel_idx, brask_idx; : if (!get_sku_index(limits, num_entries, &intel_idx, &brask_idx)) : return; : : config_t *conf = config_of_soc(); : struct soc_power_limits_config *soc_config = &conf->power_limits_config[intel_idx]; : : enum usb_chg_type type; : u32 watts; : u16 volts_mv, current_ma; : u32 psyspl2, pl2; : soc_config->tdp_pl4 = 0; : u32 pl2_default = DIV_ROUND_UP(limits[brask_idx].pl2_max_power, MILLIWATTS_TO_WATTS); : int rv = google_chromeec_get_usb_pd_power_info(&type, &current_ma, &volts_mv); > suggestion, slighly reorganize this for readability: […] Done https://review.coreboot.org/c/coreboot/+/58241/comment/f714a130_e0874b4c PS16, Line 131: /* voltage unit is milliVolts and current is in milliAmps */ > nit: blank line after `}` Done -- To view, visit https://review.coreboot.org/c/coreboot/+/58241 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I183017068e9c78acb9fa7073c53593d304ba9248 Gerrit-Change-Number: 58241 Gerrit-PatchSet: 18 Gerrit-Owner: Alan Huang <alan-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-CC: Hou-hsun Lee <hou-hsun.lee(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Comment-Date: Wed, 01 Dec 2021 10:39:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: Documentation/coding_style.md: Avoid weakly linked symbols
by Angel Pons (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Paul Menzel, Julius Werner, Arthur Heymans. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58934 ) Change subject: Documentation/coding_style.md: Avoid weakly linked symbols ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > > The problem is that those weak functions are often used initially just to get things compile teste […] In case you're curious, CB:59768 is an example where using weak stubs is a bad idea. -- To view, visit https://review.coreboot.org/c/coreboot/+/58934 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If70d38c5c646c1e8365bb16d3292cebb2787eba2 Gerrit-Change-Number: 58934 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Hung-Te Lin <hungte(a)chromium.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Wed, 01 Dec 2021 10:35:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake, soc/common: Add method to determine the cpu type
by Sridhar Siricilla (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Arthur Heymans, Tim Wawrzynczak, Patrick Rudolph. Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59360 ) Change subject: soc/intel/alderlake, soc/common: Add method to determine the cpu type ...................................................................... Patch Set 5: (4 comments) File src/soc/intel/common/block/acpi/cpu_hybrid.c: https://review.coreboot.org/c/coreboot/+/59360/comment/751c0a42_9736a598 PS1, Line 18: get_cpu_type > Done, Done https://review.coreboot.org/c/coreboot/+/59360/comment/8a51e9e4_a50a5ea0 PS1, Line 23: get_cpu_type_bitmask > This is implemented in the cpu_hybrid.c. […] Done https://review.coreboot.org/c/coreboot/+/59360/comment/a4d25dec_25d5942d PS1, Line 25: return global_cpu_type_bitmask; > set_cpu_type_bitmask() is run in multi core context during BS_DEV_INIT_CHIPS, but global_cpu_type_b […] Done File src/soc/intel/common/block/acpi/cpu_hybrid.c: https://review.coreboot.org/c/coreboot/+/59360/comment/6546d29d_f43b9e65 PS3, Line 37: set_cpu_type_bitmask > I agree with you, since bitmask is 32 bits, it wont' scale up beyond 32 cores. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/59360 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If4ceb24d9bb1e808750bf618c29b2b9ea6d4191b Gerrit-Change-Number: 59360 Gerrit-PatchSet: 5 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 01 Dec 2021 10:35:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur.heymans(a)9elements.com> Comment-In-Reply-To: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/i2c/tpm: Add override function for TPM I2C bus
by Angel Pons (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Arthur Heymans, Nico Huber, Tim Wawrzynczak, Christian Walter, Julius Werner, EricR Lai. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59768 ) Change subject: drivers/i2c/tpm: Add override function for TPM I2C bus ...................................................................... Patch Set 4: (2 comments) File src/drivers/i2c/tpm/tis.c: https://review.coreboot.org/c/coreboot/+/59768/comment/cc84e768_ded4bcc2 PS4, Line 22: int `unsigned int`, please. https://review.coreboot.org/c/coreboot/+/59768/comment/15bedb66_574e9aef PS4, Line 22: int __weak get_tpm_i2c_bus(void) : { : return CONFIG_DRIVER_TPM_I2C_BUS; : } > I don't think a weak function is a good solution here. […] +1, there's absolutely no reason to use weak symbols here. I'd add a `DRIVER_TPM_I2C_BUS_RUNTIME_DEPENDENT` Kconfig symbol. When selected, the prompt for `DRIVER_TPM_I2C_BUS` is not visible and the `get_tpm_i2c_bus()` function must be defined. I'd also introduce a helper function to get the I2C bus number according to the Kconfig options: static unsigned int _get_tpm_i2c_bus(void) { if (CONFIG(DRIVER_TPM_I2C_BUS_RUNTIME_DEPENDENT)) return get_tpm_i2c_bus(); else return CONFIG_DRIVER_TPM_I2C_BUS; } Note that there are no weak symbols. This way, if `DRIVER_TPM_I2C_BUS_RUNTIME_DEPENDENT` is enabled but `get_tpm_i2c_bus()` is not defined, there will be a build-time error (linker will complain about unresolved symbol `get_tpm_i2c_bus`). However, when `DRIVER_TPM_I2C_BUS_RUNTIME_DEPENDENT` is *not* enabled, the compiler will automatically optimize out the `get_tpm_i2c_bus()` function call, so the linker will never see this symbol and won't cause any build errors. -- To view, visit https://review.coreboot.org/c/coreboot/+/59768 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I658468ed3880de0a6b947c212fa8737956928c57 Gerrit-Change-Number: 59768 Gerrit-PatchSet: 4 Gerrit-Owner: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Wed, 01 Dec 2021 10:33:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/baseboard/brask: Add power limits functions
by Alan Huang (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Paul Menzel, Nick Vaccaro, Zhuohao Lee. Hello build bot (Jenkins), Tim Wawrzynczak, Nick Vaccaro, Zhuohao Lee, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58241 to look at the new patch set (#18). Change subject: mb/google/brya/var/baseboard/brask: Add power limits functions ...................................................................... mb/google/brya/var/baseboard/brask: Add power limits functions Copy function variant_update_power_limits from brya to set power limits. Add function variant_update_psys_power_limits and copy the algorithm from puff. Add structure system_power_limits and psys_config to define and configure the psys power limits. BUG=b:193864533 BRANCH=none TEST=Build pass Signed-off-by: Alan Huang <alan-huang(a)quanta.corp-partner.google.com> Change-Id: I183017068e9c78acb9fa7073c53593d304ba9248 --- M src/mainboard/google/brya/variants/baseboard/brask/Makefile.inc A src/mainboard/google/brya/variants/baseboard/brask/ramstage.c M src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h 3 files changed, 191 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/58241/18 -- To view, visit https://review.coreboot.org/c/coreboot/+/58241 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I183017068e9c78acb9fa7073c53593d304ba9248 Gerrit-Change-Number: 58241 Gerrit-PatchSet: 18 Gerrit-Owner: Alan Huang <alan-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-CC: Hou-hsun Lee <hou-hsun.lee(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Zhuohao Lee <zhuohao(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake: Enable CPPCv3 for Intel Alderlake
by Sridhar Siricilla (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Paul Menzel, Tim Wawrzynczak, Patrick Rudolph. Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59363 ) Change subject: soc/intel/alderlake: Enable CPPCv3 for Intel Alderlake ...................................................................... Patch Set 5: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59363/comment/fdb35050_b0583392 PS5, Line 14: updated for ADL-P small and big cores correctly. > What command did you use? The below OS commands can be used to verify the Nominal Performance and Nominal Frequency: cat /sys/bus/cpu/devices/cpuX/acpi_cppc/nominal_perf cat /sys/bus/cpu/devices/cpuX/acpi_cppc/nominal_freq Where X is 0,1,2,3,4.. -- To view, visit https://review.coreboot.org/c/coreboot/+/59363 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icaacd4a4ba953d8337f557903ed2ea9da4a60fb9 Gerrit-Change-Number: 59363 Gerrit-PatchSet: 5 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 01 Dec 2021 10:28:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/redrix: Add _HID for privacy screen device
by Paul Menzel (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Chen Wisley, Tim Wawrzynczak, Rajat Jain. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59731 ) Change subject: mb/google/brya/redrix: Add _HID for privacy screen device ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59731/comment/162db99f_a8364b2f PS1, Line 9: ChromeOS kernel platform driver Please add an URL to the commit adding the support. -- To view, visit https://review.coreboot.org/c/coreboot/+/59731 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If988ca94b6c70d08a7b07cc9f6bbb077fac84e5b Gerrit-Change-Number: 59731 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Chen Wisley <wisley.chen(a)quantatw.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Rajat Jain <rajatja(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Chen Wisley <wisley.chen(a)quantatw.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Rajat Jain <rajatja(a)google.com> Gerrit-Comment-Date: Wed, 01 Dec 2021 10:26:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit December 2021