coreboot-gerrit December 2021

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Change in coreboot[master]: src/northbridge/amd/pi/00730F01: enable PARALLEL_MP
by Arthur Heymans (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Michał Żygowski, Michał Kopeć. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59808 ) Change subject: src/northbridge/amd/pi/00730F01: enable PARALLEL_MP ...................................................................... Patch Set 2: (1 comment) File src/northbridge/amd/pi/00730F01/northbridge.c: https://review.coreboot.org/c/coreboot/+/59808/comment/79a4d787_3f545d33 PS2, Line 955: /* : * APIC ID calculation is tightly coupled with AGESA v5 code. : * This calculation MUST match the assignment calculation done : * in LocalApicInitializationAtEarly() function. : * And reference GetLocalApicIdForCore() : * : * Apply APIC enumeration rules : * For systems with >= 16 APICs, put the IO-APICs at 0..n and : * put the local-APICs at m..z : * : * This is needed because many IO-APIC devices only have 4 bits : * for their APIC id and therefore must reside at 0..15 : */ : if ((node_nums * core_max) + ioapic_count >= 0x10) { : lapicid_start = (ioapic_count - 1) / core_max; : lapicid_start = (lapicid_start + 1) * core_max; : printk(BIOS_SPEW, "lpaicid_start = 0x%x ", lapicid_start); : } : u32 apic_id = (lapicid_start * (i/modules + 1)) + ((i % modules) ? (j + (siblings + 1)) : j); : printk(BIOS_SPEW, "node 0x%x core 0x%x apicid = 0x%x\n", : i, j, apic_id); : : struct device *cpu = add_cpu_device(cpu_bus, apic_id, enable_node); : if (cpu) : amd_cpu_topology(cpu, i, j); Can this be removed? BTW that comment about the io-apic ID does not match what the other code does at all. IOAPICs get an ID == CONFIG_MAX_CPUS it seems. -- To view, visit https://review.coreboot.org/c/coreboot/+/59808 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib49e7d3f5956ac7831664d50db5f233b70aa54db Gerrit-Change-Number: 59808 Gerrit-PatchSet: 2 Gerrit-Owner: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Comment-Date: Wed, 01 Dec 2021 14:33:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: src/cpu/amd/pi/Kconfig: select NO_SMM
by Michał Kopeć (Code Review) 01 Dec '21

01 Dec '21

Michał Kopeć has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59810 ) Change subject: src/cpu/amd/pi/Kconfig: select NO_SMM ...................................................................... src/cpu/amd/pi/Kconfig: select NO_SMM Disable SMM_ASEG and select NO_SMM since we don't use SMM. TEST=Boot on PC Engines apu3 Signed-off-by: Michał Kopeć <michal.kopec(a)3mdeb.com> Change-Id: I47237421c3dd5bd043447831263d72c9956cdaf4 --- M src/cpu/amd/pi/Kconfig 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/59810/1 diff --git a/src/cpu/amd/pi/Kconfig b/src/cpu/amd/pi/Kconfig index aff8d7dc..2336d68 100644 --- a/src/cpu/amd/pi/Kconfig +++ b/src/cpu/amd/pi/Kconfig @@ -10,7 +10,7 @@ select UDELAY_LAPIC select LAPIC_MONOTONIC_TIMER select SPI_FLASH if HAVE_ACPI_RESUME - select SMM_ASEG + select NO_SMM select SSE2 if CPU_AMD_PI -- To view, visit https://review.coreboot.org/c/coreboot/+/59810 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I47237421c3dd5bd043447831263d72c9956cdaf4 Gerrit-Change-Number: 59810 Gerrit-PatchSet: 1 Gerrit-Owner: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: src/cpu/amd/agesa/Kconfig: select NO_SMM
by Michał Kopeć (Code Review) 01 Dec '21

01 Dec '21

Michał Kopeć has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59809 ) Change subject: src/cpu/amd/agesa/Kconfig: select NO_SMM ...................................................................... src/cpu/amd/agesa/Kconfig: select NO_SMM Disable SMM_ASEG and select NO_SMM since we don't use SMM. TEST=Boot on PC Engines apu1 Signed-off-by: Michał Kopeć <michal.kopec(a)3mdeb.com> Change-Id: I09bbe036a88dada847219606ec79c68e7ca8e5cc --- M src/cpu/amd/agesa/Kconfig 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/59809/1 diff --git a/src/cpu/amd/agesa/Kconfig b/src/cpu/amd/agesa/Kconfig index 15622c9..42574a1 100644 --- a/src/cpu/amd/agesa/Kconfig +++ b/src/cpu/amd/agesa/Kconfig @@ -12,7 +12,7 @@ select UDELAY_LAPIC select LAPIC_MONOTONIC_TIMER select SPI_FLASH if HAVE_ACPI_RESUME - select SMM_ASEG + select NO_SMM select SSE2 if CPU_AMD_AGESA -- To view, visit https://review.coreboot.org/c/coreboot/+/59809 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I09bbe036a88dada847219606ec79c68e7ca8e5cc Gerrit-Change-Number: 59809 Gerrit-PatchSet: 1 Gerrit-Owner: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: src/northbridge/amd/pi/00730F01: enable PARALLEL_MP
by Arthur Heymans (Code Review) 01 Dec '21

01 Dec '21

1 0

Change in coreboot[master]: libpayload: Add coreboot commonlib/bsd include path
by 9elements QA (Code Review) 01 Dec '21

01 Dec '21

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59697 ) Change subject: libpayload: Add coreboot commonlib/bsd include path ...................................................................... Patch Set 3: Automatic boot test returned (PASS/FAIL/TOTAL): 9 / 1 / 10 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/82880 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/82879 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/82878 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/82877 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/82876 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/82875 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/82874 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/82873 FAIL: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/82872 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/82871 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/59697 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I09f475d399ab785f3d3ffdb4b42950d2b397845e Gerrit-Change-Number: 59697 Gerrit-PatchSet: 3 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Jan Dabros <jsd(a)semihalf.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Wed, 01 Dec 2021 14:08:52 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: src/northbridge/amd/pi/00730F01: enable PARALLEL_MP
by Michał Kopeć (Code Review) 01 Dec '21

01 Dec '21

Michał Kopeć has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/59808 ) Change subject: src/northbridge/amd/pi/00730F01: enable PARALLEL_MP ...................................................................... src/northbridge/amd/pi/00730F01: enable PARALLEL_MP Disable LEGACY_SMP_INIT to enable PARALLEL_MP. TEST=TEST=Boot on PC Engines apu3 Inspired by CB:59693 Signed-off-by: Michał Kopeć <michal.kopec(a)3mdeb.com> Change-Id: Ib49e7d3f5956ac7831664d50db5f233b70aa54db --- M src/northbridge/amd/pi/00730F01/Kconfig M src/northbridge/amd/pi/00730F01/northbridge.c 2 files changed, 16 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/59808/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59808 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib49e7d3f5956ac7831664d50db5f233b70aa54db Gerrit-Change-Number: 59808 Gerrit-PatchSet: 2 Gerrit-Owner: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: src/northbridge/amd/pi/00730F01: enable PARALLEL_MP
by Michał Kopeć (Code Review) 01 Dec '21

01 Dec '21

Michał Kopeć has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59808 ) Change subject: src/northbridge/amd/pi/00730F01: enable PARALLEL_MP ...................................................................... src/northbridge/amd/pi/00730F01: enable PARALLEL_MP Disable LEGACY_SMP_INIT to enable PARALLEL_MP. TEST=TEST=Boot on PC Engines apu1 Inspired by CB:59693 Signed-off-by: Michał Kopeć <michal.kopec(a)3mdeb.com> Change-Id: Ib49e7d3f5956ac7831664d50db5f233b70aa54db --- M src/northbridge/amd/pi/00730F01/Kconfig M src/northbridge/amd/pi/00730F01/northbridge.c 2 files changed, 16 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/59808/1 diff --git a/src/northbridge/amd/pi/00730F01/Kconfig b/src/northbridge/amd/pi/00730F01/Kconfig index 27ae673..94abb93 100644 --- a/src/northbridge/amd/pi/00730F01/Kconfig +++ b/src/northbridge/amd/pi/00730F01/Kconfig @@ -2,7 +2,6 @@ config NORTHBRIDGE_AMD_PI_00730F01 bool - select LEGACY_SMP_INIT if NORTHBRIDGE_AMD_PI_00730F01 diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c index 332bf1ac..6e83038 100644 --- a/src/northbridge/amd/pi/00730F01/northbridge.c +++ b/src/northbridge/amd/pi/00730F01/northbridge.c @@ -13,7 +13,7 @@ #include <string.h> #include <stdlib.h> #include <lib.h> -#include <cpu/cpu.h> +#include <cpu/x86/mp.h> #include <Porting.h> #include <AGESA.h> #include <Topology.h> @@ -981,15 +981,27 @@ } } -static void cpu_bus_init(struct device *dev) +static int get_cpu_count(void) { - initialize_cpus(dev->link_list); + uint8_t siblings = cpuid_ecx(0x80000008) & 0xff; + + return siblings + 1; +} + +static const struct mp_ops mp_ops = { + .get_cpu_count = get_cpu_count, +}; + +void mp_init_cpus(struct bus *cpu_bus) +{ + /* TODO: Handle mp_init_with_smm failure? */ + mp_init_with_smm(cpu_bus, &mp_ops); } static struct device_operations cpu_bus_ops = { .read_resources = noop_read_resources, .set_resources = noop_set_resources, - .init = cpu_bus_init, + .init = mp_cpu_bus_init, .scan_bus = cpu_bus_scan, }; -- To view, visit https://review.coreboot.org/c/coreboot/+/59808 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib49e7d3f5956ac7831664d50db5f233b70aa54db Gerrit-Change-Number: 59808 Gerrit-PatchSet: 1 Gerrit-Owner: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: cpu/x86/mp_init.c: Fix building with no smihandler
by Michał Kopeć (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Arthur Heymans. Michał Kopeć has uploaded a new patch set (#4) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/54754 ) Change subject: cpu/x86/mp_init.c: Fix building with no smihandler ...................................................................... cpu/x86/mp_init.c: Fix building with no smihandler The build fails because smm_stub_size() tries to find a symbol that won't be present. Change-Id: I73fee3cf26c0e37cca03299c6730f7b4f1ef6685 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/cpu/x86/mp_init.c 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/54754/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/54754 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I73fee3cf26c0e37cca03299c6730f7b4f1ef6685 Gerrit-Change-Number: 54754 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: src/northbridge/amd/agesa/family14: Enable PARALLEL_MP
by Michał Kopeć (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Michał Żygowski. Michał Kopeć has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59807 ) Change subject: src/northbridge/amd/agesa/family14: Enable PARALLEL_MP ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59807/comment/60dfb234_4b1e301c PS1, Line 10: > Missing `TEST=... […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/59807 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I39a0779bdf115eebe31290591152b920acde773e Gerrit-Change-Number: 59807 Gerrit-PatchSet: 4 Gerrit-Owner: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Comment-Date: Wed, 01 Dec 2021 13:53:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-MessageType: comment

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Change in coreboot[master]: src/northbridge/amd/agesa/family14: Enable PARALLEL_MP
by Michał Kopeć (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Michał Kopeć. Michał Kopeć has uploaded a new patch set (#4). ( https://review.coreboot.org/c/coreboot/+/59807 ) Change subject: src/northbridge/amd/agesa/family14: Enable PARALLEL_MP ...................................................................... src/northbridge/amd/agesa/family14: Enable PARALLEL_MP Disable LEGACY_SMP_INIT to enable PARALLEL_MP. TEST=Boot on PC Engines apu1 Inspired by CB:59693 Signed-off-by: Michał Kopeć <michal.kopec(a)3mdeb.com> Change-Id: I39a0779bdf115eebe31290591152b920acde773e --- M src/northbridge/amd/agesa/family14/Kconfig M src/northbridge/amd/agesa/family14/northbridge.c 2 files changed, 16 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/59807/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/59807 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I39a0779bdf115eebe31290591152b920acde773e Gerrit-Change-Number: 59807 Gerrit-PatchSet: 4 Gerrit-Owner: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit December 2021