coreboot-gerrit December 2021

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Change in coreboot[master]: soc/intel/alderlake: Define a method to return a cpu type
by Sridhar Siricilla (Code Review) 01 Dec '21

01 Dec '21

Sridhar Siricilla has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/59361 ) Change subject: soc/intel/alderlake: Define a method to return a cpu type ...................................................................... Abandoned Per comments, patchset is updated. -- To view, visit https://review.coreboot.org/c/coreboot/+/59361 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifecedac822de71ebbdd43afe8431fd8aa1cdba4c Gerrit-Change-Number: 59361 Gerrit-PatchSet: 1 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-MessageType: abandon

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Change in coreboot[master]: [WIP] src/drivers/intel/fsp2_0: Add FSP 2.3 support
by Subrata Banik (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Anil Kumar K, Paul Menzel, Andrey Petrov, Patrick Rudolph. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59324 ) Change subject: [WIP] src/drivers/intel/fsp2_0: Add FSP 2.3 support ...................................................................... Patch Set 11: (5 comments) Patchset: PS11: > Sure. here are the details. I have added these in Kconfig as well […] @Paul, can you please access https://cdrdv2.intel.com/v1/dl/getContent/644852?explicitVersion=true&wapkw… (FSP 2.3 spec and page 7 has the delta over FSP 2.2) File src/drivers/intel/fsp2_0/hand_off_block.c: https://review.coreboot.org/c/coreboot/+/59324/comment/96f82ccb_3edada60 PS3, Line 24: : #ifdef CONFIG_PLATFORM_USES_FSP2_3 you don't need this guard make fsp_nv_storage_guid_2 no harm https://review.coreboot.org/c/coreboot/+/59324/comment/9fdb79aa_7f1912b6 PS3, Line 318: return fsp_find_extension_hob_by_guid(fsp_nv_storage_guid, size); const uint8_t fsp_nv_storage_guid_2[16] = { 0x8f, 0x78, 0x66, 0x48, 0xa8, 0x6b, 0xd8, 0x47, 0x83, 0x6, 0xac, 0xf7, 0x7f, 0x55, 0x10, 0x46 }; const void *fsp_find_nv_storage_data(size_t *size) { if (CONFIG(PLATFORM_USES_FSP2_3)) return fsp_find_extension_hob_by_guid(fsp_nv_storage_guid_2, size); return fsp_find_extension_hob_by_guid(fsp_nv_storage_guid, size); } File src/drivers/intel/fsp2_0/header_display.c: https://review.coreboot.org/c/coreboot/+/59324/comment/37b8b1bf_453b3c45 PS3, Line 10: ext_revision.val = 0; you don't need this https://review.coreboot.org/c/coreboot/+/59324/comment/3a866356_8853d6fa PS3, Line 14: 6 worthwhile to make use of a macro for this ? or why not like this, because typically all FSP versions are backward compatible so, FSP2.4 should select PLATFORM_USES_FSP2_3 that way this `if` clause will be always true for FSP2.3 onward platform. isn't it ? if (CONFIG(PLATFORM_USES_FSP2_3)) ext_revision.val = hdr->extended_fsp_revision; -- To view, visit https://review.coreboot.org/c/coreboot/+/59324 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ica1bd004286c785aa8a431f39d8efc69982874c1 Gerrit-Change-Number: 59324 Gerrit-PatchSet: 11 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-CC: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 01 Dec 2021 05:17:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anil Kumar K <anil.kumar.k(a)intel.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: cbfs: Remove deprecated APIs
by Werner Zeh (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Christian Walter, Julius Werner, Yu-Ping Wu. Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59682 ) Change subject: cbfs: Remove deprecated APIs ...................................................................... Patch Set 3: (1 comment) Patchset: PS2: > Loading a payload should probably not take over two seconds, unless it is ridiculously huge... how big is the payload you use? And do you happen to know the SPI bus speed for your platform? > I do have a linux kernel as a payload which is uncmpressed ~4,5 MB in size. And I have a SPI clock of 50 MHz while usung a standard SPI interface (so no dual or quad mode enabled). > > Anyway, it should be pretty simple to figure out if this is it: I've uploaded a test CL CB:59767 which just loads the whole payload into RAM before doing anything else with it. Can you try that out and see what difference it makes for your boot times? I will have access to the hardware tomorrow and will give this test patch a try. > (If that's not it, could you try narrowing down a bit further where exactly all this time is spent for you? E.g. just sprinkle some timestamp_add_now(1234) with increasing ID numbers throughout the code to see where the big delay comes from.) Yes, I can try to narrow it down furter. -- To view, visit https://review.coreboot.org/c/coreboot/+/59682 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1cec0ca2d9d311626a087318d1d78163243bfc3c Gerrit-Change-Number: 59682 Gerrit-PatchSet: 3 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Wed, 01 Dec 2021 05:17:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Fix S0i3 regression
by Meera Ravindranath (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Tim Wawrzynczak. Hello Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59790 to look at the new patch set (#2). Change subject: mb/google/brya: Fix S0i3 regression ...................................................................... mb/google/brya: Fix S0i3 regression ACPI PM timer needs to be disabled explicitly in CB to increment S0i3 counter as FSP has no control to do the same since commit:0e905801f8ff6c10b20625e31d851920b3f4c4f2 BUG=b:206922066 TEST=Boot gimble to OS and verify S0i3 counter incrementing Signed-off-by: Meera Ravindranath <meera.ravindranath(a)intel.com> Change-Id: I8005dacd732c033980ccc479375ff5b06df8dac1 --- M src/mainboard/google/brya/Kconfig 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/59790/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59790 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8005dacd732c033980ccc479375ff5b06df8dac1 Gerrit-Change-Number: 59790 Gerrit-PatchSet: 2 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: acpi/acpigen, drivers/tpm: Move definition of set_package_element_op
by build bot (Jenkins) (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Lance Zhao, Tim Wawrzynczak. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59729 ) Change subject: acpi/acpigen, drivers/tpm: Move definition of set_package_element_op ...................................................................... Patch Set 2: Verified+1 (1 comment) File src/include/acpi/acpigen.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134716): https://review.coreboot.org/c/coreboot/+/59729/comment/6508a804_7cbc9509 PS2, Line 530: void acpigen_set_package_element_op(const char *package_name, unsigned int element, uint8_t src_op); line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/59729 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4fe70a1f369c97c67bbc1717e6adc7c5f4ba5839 Gerrit-Change-Number: 59729 Gerrit-PatchSet: 2 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Wed, 01 Dec 2021 05:06:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Fix S0i3 regression
by Meera Ravindranath (Code Review) 01 Dec '21

01 Dec '21

Meera Ravindranath has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59790 ) Change subject: mb/google/brya: Fix S0i3 regression ...................................................................... mb/google/brya: Fix S0i3 regression ACPI PM timer needs to be disabled explicitly in CB since FSP has no control since this commit:0e905801f8ff6c10b20625e31d851920b3f4c4f2 in order to increment S0i3 counter. BUG=b:206922066 TEST=Boot gimble to OS and verify S0i3 counter incrementing Signed-off-by: Meera Ravindranath <meera.ravindranath(a)intel.com> Change-Id: I8005dacd732c033980ccc479375ff5b06df8dac1 --- M src/mainboard/google/brya/Kconfig 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/59790/1 diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index a5ca942..f01eac3 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -157,4 +157,7 @@ in variant.h, as well as T1_OFF_MS (time between PERST & RST) and T2_OFF_MS (time between RST and FCPO). +config USE_PM_ACPI_TIMER + default n + endif # BOARD_GOOGLE_BASEBOARD_BRYA || BOARD_GOOGLE_BASEBOARD_BRASK -- To view, visit https://review.coreboot.org/c/coreboot/+/59790 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8005dacd732c033980ccc479375ff5b06df8dac1 Gerrit-Change-Number: 59790 Gerrit-PatchSet: 1 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: drivers/i2c/tpm: Add override function for TPM I2C bus
by EricR Lai (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Tim Wawrzynczak, Christian Walter. Hello Tim Wawrzynczak, Christian Walter, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59768 to look at the new patch set (#2). Change subject: drivers/i2c/tpm: Add override function for TPM I2C bus ...................................................................... drivers/i2c/tpm: Add override function for TPM I2C bus Provide a way to let boards can determine which TPM bus to use at runtime. Signed-off-by: Eric Lai <ericr_lai(a)compal.corp-partner.google.com> Change-Id: I658468ed3880de0a6b947c212fa8737956928c57 --- M src/drivers/i2c/tpm/Kconfig M src/drivers/i2c/tpm/tis.c M src/drivers/i2c/tpm/tis_atmel.c M src/security/tpm/tis.h 4 files changed, 18 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/59768/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59768 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I658468ed3880de0a6b947c212fa8737956928c57 Gerrit-Change-Number: 59768 Gerrit-PatchSet: 2 Gerrit-Owner: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/common: Add CPU related APIs
by Sridhar Siricilla (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Arthur Heymans, Nico Huber, Maulik V Vaghela, Tim Wawrzynczak, Sugnan Prabhu S, Subrata Banik, Patrick Rudolph. Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59124 ) Change subject: soc/intel/common: Add CPU related APIs ...................................................................... Patch Set 6: (1 comment) File src/soc/intel/common/block/cpu/cpulib.c: https://review.coreboot.org/c/coreboot/+/59124/comment/1ada59b1_ecb95a03 PS1, Line 301: (uint8_t) > I will do it separate patch. Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/59124 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I680f43952ab4abce6e342206688ad32814970a91 Gerrit-Change-Number: 59124 Gerrit-PatchSet: 6 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 01 Dec 2021 04:56:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Comment-In-Reply-To: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Refactor cpu_set_p_state_to_max_non_turbo_ratio
by Sridhar Siricilla (Code Review) 01 Dec '21

01 Dec '21

Sridhar Siricilla has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59789 ) Change subject: soc/intel/common: Refactor cpu_set_p_state_to_max_non_turbo_ratio ...................................................................... soc/intel/common: Refactor cpu_set_p_state_to_max_non_turbo_ratio The patch refectors cpu_set_p_state_to_max_non_turbo_ratio(). The fuction is updated to use cpu_get_max_non_turbo_ratio(). TEST=Build the code for Brya Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Change-Id: If73df17faaf7b870ae311460a868d52352683c0c --- M src/soc/intel/common/block/cpu/cpulib.c 1 file changed, 1 insertion(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/59789/1 diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c index 979de35..770cf5f 100644 --- a/src/soc/intel/common/block/cpu/cpulib.c +++ b/src/soc/intel/common/block/cpu/cpulib.c @@ -137,11 +137,8 @@ */ void cpu_set_p_state_to_max_non_turbo_ratio(void) { - msr_t msr, perf_ctl; - /* Platform Info bits 15:8 give max ratio */ - msr = rdmsr(MSR_PLATFORM_INFO); - perf_ctl.lo = msr.lo & 0xff00; + perf_ctl.lo = (cpu_get_max_non_turbo_ratio() << 8) & 0xff00; perf_ctl.hi = 0; set_perf_control_msr(perf_ctl); -- To view, visit https://review.coreboot.org/c/coreboot/+/59789 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If73df17faaf7b870ae311460a868d52352683c0c Gerrit-Change-Number: 59789 Gerrit-PatchSet: 1 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/alderlake: Add Kconfig for ADL_N PCH
by Usha P (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Reka Norman, Maulik V Vaghela, Paul Menzel, Rizwan Qureshi, Subrata Banik, Sridhar Siricilla, Krishna P Bhat D, Patrick Rudolph, Kangheui Won. Usha P has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59751 ) Change subject: soc/intel/alderlake: Add Kconfig for ADL_N PCH ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59751/comment/d617b27d_9096b99c PS1, Line 7: Adding > Add Done -- To view, visit https://review.coreboot.org/c/coreboot/+/59751 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1be10aea36db5a14ca8d7cf5c087163e44554f78 Gerrit-Change-Number: 59751 Gerrit-PatchSet: 2 Gerrit-Owner: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: Kangheui Won <khwon(a)google.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Reka Norman <rekanorman(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Kangheui Won <khwon(a)google.com> Gerrit-Comment-Date: Wed, 01 Dec 2021 04:51:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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coreboot-gerrit December 2021