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Change in coreboot[master]: libpayload: Implement new CBFS access API
by Jakub Czapiga (Code Review) 02 Dec '21

02 Dec '21

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Change in coreboot[master]: soc/intel/alderlake: Add Kconfig for ADL_N PCH
by Usha P (Code Review) 02 Dec '21

02 Dec '21

Usha P has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/59751 ) Change subject: soc/intel/alderlake: Add Kconfig for ADL_N PCH ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/59751 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1be10aea36db5a14ca8d7cf5c087163e44554f78 Gerrit-Change-Number: 59751 Gerrit-PatchSet: 2 Gerrit-Owner: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: Kangheui Won <khwon(a)google.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: abandon

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Change in coreboot[master]: mb/google/dedede/var/drawcia: Generate new SPD ID for new memory parts
by Karthik Ramasubramanian (Code Review) 02 Dec '21

02 Dec '21

Attention is currently required from: Henry Sun, Robert Chen, Wisley Chen. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59642 ) Change subject: mb/google/dedede/var/drawcia: Generate new SPD ID for new memory parts ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59642 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icb0f211508450b16b2e5d214ae6adc9852718a59 Gerrit-Change-Number: 59642 Gerrit-PatchSet: 5 Gerrit-Owner: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Thu, 02 Dec 2021 16:25:13 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: libpayload: Implement new CBFS access API
by Jakub Czapiga (Code Review) 02 Dec '21

02 Dec '21

Attention is currently required from: Paul Menzel, Julius Werner. Jakub Czapiga has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59497 ) Change subject: libpayload: Implement new CBFS access API ...................................................................... Patch Set 5: (23 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/59497/comment/031f869a_02ad6c6d PS1, Line 7: libpatload > libpayload Done File payloads/libpayload/Makefile: https://review.coreboot.org/c/coreboot/+/59497/comment/c9d977a4_17606707 PS3, Line 294: $$(subst $(absobj)/,$(obj)/, \ > Should probably factor out the generic commonlib support changes into a separate patch. Done File payloads/libpayload/include/cbfs.h: https://review.coreboot.org/c/coreboot/+/59497/comment/67db4005_886eb6b6 PS3, Line 42: * --------------------------------------------------------------------------- > Since this is a new file, let's also use this opportunity to switch to SPDX here and get rid of the […] Done File payloads/libpayload/include/cbfs.h: https://review.coreboot.org/c/coreboot/+/59497/comment/2b502b5b_4c334fc1 PS1, Line 137: if (_cbfs_alloc(name, _cbfs_default_allocator, &arg, &size, force_ro, type)) > Since we don't have cbfs_alloc() and we don't intend to implement more complicated allocators, I thi […] Done File payloads/libpayload/include/cbfs_core.h: https://review.coreboot.org/c/coreboot/+/59497/comment/8e3827d7_d94b8395 PS3, Line 48: #include <commonlib/bsd/cbfs_serialized.h> > Here too (in the headers) I think it would be better to just keep the legacy code and the new code c […] Done File payloads/libpayload/include/cbfs_glue.h: PS3: > license Done https://review.coreboot.org/c/coreboot/+/59497/comment/79594e83_ebd1e1e5 PS3, Line 32: static inline size_t cbfs_dev_offset(cbfs_dev_t dev) > nit: not sure you really need this... […] Done https://review.coreboot.org/c/coreboot/+/59497/comment/4565138c_27a9fada PS3, Line 38: { > This also needs to do range checking. I think […] Done. I accounted for the dev->offset too, as it might better narrow the range. File payloads/libpayload/libcbfs/Kconfig: https://review.coreboot.org/c/coreboot/+/59497/comment/b3ed0512_1fdb2063 PS3, Line 12: bool > This needs a prompt text to be selectable. Done https://review.coreboot.org/c/coreboot/+/59497/comment/ba18decd_1815c248 PS3, Line 16: acrive > typo […] Done File payloads/libpayload/libcbfs/cbfs.c: https://review.coreboot.org/c/coreboot/+/59497/comment/fa82ee86_a077499c PS1, Line 131: cbfs_err_t cbfs_walk(cbfs_dev_t dev, > Try just adding these files to libcbfs-srcs directly and bypass the includemakefiles mechanism. […] Done in CB:59843 File payloads/libpayload/libcbfs/cbfs.c: https://review.coreboot.org/c/coreboot/+/59497/comment/cf400a58_628c1b1f PS3, Line 27: * SUCH DAMAGE. > Same here Done https://review.coreboot.org/c/coreboot/+/59497/comment/b493fabc_6ddf26ee PS3, Line 29: #define LIBPAYLOAD > Can get rid of all this cruft too. This file should never be built outside of libpayload nowadays. Done https://review.coreboot.org/c/coreboot/+/59497/comment/2af7e5bd_e58ddd06 PS3, Line 60: void cbfs_boot_device_find_mcache(struct cbfs_boot_device *cbd, bool is_ro); > Why are these functions not static? Then you don't need prototypes. cbfs_boot_device_find_mcache() can be static, yes. But cbfs_get_boot_device() should be possible to mock, so it cannot be static. I changed the latter function to be defined similar way, as in the main coreboot source :) https://review.coreboot.org/c/coreboot/+/59497/comment/4d4ec0bf_5802358c PS3, Line 91: cbfs_boot_device_find_mcache(&rw, false); > I think rather than making find_mcache() a separate function, it's easier to just set rw.dev. […] Done https://review.coreboot.org/c/coreboot/+/59497/comment/72abb012_6aa7d3b2 PS3, Line 134: ERROR("Metadata hash mismatch for '%s'\n", name); > This doesn't print the name in coreboot because it's not a problem with the particular file, it's a […] Done https://review.coreboot.org/c/coreboot/+/59497/comment/759ac23d_deb7fc16 PS3, Line 141: dev->size = be32toh(mdata->h.len); > cbfs_dev_t is not supposed to be an region_device equivalent and you shouldn't use it like that here […] Done https://review.coreboot.org/c/coreboot/+/59497/comment/21007e94_b9b40820 PS3, Line 156: map > nit: Just because it's not really a mapping here I'd call this different... […] Done https://review.coreboot.org/c/coreboot/+/59497/comment/e61f2c6d_cd0c13a7 PS3, Line 168: #if CONFIG(LP_LZ4) > You should be able to implement this as […] Done https://review.coreboot.org/c/coreboot/+/59497/comment/ff21d475_127d57c3 PS3, Line 178: return 0; > Since decompression works all the same for these algorithms, and there'd be more code duplicated her […] Done. I also moved checks for compression algorithms support to be executed before malloc or boot_device_read() calls to fail quicker. Please, let me know, what do you think about it :) https://review.coreboot.org/c/coreboot/+/59497/comment/a0000e40_ef5dd2f9 PS3, Line 266: **********************************************************************************************/ > I meant this too with moving to cbfs_legacy.c. […] Done File payloads/libpayload/libcbfs/cbfs_mcache.c: PS3: > This, too, should be pulled in from commonlib. Done File payloads/libpayload/tests/libcbfs/cbfs-lookup-test.c: PS1: > Most of this test tests the code in commonlib/bsd/, so if we're reusing that I don't know if it's th […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/59497 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I00da0658dbac0cddf92ad55611def947932d23c7 Gerrit-Change-Number: 59497 Gerrit-PatchSet: 5 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Thu, 02 Dec 2021 16:24:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Jakub Czapiga <jacz(a)semihalf.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Add support for ADL-N PCH
by Usha P (Code Review) 02 Dec '21

02 Dec '21

Attention is currently required from: Reka Norman, Paul Menzel, Rizwan Qureshi, Angel Pons, Subrata Banik, Krishna P Bhat D, Patrick Rudolph, Kangheui Won. Usha P has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59752 ) Change subject: soc/intel/alderlake: Add support for ADL-N PCH ...................................................................... Patch Set 9: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59752/comment/ed887010_da7ed097 PS8, Line 8: : Introduce the `SOC_INTEL_ALDERLAKE_PCH_N` Kconfig option and : use it to specify the correct amount of PCIe I/O. : : Document number 645550 indicates that Alder Lake-N has : 12 PCH root ports and no CPU root ports. : : Document number 645548 indicates ADL-N has 5 clock sources : and 5 clock request signals. > nit: reflow for 72 characters wide in commit messages Done -- To view, visit https://review.coreboot.org/c/coreboot/+/59752 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7ebbcdcdb1ccc34b80ec71ac3e591fe4ad6b1904 Gerrit-Change-Number: 59752 Gerrit-PatchSet: 9 Gerrit-Owner: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Kangheui Won <khwon(a)google.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Reka Norman <rekanorman(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Kangheui Won <khwon(a)google.com> Gerrit-Comment-Date: Thu, 02 Dec 2021 16:22:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Fix S0i3 regression
by Meera Ravindranath (Code Review) 02 Dec '21

02 Dec '21

Attention is currently required from: Lance Zhao, Maulik V Vaghela, Tim Wawrzynczak, Paul Menzel, Subrata Banik, Archana Patni, Michael Niewöhner, Ronak Kanabar. Hello Lance Zhao, build bot (Jenkins), Maulik V Vaghela, Tim Wawrzynczak, Subrata Banik, Archana Patni, Michael Niewöhner, Ronak Kanabar, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59790 to look at the new patch set (#5). Change subject: mb/google/brya: Fix S0i3 regression ...................................................................... mb/google/brya: Fix S0i3 regression Keeping the PM timer enabled will disqualify an ADL system from entering S0i3, and will also cause an increase in power during suspend states. The PM timer is not required for brya boards, therefore disabling it. Fixes: 0e905801 (soc/intel: transition full control over PM Timer from FSP to coreboot) BUG=b:206922066 TEST=Boot gimble to OS and verify S0i3 counter incrementing after exiting S0ix suspend states. Signed-off-by: Meera Ravindranath <meera.ravindranath(a)intel.com> Change-Id: I8005dacd732c033980ccc479375ff5b06df8dac1 --- M src/mainboard/google/brya/Kconfig 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/59790/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/59790 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8005dacd732c033980ccc479375ff5b06df8dac1 Gerrit-Change-Number: 59790 Gerrit-PatchSet: 5 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Archana Patni <archana.patni(a)intel.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Archana Patni <archana.patni(a)intel.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake: Add support for ADL-N PCH
by Usha P (Code Review) 02 Dec '21

02 Dec '21

Attention is currently required from: Reka Norman, Paul Menzel, Rizwan Qureshi, Angel Pons, Subrata Banik, Krishna P Bhat D, Usha P, Patrick Rudolph, Kangheui Won. Hello Felix Singer, build bot (Jenkins), Reka Norman, Maulik V Vaghela, Tim Wawrzynczak, Rizwan Qureshi, Angel Pons, Subrata Banik, Sridhar Siricilla, Krishna P Bhat D, Patrick Rudolph, Kangheui Won, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59752 to look at the new patch set (#9). Change subject: soc/intel/alderlake: Add support for ADL-N PCH ...................................................................... soc/intel/alderlake: Add support for ADL-N PCH Introduce the `SOC_INTEL_ALDERLAKE_PCH_N` Kconfig option and use it to specify the correct amount of PCIe I/O. Document number 645550 indicates that Alder Lake-N has 12 PCH root ports and no CPU root ports. Document number 645548 indicates ADL-N has 5 clock sources and 5 clock request signals. Signed-off-by: Usha P <usha.p(a)intel.com> Change-Id: I7ebbcdcdb1ccc34b80ec71ac3e591fe4ad6b1904 --- M src/soc/intel/alderlake/Kconfig M src/soc/intel/alderlake/include/soc/bootblock.h 2 files changed, 11 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/59752/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/59752 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7ebbcdcdb1ccc34b80ec71ac3e591fe4ad6b1904 Gerrit-Change-Number: 59752 Gerrit-PatchSet: 9 Gerrit-Owner: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Kangheui Won <khwon(a)google.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Reka Norman <rekanorman(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Usha P <usha.p(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Kangheui Won <khwon(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: libpayload/Makefile: Improve object files list creation
by Jakub Czapiga (Code Review) 02 Dec '21

02 Dec '21

Jakub Czapiga has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59843 ) Change subject: libpayload/Makefile: Improve object files list creation ...................................................................... libpayload/Makefile: Improve object files list creation This patch ports some parts of main coreboot Makefile to the libpayload Makefile in order to improve object files creation. Moreover, the coreboot source files are now accessible an will be correctly compiled under libpayload build directory. Change-Id: If1280c0a3f7e99aad2ecf8a0379a98af31ccefc3 Signed-off-by: Jakub Czapiga <jacz(a)semihalf.com> --- M payloads/libpayload/Makefile 1 file changed, 20 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/59843/1 diff --git a/payloads/libpayload/Makefile b/payloads/libpayload/Makefile index 1da8c64..d55b6d7 100644 --- a/payloads/libpayload/Makefile +++ b/payloads/libpayload/Makefile @@ -29,6 +29,10 @@ ## SUCH DAMAGE. ## +ifneq ($(words $(CURDIR)),1) + $(error ERROR: Path to the main directory cannot contain spaces) +endif + ifeq ($(INNER_SCANBUILD),y) CC_real:=$(CC) endif @@ -40,6 +44,7 @@ export obj ?= build export objutil ?= $(obj)/util export objk := $(objutil)/lp_kconfig +export absobj := $(abspath $(obj)) export KCONFIG_AUTOHEADER := $(obj)/config.h export KCONFIG_AUTOCONFIG := $(obj)/auto.conf @@ -290,9 +295,11 @@ $(foreach item,$($(special)-y), $(call $(special)-handler,$(dir $(1)),$(item)))) \ $(foreach class,$(classes), \ $(eval $(class)-srcs+= \ + $$(subst $(absobj)/,$(obj)/, \ $$(subst $(top)/,, \ - $$(abspath $$(addprefix $(dir $(1)),$$($(class)-y)))))) \ - $(eval subdirs+=$$(subst $(CURDIR)/,,$$(abspath $$(addprefix $(dir $(1)),$$(subdirs-y))))) + $$(abspath $$(subst $(dir $(1))/,/,$$(addprefix $(dir $(1)),$$($(class)-y)))))))) \ + $(eval subdirs+=$$(subst $(CURDIR)/,,$$(wildcard $$(abspath $$(addprefix $(dir $(1)),$$(subdirs-y)))))) + # For each path in $(subdirs) call includemakefiles # Repeat until subdirs is empty @@ -311,8 +318,15 @@ include $(TOPLEVEL)/tests/Makefile.inc endif -src-to-obj=$(addsuffix .$(1).o, $(basename $(addprefix $(obj)/, $($(1)-srcs)))) -$(foreach class,$(classes),$(eval $(class)-objs:=$(call src-to-obj,$(class)))) +# Converts one or more source file paths to the corresponding build/ paths. +# $1 lib name +# $2 file path (list) +src-to-obj=\ + $(addsuffix .$(1).o,\ + $(basename \ + $(addprefix $(obj)/,\ + $(subst $(coreboottop)/,coreboot/,$(2))))) +$(foreach class,$(classes),$(eval $(class)-objs:=$(call src-to-obj,$(class),$($(class)-srcs)))) allsrcs:=$(foreach var, $(addsuffix -srcs,$(classes)), $($(var))) allobjs:=$(foreach var, $(addsuffix -objs,$(classes)), $($(var))) @@ -326,7 +340,7 @@ # $4 additional dependencies ifn$(EMPTY)def $(1)-objs_$(2)_template de$(EMPTY)fine $(1)-objs_$(2)_template -$(obj)/$$(1).$(1).o: $$(1).$(2) $(obj)/libpayload-config.h $(4) +$$(call src-to-obj,$(1), $$(1).$(2)): $$(1).$(2) $(obj)/libpayload-config.h $(4) @printf " CC $$$$(subst $$$$(obj)/,,$$$$(@))\n" $(CC) $(3) -MMD $$$$(CFLAGS) $(EXTRA_CFLAGS) -c -o $$$$@ $$$$< en$(EMPTY)def @@ -356,7 +370,7 @@ $(shell mkdir -p $(KCONFIG_SPLITCONFIG) $(obj) $(objk)/lxdialog $(additional-dirs) $(alldirs)) cscope: - cscope -bR + cscope -bR -s$(coreboottop)/src/commonlib/bsd doxy: doxygen doxygen: -- To view, visit https://review.coreboot.org/c/coreboot/+/59843 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If1280c0a3f7e99aad2ecf8a0379a98af31ccefc3 Gerrit-Change-Number: 59843 Gerrit-PatchSet: 1 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: libpayload: Implement new CBFS access API
by Jakub Czapiga (Code Review) 02 Dec '21

02 Dec '21

Attention is currently required from: Jakub Czapiga. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59497 to look at the new patch set (#5). Change subject: libpayload: Implement new CBFS access API ...................................................................... libpayload: Implement new CBFS access API Change-Id: I00da0658dbac0cddf92ad55611def947932d23c7 Signed-off-by: Jakub Czapiga <jacz(a)semihalf.com> --- M payloads/libpayload/Kconfig M payloads/libpayload/Makefile.inc M payloads/libpayload/include/cbfs.h M payloads/libpayload/include/cbfs_core.h A payloads/libpayload/include/cbfs_glue.h A payloads/libpayload/include/cbfs_legacy.h A payloads/libpayload/libcbfs/Kconfig M payloads/libpayload/libcbfs/Makefile.inc M payloads/libpayload/libcbfs/cbfs.c M payloads/libpayload/libcbfs/cbfs_core.c A payloads/libpayload/libcbfs/cbfs_legacy.c M payloads/libpayload/tests/Makefile.inc A payloads/libpayload/tests/include/mocks/cbfs_util.h A payloads/libpayload/tests/libcbfs/Makefile.inc A payloads/libpayload/tests/libcbfs/cbfs-lookup-test.c A payloads/libpayload/tests/mocks/cbfs_file_mock.c A payloads/libpayload/tests/mocks/die.c 17 files changed, 1,795 insertions(+), 418 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/59497/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/59497 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I00da0658dbac0cddf92ad55611def947932d23c7 Gerrit-Change-Number: 59497 Gerrit-PatchSet: 5 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: libpayload/libc/fmap: Implement new FlashMap API
by Jakub Czapiga (Code Review) 02 Dec '21

02 Dec '21

Attention is currently required from: Jakub Czapiga. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59494 to look at the new patch set (#4). Change subject: libpayload/libc/fmap: Implement new FlashMap API ...................................................................... libpayload/libc/fmap: Implement new FlashMap API This patch introduces new FlashMap API, the fmap_locate_area(). This function requires implementation of libpayload_boot_device_read(), and either lib_sysinfo.fmap_cache or lib_sysinfo.fmap_offset to be set. This function uses its own cache in RAM to limit flash reads to maximum of two calls to libpayload_boot_device_read(). Change-Id: Idbf9016ce73aa58e17f3ee19920ab83dc6c25abb Signed-off-by: Jakub Czapiga <jacz(a)semihalf.com> --- A payloads/libpayload/include/fmap.h M payloads/libpayload/include/libpayload.h M payloads/libpayload/libc/fmap.c A payloads/libpayload/tests/include/mocks/boot_device.h A payloads/libpayload/tests/libc/Makefile.inc A payloads/libpayload/tests/libc/fmap_locate_area-test.c A payloads/libpayload/tests/mocks/boot_device.c 7 files changed, 287 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/59494/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/59494 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idbf9016ce73aa58e17f3ee19920ab83dc6c25abb Gerrit-Change-Number: 59494 Gerrit-PatchSet: 4 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit December 2021