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Change subject: lib: Fix edge case of log2_ceil()
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
Could log2(x - 1) + 1 achieve the same without casting to 64 bits? That would make this more efficient on x86.
Also, please keep the libpayload version in sync with this.
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Change subject: soc/intel/alderlake: Add override skip_cse_sub_part_update() for alderlake
......................................................................
Patch Set 2: Code-Review+2
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59826/comment/8bcab57b_ca1adcde
PS2, Line 7: alderlake
nit: `adl` so it will fit in a 72 character wide line
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Change subject: soc/intel/alderlake: Add override skip_cse_sub_part_update() for alderlake
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
Are you planning to add the CONFIG_CSE_SUB_PART_UPDATE=y, etc. into the config.baseboard.brya file?
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Change subject: soc/intel/common: Add support for CSE IOM/NPHY sub-parition update
......................................................................
Patch Set 16: Code-Review+2
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59685/comment/969333d9_f76cffc1
PS16, Line 15: 1.
nit: space after `1. `
https://review.coreboot.org/c/coreboot/+/59685/comment/c56e05cf_33e36423
PS16, Line 20: 2.
nit: space after `2. `
https://review.coreboot.org/c/coreboot/+/59685/comment/6828421d_8ff5da99
PS16, Line 25: 1.coreboot will navigate through the CSE region,
: identify the CSE’s NPHY FW version and BIOS NPHY version.
: 2.Compare both versions, if there is a difference, CSE will trigger an
: NPHY FW update. Otherwise, skips the NPHY FW update.
:
: IOM Update:
: 1.coreboot will navigate through the CSE region, identify CSE's IOM
: FW version and BIOS IOM version.
: 2.Compares both versions, if there is a difference, coreboot will
: trigger an IOM FW update.Otherwise, skip IOM FW update.
same here, spaces after `1. `, etc.
File src/soc/intel/common/block/cse/cse_lite.c:
https://review.coreboot.org/c/coreboot/+/59685/comment/1d27b1dc_2edb68e6
PS16, Line 405:
: __weak bool skip_cse_sub_part_update(void)
: {
: return false;
: }
nit; I don't think this weak function definition is still required.
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Change subject: soc/intel/common: Add check before sending HMRFPO_ENABLE command
......................................................................
Patch Set 6: Code-Review+2
(1 comment)
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https://review.coreboot.org/c/coreboot/+/59698/comment/4bd39965_062f69b4
PS6, Line 9: The patch add check if CSE's current operation mode
`This patch adds a check to determine if the CSE's current operation mode is...`
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Change subject: soc/intel/common: Rename compare_cse_version() function name
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Patch Set 16: Code-Review+1
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