coreboot-gerrit December 2021

coreboot-gerrit@coreboot.org

1 participants
5525 discussions

Change in coreboot[master]: mb/prodrive/hermes: Add VBT for Avalanche systems
by Felix Held (Code Review) 03 Dec '21

03 Dec '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59838 ) Change subject: mb/prodrive/hermes: Add VBT for Avalanche systems ...................................................................... mb/prodrive/hermes: Add VBT for Avalanche systems The Hermes mainboard is used in different system configurations. The current VBT for Poseidon systems is unsuitable for Avalanche systems because display ports are connected differently. Add a new field in the BMC config EEPROM layout and use it to choose the correct VBT for every system configuration. Change-Id: I2647f2ae3f496b9ad75980ba86beb7800fdb0668 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59838 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/mainboard/prodrive/hermes/Makefile.inc A src/mainboard/prodrive/hermes/avalanche-data.vbt M src/mainboard/prodrive/hermes/eeprom.h M src/mainboard/prodrive/hermes/mainboard.c 4 files changed, 14 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved diff --git a/src/mainboard/prodrive/hermes/Makefile.inc b/src/mainboard/prodrive/hermes/Makefile.inc index caaddec..63be66c 100644 --- a/src/mainboard/prodrive/hermes/Makefile.inc +++ b/src/mainboard/prodrive/hermes/Makefile.inc @@ -10,3 +10,5 @@ ramstage-y += mainboard.c ramstage-y += eeprom.c ramstage-y += smbios.c + +$(call add_vbt_to_cbfs, vbt-avalanche.bin, avalanche-data.vbt) diff --git a/src/mainboard/prodrive/hermes/avalanche-data.vbt b/src/mainboard/prodrive/hermes/avalanche-data.vbt new file mode 100644 index 0000000..c351331 --- /dev/null +++ b/src/mainboard/prodrive/hermes/avalanche-data.vbt Binary files differ diff --git a/src/mainboard/prodrive/hermes/eeprom.h b/src/mainboard/prodrive/hermes/eeprom.h index a42a3d7..4b609df 100644 --- a/src/mainboard/prodrive/hermes/eeprom.h +++ b/src/mainboard/prodrive/hermes/eeprom.h @@ -63,6 +63,7 @@ struct __packed eeprom_bmc_settings { uint8_t pcie_mux; uint8_t hsi; + uint8_t efp3_displayport; }; #define HERMES_SERIAL_NUMBER_LENGTH 32 diff --git a/src/mainboard/prodrive/hermes/mainboard.c b/src/mainboard/prodrive/hermes/mainboard.c index 81ed641..6ca9613 100644 --- a/src/mainboard/prodrive/hermes/mainboard.c +++ b/src/mainboard/prodrive/hermes/mainboard.c @@ -8,6 +8,7 @@ #include <crc_byte.h> #include <device/device.h> #include <device/dram/spd.h> +#include <drivers/intel/gma/opregion.h> #include <gpio.h> #include <intelblocks/gpio.h> #include <intelblocks/pmclib.h> @@ -18,6 +19,16 @@ #include "eeprom.h" #include "gpio.h" +const char *mainboard_vbt_filename(void) +{ + const struct eeprom_bmc_settings *bmc_cfg = get_bmc_settings(); + + if (bmc_cfg && bmc_cfg->efp3_displayport) + return "vbt-avalanche.bin"; + else + return "vbt.bin"; /* Poseidon */ +} + /* FIXME: Example code below */ static void mb_configure_dp1_pwr(bool enable) -- To view, visit https://review.coreboot.org/c/coreboot/+/59838 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2647f2ae3f496b9ad75980ba86beb7800fdb0668 Gerrit-Change-Number: 59838 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

1 0

Change in coreboot[master]: mb/prodrive/hermes: Correct memory RCOMP settings
by Felix Held (Code Review) 03 Dec '21

03 Dec '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58364 ) Change subject: mb/prodrive/hermes: Correct memory RCOMP settings ...................................................................... mb/prodrive/hermes: Correct memory RCOMP settings The original RCOMP resistor and target values only apply to ULT CPUs and do not make sense for the CFL-S CPUs Hermes uses. Fix the RCOMP settings and the associated comments. Tested, still boots. Change-Id: I015797c58c914c6581d472e6d70d2dd7bad2b14f Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58364 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/mainboard/prodrive/hermes/romstage.c 1 file changed, 4 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved diff --git a/src/mainboard/prodrive/hermes/romstage.c b/src/mainboard/prodrive/hermes/romstage.c index 513bab3..b52c52c 100644 --- a/src/mainboard/prodrive/hermes/romstage.c +++ b/src/mainboard/prodrive/hermes/romstage.c @@ -24,11 +24,11 @@ .spd_spec = {.spd_smbus_address = 0xa6} }, - /* Baseboard uses 121, 81 and 100 rcomp resistors */ - .rcomp_resistor = {121, 81, 100}, + /* Rcomp resistors on CFL-S are located on the CPU itself */ + .rcomp_resistor = {121, 75, 100}, - /* Baseboard Rcomp target values. */ - .rcomp_targets = {100, 40, 20, 20, 26}, + /* Rcomp target values for CFL-S, DDR4 and 2 DIMMs per channel */ + .rcomp_targets = {60, 26, 20, 20, 26}, /* Baseboard is an interleaved design */ .dq_pins_interleaved = 1, -- To view, visit https://review.coreboot.org/c/coreboot/+/58364 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I015797c58c914c6581d472e6d70d2dd7bad2b14f Gerrit-Change-Number: 58364 Gerrit-PatchSet: 5 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

1 0

Change in coreboot[master]: mb/prodrive/hermes: Configure ALC888 port B Vref
by Felix Held (Code Review) 03 Dec '21

03 Dec '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58879 ) Change subject: mb/prodrive/hermes: Configure ALC888 port B Vref ...................................................................... mb/prodrive/hermes: Configure ALC888 port B Vref Define a new field in the board config EEPROM layout for port B Vref. Write port B Vref settings to unused non-volatile NID 0x12 instead of NID 0x18, the actual port B NID. Because per-port Vref settings don't persist after codec resets, a custom Realtek driver (ab)uses NID 0x12 to restore port B Vref after resetting the codec. Change-Id: Iaa11ba9c74f643e94046d4983fbce65dbedd1025 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58879 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/prodrive/hermes/eeprom.h M src/mainboard/prodrive/hermes/hda_verb.c 2 files changed, 29 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved diff --git a/src/mainboard/prodrive/hermes/eeprom.h b/src/mainboard/prodrive/hermes/eeprom.h index 26f2faa..a42a3d7 100644 --- a/src/mainboard/prodrive/hermes/eeprom.h +++ b/src/mainboard/prodrive/hermes/eeprom.h @@ -51,12 +51,13 @@ uint8_t blue_rear_vref; uint8_t front_panel_audio; uint8_t pxe_boot_capability; + uint8_t pink_rear_vref; }; - uint8_t raw_settings[9]; + uint8_t raw_settings[10]; }; }; -_Static_assert(sizeof(struct eeprom_board_settings) == (9 + sizeof(uint32_t)), +_Static_assert(sizeof(struct eeprom_board_settings) == (10 + sizeof(uint32_t)), "struct eeprom_board_settings has invalid size!"); struct __packed eeprom_bmc_settings { diff --git a/src/mainboard/prodrive/hermes/hda_verb.c b/src/mainboard/prodrive/hermes/hda_verb.c index 760cecc..7514ce9 100644 --- a/src/mainboard/prodrive/hermes/hda_verb.c +++ b/src/mainboard/prodrive/hermes/hda_verb.c @@ -90,6 +90,23 @@ } } +static u32 get_port_b_vref_cfg(uint8_t pink_rear_vref) +{ + switch (pink_rear_vref) { + default: + case 0: + return 0x411110f0; /* Disabled (Hi-Z) */ + case 1: + return 0x411111f0; /* 50% of LDO out */ + case 2: + return 0x411114f0; /* 80% of LDO out */ + case 3: + return 0x411115f0; /* 100% of LDO out */ + case 4: + return 0x411112f0; /* Ground */ + } +} + static u32 get_front_panel_cfg(uint8_t front_panel_audio) { switch (front_panel_audio) { @@ -122,7 +139,16 @@ const u32 front_mic_cfg = get_front_mic_cfg(board_cfg->front_panel_audio); + const u32 port_b_vref_cfg = get_port_b_vref_cfg(board_cfg->pink_rear_vref); + const u32 verbs[] = { + /* + * Write port B Vref settings to unused non-volatile NID 0x12 instead of + * NID 0x18, the actual port B NID. Because per-port Vref settings don't + * persist after codec resets, a custom Realtek driver (ab)uses NID 0x12 + * to restore port B Vref after resetting the codec. + */ + AZALIA_PIN_CFG(0, 0x12, port_b_vref_cfg), AZALIA_PIN_CFG(0, 0x19, front_mic_cfg), AZALIA_PIN_CFG(0, 0x1b, front_panel_cfg), 0x0205000d, /* Pin 37 vrefo hidden register - used as port C vref */ -- To view, visit https://review.coreboot.org/c/coreboot/+/58879 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaa11ba9c74f643e94046d4983fbce65dbedd1025 Gerrit-Change-Number: 58879 Gerrit-PatchSet: 5 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Justin van Son <justin.van.son(a)prodrive-technologies.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

1 0

Change in coreboot[master]: mb/prodrive/hermes: Update r04 front audio config
by Felix Held (Code Review) 03 Dec '21

03 Dec '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59545 ) Change subject: mb/prodrive/hermes: Update r04 front audio config ...................................................................... mb/prodrive/hermes: Update r04 front audio config Update the pin configs for the front panel jacks. Change-Id: I3760f0a25e964cf0eba99d180fd6f3e8488af868 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59545 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/mainboard/prodrive/hermes/hda_verb.c 1 file changed, 10 insertions(+), 11 deletions(-) Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved diff --git a/src/mainboard/prodrive/hermes/hda_verb.c b/src/mainboard/prodrive/hermes/hda_verb.c index c818d26..760cecc 100644 --- a/src/mainboard/prodrive/hermes/hda_verb.c +++ b/src/mainboard/prodrive/hermes/hda_verb.c @@ -97,21 +97,17 @@ case 0: return AZALIA_PIN_CFG_NC(0); case 1: - return 0x022a4c40; + return 0x02214c40; case 2: - return AZALIA_PIN_DESC( - INTEGRATED, - INTERNAL, - NA, - SPEAKER, - TYPE_UNKNOWN, - COLOR_UNKNOWN, - false, - 0xf, - 0); + return 0x0227ec40; } } +static u32 get_front_mic_cfg(uint8_t front_panel_audio) +{ + return front_panel_audio == 2 ? AZALIA_PIN_CFG_NC(0) : 0x02a19c20; +} + static void mainboard_r0x_configure_alc888(u8 *base, u32 viddid) { /* Overwrite settings made by baseboard */ @@ -124,7 +120,10 @@ const u32 front_panel_cfg = get_front_panel_cfg(board_cfg->front_panel_audio); + const u32 front_mic_cfg = get_front_mic_cfg(board_cfg->front_panel_audio); + const u32 verbs[] = { + AZALIA_PIN_CFG(0, 0x19, front_mic_cfg), AZALIA_PIN_CFG(0, 0x1b, front_panel_cfg), 0x0205000d, /* Pin 37 vrefo hidden register - used as port C vref */ get_port_c_vref_cfg(board_cfg->blue_rear_vref), -- To view, visit https://review.coreboot.org/c/coreboot/+/59545 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3760f0a25e964cf0eba99d180fd6f3e8488af868 Gerrit-Change-Number: 59545 Gerrit-PatchSet: 5 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

1 0

Change in coreboot[master]: mb/prodrive/hermes: Clean up some cosmetics
by Felix Held (Code Review) 03 Dec '21

03 Dec '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59672 ) Change subject: mb/prodrive/hermes: Clean up some cosmetics ...................................................................... mb/prodrive/hermes: Clean up some cosmetics Use lowercase for hex numbers, sort includes alphabetically and avoid relying on indirect inclusion. Include `<intelblocks/gpio.h>` instead of `<intelblocks/gpio_defs.h>`, as the latter implcitly relies on one definition from `<soc/gpio.h>`. Also drop useless dsdt.asl and fix up the indentation of some includes. Tested with BUILD_TIMELESS=1, Prodrive Hermes remains identical. Change-Id: I3aeb9a644cf33cb4b1987174f40ef0fc7daccfa9 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59672 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/mainboard/prodrive/hermes/dsdt.asl M src/mainboard/prodrive/hermes/eeprom.c M src/mainboard/prodrive/hermes/eeprom.h M src/mainboard/prodrive/hermes/gpio.c M src/mainboard/prodrive/hermes/hda_verb.c M src/mainboard/prodrive/hermes/mainboard.c M src/mainboard/prodrive/hermes/romstage.c M src/mainboard/prodrive/hermes/smbios.c 8 files changed, 25 insertions(+), 26 deletions(-) Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved diff --git a/src/mainboard/prodrive/hermes/dsdt.asl b/src/mainboard/prodrive/hermes/dsdt.asl index 97bee96..9d62f40 100644 --- a/src/mainboard/prodrive/hermes/dsdt.asl +++ b/src/mainboard/prodrive/hermes/dsdt.asl @@ -7,22 +7,19 @@ ACPI_DSDT_REV_2, OEM_ID, ACPI_TABLE_CREATOR, - 0x20110725 // OEM revision + 0x20110725 ) { #include <acpi/dsdt_top.asl> #include <soc/intel/common/block/acpi/acpi/platform.asl> - - // global NVS and variables #include <soc/intel/common/block/acpi/acpi/globalnvs.asl> Scope (\_SB) { Device (PCI0) { - #include <soc/intel/common/block/acpi/acpi/northbridge.asl> - #include <soc/intel/cannonlake/acpi/southbridge.asl> + #include <soc/intel/common/block/acpi/acpi/northbridge.asl> + #include <soc/intel/cannonlake/acpi/southbridge.asl> } } #include <southbridge/intel/common/acpi/sleepstates.asl> - } diff --git a/src/mainboard/prodrive/hermes/eeprom.c b/src/mainboard/prodrive/hermes/eeprom.c index 006f922..5385a4a 100644 --- a/src/mainboard/prodrive/hermes/eeprom.c +++ b/src/mainboard/prodrive/hermes/eeprom.c @@ -1,10 +1,10 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <assert.h> -#include <device/pci_ops.h> -#include <delay.h> #include <console/console.h> #include <crc_byte.h> +#include <delay.h> +#include <device/pci_ops.h> #include <device/smbus_host.h> #include <soc/intel/common/block/smbus/smbuslib.h> #include <types.h> diff --git a/src/mainboard/prodrive/hermes/eeprom.h b/src/mainboard/prodrive/hermes/eeprom.h index 0d4e9d8..26f2faa 100644 --- a/src/mainboard/prodrive/hermes/eeprom.h +++ b/src/mainboard/prodrive/hermes/eeprom.h @@ -1,6 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ +#include <assert.h> #include <soc/ramstage.h> +#include <types.h> union eeprom_dimm_layout { struct __packed { @@ -71,7 +73,7 @@ FSPM_UPD mupd; }; union { - uint8_t RawFSPSUPD[0xC00]; + uint8_t RawFSPSUPD[0xc00]; FSPS_UPD supd; }; union { @@ -82,7 +84,7 @@ char board_serial_number[HERMES_SERIAL_NUMBER_LENGTH]; uint8_t BootOrder[0x8c0]; union { - uint8_t RawBoardSetting[0xF8]; + uint8_t RawBoardSetting[0xf8]; struct eeprom_board_settings BoardSettings; }; union { @@ -92,7 +94,7 @@ }; _Static_assert(sizeof(FSPM_UPD) <= 0x600, "FSPM_UPD too big"); -_Static_assert(sizeof(FSPS_UPD) <= 0xC00, "FSPS_UPD too big"); +_Static_assert(sizeof(FSPS_UPD) <= 0xc00, "FSPS_UPD too big"); _Static_assert(sizeof(struct eeprom_layout) == 0x2000, "EEPROM layout size mismatch"); bool eeprom_read_buffer(void *blob, size_t read_offset, size_t size); diff --git a/src/mainboard/prodrive/hermes/gpio.c b/src/mainboard/prodrive/hermes/gpio.c index 97e6740..f228ef8 100644 --- a/src/mainboard/prodrive/hermes/gpio.c +++ b/src/mainboard/prodrive/hermes/gpio.c @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <commonlib/helpers.h> +#include <intelblocks/gpio.h> #include <soc/gpio.h> -#include <intelblocks/gpio_defs.h> #include "gpio.h" diff --git a/src/mainboard/prodrive/hermes/hda_verb.c b/src/mainboard/prodrive/hermes/hda_verb.c index 06f2289..c818d26 100644 --- a/src/mainboard/prodrive/hermes/hda_verb.c +++ b/src/mainboard/prodrive/hermes/hda_verb.c @@ -21,7 +21,7 @@ AZALIA_PIN_CFG(0, 0x1c, 0x411111f0), /* CD audio - disabled */ AZALIA_PIN_CFG(0, 0x1d, 0x4004c601), /* BEEPIN */ AZALIA_PIN_CFG(0, 0x1e, 0x01452160), /* SPDIF-OUT */ - AZALIA_PIN_CFG(0, 0x1f, 0x01C52170), /* SPDIF-IN */ + AZALIA_PIN_CFG(0, 0x1f, 0x01c52170), /* SPDIF-IN */ /* Config for R02 and older */ AZALIA_PIN_CFG(0, 0x19, 0x02214c40), /* port F - front hp out */ @@ -31,11 +31,11 @@ /* * VerbTable: CFL Display Audio Codec - * Revision ID = 0xFF - * Codec Vendor: 0x8086280B + * Revision ID = 0xff + * Codec Vendor: 0x8086280b */ - 0x8086280B, - 0xFFFFFFFF, + 0x8086280b, + 0xffffffff, 5, /* Number of 4 dword sets */ AZALIA_SUBVENDOR(2, 0x80860101), diff --git a/src/mainboard/prodrive/hermes/mainboard.c b/src/mainboard/prodrive/hermes/mainboard.c index 1155b96..81ed641 100644 --- a/src/mainboard/prodrive/hermes/mainboard.c +++ b/src/mainboard/prodrive/hermes/mainboard.c @@ -1,19 +1,19 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <arch/cpu.h> #include <acpi/acpigen.h> +#include <arch/cpu.h> +#include <bootstate.h> #include <cbmem.h> #include <console/console.h> #include <crc_byte.h> -#include <bootstate.h> #include <device/device.h> #include <device/dram/spd.h> #include <gpio.h> -#include <intelblocks/gpio_defs.h> +#include <intelblocks/gpio.h> #include <intelblocks/pmclib.h> +#include <smbios.h> #include <soc/gpio.h> #include <types.h> -#include <smbios.h> #include "eeprom.h" #include "gpio.h" diff --git a/src/mainboard/prodrive/hermes/romstage.c b/src/mainboard/prodrive/hermes/romstage.c index 32b4c76..513bab3 100644 --- a/src/mainboard/prodrive/hermes/romstage.c +++ b/src/mainboard/prodrive/hermes/romstage.c @@ -9,19 +9,19 @@ /* Access memory info through SMBUS. */ .spd[0] = { .read_type = READ_SMBUS, - .spd_spec = {.spd_smbus_address = 0xA0} + .spd_spec = {.spd_smbus_address = 0xa0} }, .spd[1] = { .read_type = READ_SMBUS, - .spd_spec = {.spd_smbus_address = 0xA2} + .spd_spec = {.spd_smbus_address = 0xa2} }, .spd[2] = { .read_type = READ_SMBUS, - .spd_spec = {.spd_smbus_address = 0xA4} + .spd_spec = {.spd_smbus_address = 0xa4} }, .spd[3] = { .read_type = READ_SMBUS, - .spd_spec = {.spd_smbus_address = 0xA6} + .spd_spec = {.spd_smbus_address = 0xa6} }, /* Baseboard uses 121, 81 and 100 rcomp resistors */ diff --git a/src/mainboard/prodrive/hermes/smbios.c b/src/mainboard/prodrive/hermes/smbios.c index 624549e..c1325d4 100644 --- a/src/mainboard/prodrive/hermes/smbios.c +++ b/src/mainboard/prodrive/hermes/smbios.c @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <smbios.h> -#include <types.h> #include <string.h> +#include <types.h> #include "eeprom.h" -- To view, visit https://review.coreboot.org/c/coreboot/+/59672 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3aeb9a644cf33cb4b1987174f40ef0fc7daccfa9 Gerrit-Change-Number: 59672 Gerrit-PatchSet: 3 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

1 0

Change in coreboot[master]: mb/prodrive/hermes: Get rid of variant structure
by Felix Held (Code Review) 03 Dec '21

03 Dec '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59671 ) Change subject: mb/prodrive/hermes: Get rid of variant structure ...................................................................... mb/prodrive/hermes: Get rid of variant structure There's no need to use a variant structure here. Only one variant is used, and revision-specific differences are handled at run-time, and it's unlikely that another variant will ever exist. Reorganize the mainboard code to get rid of the variant structure. Change-Id: I1543f5b76975b0e7183fbb759e9bae5c34151d06 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59671 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/mainboard/prodrive/hermes/Kconfig M src/mainboard/prodrive/hermes/Makefile.inc M src/mainboard/prodrive/hermes/board_info.txt M src/mainboard/prodrive/hermes/bootblock.c R src/mainboard/prodrive/hermes/data.vbt M src/mainboard/prodrive/hermes/eeprom.c R src/mainboard/prodrive/hermes/eeprom.h R src/mainboard/prodrive/hermes/gpio.c R src/mainboard/prodrive/hermes/gpio.h M src/mainboard/prodrive/hermes/hda_verb.c M src/mainboard/prodrive/hermes/mainboard.c D src/mainboard/prodrive/hermes/memory.c M src/mainboard/prodrive/hermes/ramstage.c M src/mainboard/prodrive/hermes/romstage.c M src/mainboard/prodrive/hermes/smbios.c D src/mainboard/prodrive/hermes/variants/baseboard/Makefile.inc D src/mainboard/prodrive/hermes/variants/baseboard/board_info.txt D src/mainboard/prodrive/hermes/variants/baseboard/hda_verb.c D src/mainboard/prodrive/hermes/variants/baseboard/include/variant/variants.h D src/mainboard/prodrive/hermes/variants/r04/hda_verb.c 20 files changed, 185 insertions(+), 225 deletions(-) Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved diff --git a/src/mainboard/prodrive/hermes/Kconfig b/src/mainboard/prodrive/hermes/Kconfig index af07ee1..ae7b5f1 100644 --- a/src/mainboard/prodrive/hermes/Kconfig +++ b/src/mainboard/prodrive/hermes/Kconfig @@ -45,9 +45,6 @@ bool default n -config VARIANT_DIR - default "baseboard" if BOARD_PRODRIVE_HERMES_BASEBOARD - config MAX_CPUS int default 16 diff --git a/src/mainboard/prodrive/hermes/Makefile.inc b/src/mainboard/prodrive/hermes/Makefile.inc index d13b50a..caaddec 100644 --- a/src/mainboard/prodrive/hermes/Makefile.inc +++ b/src/mainboard/prodrive/hermes/Makefile.inc @@ -1,16 +1,12 @@ # SPDX-License-Identifier: GPL-2.0-or-later -subdirs-y += variants/$(VARIANT_DIR) -CPPFLAGS_common += -I$(src)/mainboard/prodrive/hermes/variants/$(VARIANT_DIR)/include - bootblock-y += bootblock.c -romstage-y += memory.c +bootblock-y += gpio.c + romstage-y += eeprom.c +ramstage-y += gpio.c ramstage-y += ramstage.c ramstage-y += mainboard.c ramstage-y += eeprom.c ramstage-y += smbios.c - -ramstage-$(CONFIG_AZALIA_PLUGIN_SUPPORT) += variants/baseboard/hda_verb.c -ramstage-$(CONFIG_AZALIA_PLUGIN_SUPPORT) += variants/r04/hda_verb.c diff --git a/src/mainboard/prodrive/hermes/board_info.txt b/src/mainboard/prodrive/hermes/board_info.txt index 72bcfa9..3a5aff4 100644 --- a/src/mainboard/prodrive/hermes/board_info.txt +++ b/src/mainboard/prodrive/hermes/board_info.txt @@ -1,5 +1,7 @@ Category: server Vendor name: Prodrive +Board name: Hermes +Board URL: https://prodrive-technologies.com/products/embedded-computing-systems/mothe… ROM package: SOIC-8 ROM protocol: SPI ROM socketed: n diff --git a/src/mainboard/prodrive/hermes/bootblock.c b/src/mainboard/prodrive/hermes/bootblock.c index 40fd0b4..9db1fa8 100644 --- a/src/mainboard/prodrive/hermes/bootblock.c +++ b/src/mainboard/prodrive/hermes/bootblock.c @@ -2,8 +2,9 @@ #include <bootblock_common.h> #include <console/console.h> +#include <gpio.h> #include <soc/gpio.h> -#include <variant/gpio.h> + #include "gpio.h" void bootblock_mainboard_early_init(void) diff --git a/src/mainboard/prodrive/hermes/variants/baseboard/data.vbt b/src/mainboard/prodrive/hermes/data.vbt similarity index 100% rename from src/mainboard/prodrive/hermes/variants/baseboard/data.vbt rename to src/mainboard/prodrive/hermes/data.vbt Binary files differ diff --git a/src/mainboard/prodrive/hermes/eeprom.c b/src/mainboard/prodrive/hermes/eeprom.c index cdea67d..006f922 100644 --- a/src/mainboard/prodrive/hermes/eeprom.c +++ b/src/mainboard/prodrive/hermes/eeprom.c @@ -9,7 +9,7 @@ #include <soc/intel/common/block/smbus/smbuslib.h> #include <types.h> -#include "variants/baseboard/include/eeprom.h" +#include "eeprom.h" #define I2C_ADDR_EEPROM 0x57 diff --git a/src/mainboard/prodrive/hermes/variants/baseboard/include/eeprom.h b/src/mainboard/prodrive/hermes/eeprom.h similarity index 100% rename from src/mainboard/prodrive/hermes/variants/baseboard/include/eeprom.h rename to src/mainboard/prodrive/hermes/eeprom.h diff --git a/src/mainboard/prodrive/hermes/variants/baseboard/gpio.c b/src/mainboard/prodrive/hermes/gpio.c similarity index 99% rename from src/mainboard/prodrive/hermes/variants/baseboard/gpio.c rename to src/mainboard/prodrive/hermes/gpio.c index 7f81842..97e6740 100644 --- a/src/mainboard/prodrive/hermes/variants/baseboard/gpio.c +++ b/src/mainboard/prodrive/hermes/gpio.c @@ -1,10 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include "include/variant/gpio.h" #include <commonlib/helpers.h> #include <soc/gpio.h> #include <intelblocks/gpio_defs.h> +#include "gpio.h" + /* Pad configuration in ramstage */ static const struct pad_config gpio_table[] = { /* ------- GPIO Group GPP_A ------- */ diff --git a/src/mainboard/prodrive/hermes/variants/baseboard/include/variant/gpio.h b/src/mainboard/prodrive/hermes/gpio.h similarity index 100% rename from src/mainboard/prodrive/hermes/variants/baseboard/include/variant/gpio.h rename to src/mainboard/prodrive/hermes/gpio.h diff --git a/src/mainboard/prodrive/hermes/hda_verb.c b/src/mainboard/prodrive/hermes/hda_verb.c index 9780e7d..06f2289 100644 --- a/src/mainboard/prodrive/hermes/hda_verb.c +++ b/src/mainboard/prodrive/hermes/hda_verb.c @@ -2,10 +2,135 @@ #include <device/azalia_device.h> #include <types.h> -#include <console/console.h> -#include "variants/baseboard/include/eeprom.h" -#include "variants/baseboard/include/variant/variants.h" +#include "eeprom.h" + +const u32 cim_verb_data[] = { + 0x10ec0888, /* Codec Vendor / Device ID: Realtek ALC888 */ + 0x10ec0888, /* Subsystem ID */ + 15, /* Number of 4 dword sets */ + AZALIA_SUBVENDOR(0, 0x1d336700), + + /* Pin widgets */ + AZALIA_PIN_CFG(0, 0x11, 0x411111f0), /* SPDIF-OUT2 - disabled */ + AZALIA_PIN_CFG(0, 0x12, 0x411111f0), /* digital MIC - disabled */ + AZALIA_PIN_CFG(0, 0x14, 0x01014430), /* PORT D - rear line out */ + AZALIA_PIN_CFG(0, 0x16, 0x411111f0), /* PORT G - disabled */ + AZALIA_PIN_CFG(0, 0x17, 0x411111f0), /* PORT H - disabled */ + AZALIA_PIN_CFG(0, 0x18, 0x01a19c50), /* PORT B - rear mic in */ + AZALIA_PIN_CFG(0, 0x1c, 0x411111f0), /* CD audio - disabled */ + AZALIA_PIN_CFG(0, 0x1d, 0x4004c601), /* BEEPIN */ + AZALIA_PIN_CFG(0, 0x1e, 0x01452160), /* SPDIF-OUT */ + AZALIA_PIN_CFG(0, 0x1f, 0x01C52170), /* SPDIF-IN */ + + /* Config for R02 and older */ + AZALIA_PIN_CFG(0, 0x19, 0x02214c40), /* port F - front hp out */ + AZALIA_PIN_CFG(0, 0x1a, 0x901001f0), /* port C - internal speaker */ + AZALIA_PIN_CFG(0, 0x1b, 0x01813c10), /* port E - rear line in/mic - Blue */ + AZALIA_PIN_CFG(0, 0x15, 0x02a19c20), /* port A - audio hdr input */ + + /* + * VerbTable: CFL Display Audio Codec + * Revision ID = 0xFF + * Codec Vendor: 0x8086280B + */ + 0x8086280B, + 0xFFFFFFFF, + 5, /* Number of 4 dword sets */ + + AZALIA_SUBVENDOR(2, 0x80860101), + + /* + * Display Audio Verb Table + * For GEN9, the Vendor Node ID is 08h + * Port to be exposed to the inbox driver in the vanilla mode + * PORT C - BIT[7:6] = 01b + */ + 0x20878101, + + /* Pin Widget 5 - PORT B - Configuration Default: 0x18560010 */ + AZALIA_PIN_CFG(2, 0x05, 0x18560010), + /* Pin Widget 6 - PORT C - Configuration Default: 0x18560020 */ + AZALIA_PIN_CFG(2, 0x06, 0x18560020), + /* Pin Widget 7 - PORT D - Configuration Default: 0x18560030 */ + AZALIA_PIN_CFG(2, 0x07, 0x18560030), + /* Disable the third converter and third Pin (NID 08h) */ + 0x20878100, + + /* Dummy entries */ + 0x20878100, + 0x20878100, +}; + +const u32 pc_beep_verbs[0] = {}; + +AZALIA_ARRAY_SIZES; + +static const u32 r04_verb_data[] = { + AZALIA_PIN_CFG(0, 0x19, 0x02a19c20), /* PORT F - front mic in */ + AZALIA_PIN_CFG(0, 0x1a, 0x01813c51), /* PORT C - rear line in (mic support) */ + AZALIA_PIN_CFG(0, 0x1b, 0x411111f0), /* PORT E - disabled */ + AZALIA_PIN_CFG(0, 0x15, 0x411111f0), /* PORT A - disabled */ +}; + +static u32 get_port_c_vref_cfg(uint8_t blue_rear_vref) +{ + switch (blue_rear_vref) { + default: + case 0: + return 0x02040000; + case 1: + return 0x02041000; + case 2: + return 0x02044000; + case 3: + return 0x02045000; + case 4: + return 0x02046000; + } +} + +static u32 get_front_panel_cfg(uint8_t front_panel_audio) +{ + switch (front_panel_audio) { + default: + case 0: + return AZALIA_PIN_CFG_NC(0); + case 1: + return 0x022a4c40; + case 2: + return AZALIA_PIN_DESC( + INTEGRATED, + INTERNAL, + NA, + SPEAKER, + TYPE_UNKNOWN, + COLOR_UNKNOWN, + false, + 0xf, + 0); + } +} + +static void mainboard_r0x_configure_alc888(u8 *base, u32 viddid) +{ + /* Overwrite settings made by baseboard */ + azalia_program_verb_table(base, r04_verb_data, ARRAY_SIZE(r04_verb_data)); + + const struct eeprom_board_settings *const board_cfg = get_board_settings(); + + if (!board_cfg) + return; + + const u32 front_panel_cfg = get_front_panel_cfg(board_cfg->front_panel_audio); + + const u32 verbs[] = { + AZALIA_PIN_CFG(0, 0x1b, front_panel_cfg), + 0x0205000d, /* Pin 37 vrefo hidden register - used as port C vref */ + get_port_c_vref_cfg(board_cfg->blue_rear_vref), + }; + azalia_program_verb_table(base, verbs, ARRAY_SIZE(verbs)); +} void mainboard_azalia_program_runtime_verbs(u8 *base, u32 viddid) { diff --git a/src/mainboard/prodrive/hermes/mainboard.c b/src/mainboard/prodrive/hermes/mainboard.c index 6ae6b89..1155b96 100644 --- a/src/mainboard/prodrive/hermes/mainboard.c +++ b/src/mainboard/prodrive/hermes/mainboard.c @@ -8,10 +8,14 @@ #include <bootstate.h> #include <device/device.h> #include <device/dram/spd.h> +#include <gpio.h> +#include <intelblocks/gpio_defs.h> #include <intelblocks/pmclib.h> +#include <soc/gpio.h> #include <types.h> #include <smbios.h> -#include "variants/baseboard/include/eeprom.h" + +#include "eeprom.h" #include "gpio.h" /* FIXME: Example code below */ diff --git a/src/mainboard/prodrive/hermes/memory.c b/src/mainboard/prodrive/hermes/memory.c deleted file mode 100644 index 0ff21c4..0000000 --- a/src/mainboard/prodrive/hermes/memory.c +++ /dev/null @@ -1,44 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <variant/variants.h> -#include <soc/cnl_memcfg_init.h> - -static const struct cnl_mb_cfg baseboard_memcfg_cfg = { - /* Access memory info through SMBUS. */ - .spd[0] = { - .read_type = READ_SMBUS, - .spd_spec = {.spd_smbus_address = 0xA0} - }, - .spd[1] = { - .read_type = READ_SMBUS, - .spd_spec = {.spd_smbus_address = 0xA2} - }, - .spd[2] = { - .read_type = READ_SMBUS, - .spd_spec = {.spd_smbus_address = 0xA4} - }, - .spd[3] = { - .read_type = READ_SMBUS, - .spd_spec = {.spd_smbus_address = 0xA6} - }, - - /* Baseboard uses 121, 81 and 100 rcomp resistors */ - .rcomp_resistor = {121, 81, 100}, - - /* Baseboard Rcomp target values. */ - .rcomp_targets = {100, 40, 20, 20, 26}, - - /* Baseboard is an interleaved design */ - .dq_pins_interleaved = 1, - - /* Baseboard is using config 2 for vref_ca */ - .vref_ca_config = 2, - - /* Disable Early Command Training */ - .ect = 0, -}; - -const struct cnl_mb_cfg *variant_memcfg_config(void) -{ - return &baseboard_memcfg_cfg; -} diff --git a/src/mainboard/prodrive/hermes/ramstage.c b/src/mainboard/prodrive/hermes/ramstage.c index 917f3b9..f38ee37 100644 --- a/src/mainboard/prodrive/hermes/ramstage.c +++ b/src/mainboard/prodrive/hermes/ramstage.c @@ -1,8 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <soc/ramstage.h> -#include <variant/gpio.h> -#include "variants/baseboard/include/eeprom.h" + +#include "eeprom.h" +#include "gpio.h" void mainboard_silicon_init_params(FSPS_UPD *supd) { diff --git a/src/mainboard/prodrive/hermes/romstage.c b/src/mainboard/prodrive/hermes/romstage.c index 238a791..32b4c76 100644 --- a/src/mainboard/prodrive/hermes/romstage.c +++ b/src/mainboard/prodrive/hermes/romstage.c @@ -2,14 +2,49 @@ #include <soc/cnl_memcfg_init.h> #include <soc/romstage.h> -#include <variant/variants.h> -#include "variants/baseboard/include/eeprom.h" + +#include "eeprom.h" + +static const struct cnl_mb_cfg baseboard_mem_cfg = { + /* Access memory info through SMBUS. */ + .spd[0] = { + .read_type = READ_SMBUS, + .spd_spec = {.spd_smbus_address = 0xA0} + }, + .spd[1] = { + .read_type = READ_SMBUS, + .spd_spec = {.spd_smbus_address = 0xA2} + }, + .spd[2] = { + .read_type = READ_SMBUS, + .spd_spec = {.spd_smbus_address = 0xA4} + }, + .spd[3] = { + .read_type = READ_SMBUS, + .spd_spec = {.spd_smbus_address = 0xA6} + }, + + /* Baseboard uses 121, 81 and 100 rcomp resistors */ + .rcomp_resistor = {121, 81, 100}, + + /* Baseboard Rcomp target values. */ + .rcomp_targets = {100, 40, 20, 20, 26}, + + /* Baseboard is an interleaved design */ + .dq_pins_interleaved = 1, + + /* Baseboard is using config 2 for vref_ca */ + .vref_ca_config = 2, + + /* Disable Early Command Training */ + .ect = 0, +}; void mainboard_memory_init_params(FSPM_UPD *memupd) { memupd->FspmConfig.UserBd = BOARD_TYPE_SERVER; memupd->FspmTestConfig.SmbusSpdWriteDisable = 0; - cannonlake_memcfg_init(&memupd->FspmConfig, variant_memcfg_config()); + cannonlake_memcfg_init(&memupd->FspmConfig, &baseboard_mem_cfg); /* Overwrite memupd */ if (!check_signature(offsetof(struct eeprom_layout, mupd), FSPM_UPD_SIGNATURE)) diff --git a/src/mainboard/prodrive/hermes/smbios.c b/src/mainboard/prodrive/hermes/smbios.c index af81e86..624549e 100644 --- a/src/mainboard/prodrive/hermes/smbios.c +++ b/src/mainboard/prodrive/hermes/smbios.c @@ -4,7 +4,7 @@ #include <types.h> #include <string.h> -#include "variants/baseboard/include/eeprom.h" +#include "eeprom.h" const char *smbios_system_serial_number(void) { diff --git a/src/mainboard/prodrive/hermes/variants/baseboard/Makefile.inc b/src/mainboard/prodrive/hermes/variants/baseboard/Makefile.inc deleted file mode 100644 index cc5cdc1..0000000 --- a/src/mainboard/prodrive/hermes/variants/baseboard/Makefile.inc +++ /dev/null @@ -1,4 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-or-later - -bootblock-y += gpio.c -ramstage-y += gpio.c diff --git a/src/mainboard/prodrive/hermes/variants/baseboard/board_info.txt b/src/mainboard/prodrive/hermes/variants/baseboard/board_info.txt deleted file mode 100644 index 009fbfd..0000000 --- a/src/mainboard/prodrive/hermes/variants/baseboard/board_info.txt +++ /dev/null @@ -1,7 +0,0 @@ -Category: server -Vendor name: Prodrive -Board name: Hermes -Board URL: https://prodrive-technologies.com/products/embedded-computing-systems/mothe… -ROM protocol: SPI -ROM socketed: n -Flashrom support: y diff --git a/src/mainboard/prodrive/hermes/variants/baseboard/hda_verb.c b/src/mainboard/prodrive/hermes/variants/baseboard/hda_verb.c deleted file mode 100644 index d20f35d..0000000 --- a/src/mainboard/prodrive/hermes/variants/baseboard/hda_verb.c +++ /dev/null @@ -1,65 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <device/azalia_device.h> -#include <types.h> - -const u32 cim_verb_data[] = { - 0x10ec0888, /* Codec Vendor / Device ID: Realtek ALC888 */ - 0x10ec0888, /* Subsystem ID */ - 15, /* Number of 4 dword sets */ - AZALIA_SUBVENDOR(0, 0x1d336700), - - /* Pin widgets */ - AZALIA_PIN_CFG(0, 0x11, 0x411111f0), /* SPDIF-OUT2 - disabled */ - AZALIA_PIN_CFG(0, 0x12, 0x411111f0), /* digital MIC - disabled */ - AZALIA_PIN_CFG(0, 0x14, 0x01014430), /* PORT D - rear line out */ - AZALIA_PIN_CFG(0, 0x16, 0x411111f0), /* PORT G - disabled */ - AZALIA_PIN_CFG(0, 0x17, 0x411111f0), /* PORT H - disabled */ - AZALIA_PIN_CFG(0, 0x18, 0x01a19c50), /* PORT B - rear mic in */ - AZALIA_PIN_CFG(0, 0x1c, 0x411111f0), /* CD audio - disabled */ - AZALIA_PIN_CFG(0, 0x1d, 0x4004c601), /* BEEPIN */ - AZALIA_PIN_CFG(0, 0x1e, 0x01452160), /* SPDIF-OUT */ - AZALIA_PIN_CFG(0, 0x1f, 0x01C52170), /* SPDIF-IN */ - - /* Config for R02 and older */ - AZALIA_PIN_CFG(0, 0x19, 0x02214c40), /* port F - front hp out */ - AZALIA_PIN_CFG(0, 0x1a, 0x901001f0), /* port C - internal speaker */ - AZALIA_PIN_CFG(0, 0x1b, 0x01813c10), /* port E - rear line in/mic - Blue */ - AZALIA_PIN_CFG(0, 0x15, 0x02a19c20), /* port A - audio hdr input */ - - /* - * VerbTable: CFL Display Audio Codec - * Revision ID = 0xFF - * Codec Vendor: 0x8086280B - */ - 0x8086280B, - 0xFFFFFFFF, - 5, /* Number of 4 dword sets */ - - AZALIA_SUBVENDOR(2, 0x80860101), - - /* - * Display Audio Verb Table - * For GEN9, the Vendor Node ID is 08h - * Port to be exposed to the inbox driver in the vanilla mode - * PORT C - BIT[7:6] = 01b - */ - 0x20878101, - - /* Pin Widget 5 - PORT B - Configuration Default: 0x18560010 */ - AZALIA_PIN_CFG(2, 0x05, 0x18560010), - /* Pin Widget 6 - PORT C - Configuration Default: 0x18560020 */ - AZALIA_PIN_CFG(2, 0x06, 0x18560020), - /* Pin Widget 7 - PORT D - Configuration Default: 0x18560030 */ - AZALIA_PIN_CFG(2, 0x07, 0x18560030), - /* Disable the third converter and third Pin (NID 08h) */ - 0x20878100, - - /* Dummy entries */ - 0x20878100, - 0x20878100, -}; - -const u32 pc_beep_verbs[0] = {}; - -AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/prodrive/hermes/variants/baseboard/include/variant/variants.h b/src/mainboard/prodrive/hermes/variants/baseboard/include/variant/variants.h deleted file mode 100644 index 54a1161..0000000 --- a/src/mainboard/prodrive/hermes/variants/baseboard/include/variant/variants.h +++ /dev/null @@ -1,9 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <soc/cnl_memcfg_init.h> -#include <types.h> - -/* Return memory configuration structure. */ -const struct cnl_mb_cfg *variant_memcfg_config(void); - -void mainboard_r0x_configure_alc888(u8 *base, u32 viddid); diff --git a/src/mainboard/prodrive/hermes/variants/r04/hda_verb.c b/src/mainboard/prodrive/hermes/variants/r04/hda_verb.c deleted file mode 100644 index b4a3370..0000000 --- a/src/mainboard/prodrive/hermes/variants/r04/hda_verb.c +++ /dev/null @@ -1,73 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <device/azalia_device.h> -#include <types.h> - -#include "variant/variants.h" -#include "eeprom.h" - -static const u32 r04_verb_data[] = { - AZALIA_PIN_CFG(0, 0x19, 0x02a19c20), /* PORT F - front mic in */ - AZALIA_PIN_CFG(0, 0x1a, 0x01813c51), /* PORT C - rear line in (mic support) */ - AZALIA_PIN_CFG(0, 0x1b, 0x411111f0), /* PORT E - disabled */ - AZALIA_PIN_CFG(0, 0x15, 0x411111f0), /* PORT A - disabled */ -}; - -static u32 get_port_c_vref_cfg(uint8_t blue_rear_vref) -{ - switch (blue_rear_vref) { - default: - case 0: - return 0x02040000; - case 1: - return 0x02041000; - case 2: - return 0x02044000; - case 3: - return 0x02045000; - case 4: - return 0x02046000; - } -} - -static u32 get_front_panel_cfg(uint8_t front_panel_audio) -{ - switch (front_panel_audio) { - default: - case 0: - return AZALIA_PIN_CFG_NC(0); - case 1: - return 0x022a4c40; - case 2: - return AZALIA_PIN_DESC( - INTEGRATED, - INTERNAL, - NA, - SPEAKER, - TYPE_UNKNOWN, - COLOR_UNKNOWN, - false, - 0xf, - 0); - } -} - -void mainboard_r0x_configure_alc888(u8 *base, u32 viddid) -{ - /* Overwrite settings made by baseboard */ - azalia_program_verb_table(base, r04_verb_data, ARRAY_SIZE(r04_verb_data)); - - const struct eeprom_board_settings *const board_cfg = get_board_settings(); - - if (!board_cfg) - return; - - const u32 front_panel_cfg = get_front_panel_cfg(board_cfg->front_panel_audio); - - const u32 verbs[] = { - AZALIA_PIN_CFG(0, 0x1b, front_panel_cfg), - 0x0205000d, /* Pin 37 vrefo hidden register - used as port C vref */ - get_port_c_vref_cfg(board_cfg->blue_rear_vref), - }; - azalia_program_verb_table(base, verbs, ARRAY_SIZE(verbs)); -} -- To view, visit https://review.coreboot.org/c/coreboot/+/59671 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1543f5b76975b0e7183fbb759e9bae5c34151d06 Gerrit-Change-Number: 59671 Gerrit-PatchSet: 3 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Justin van Son <justin.van.son(a)prodrive-technologies.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

1 0

Change in coreboot[master]: mb/prodrive/hermes: Add board URL
by Felix Held (Code Review) 03 Dec '21

03 Dec '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59837 ) Change subject: mb/prodrive/hermes: Add board URL ...................................................................... mb/prodrive/hermes: Add board URL Change-Id: I943d0e2a91778df306f323e2b889cd4e928e0c2b Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59837 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/mainboard/prodrive/hermes/variants/baseboard/board_info.txt 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Arthur Heymans: Looks good to me, approved diff --git a/src/mainboard/prodrive/hermes/variants/baseboard/board_info.txt b/src/mainboard/prodrive/hermes/variants/baseboard/board_info.txt index 80dba95..009fbfd 100644 --- a/src/mainboard/prodrive/hermes/variants/baseboard/board_info.txt +++ b/src/mainboard/prodrive/hermes/variants/baseboard/board_info.txt @@ -1,7 +1,7 @@ Category: server Vendor name: Prodrive Board name: Hermes -Board URL: TBD +Board URL: https://prodrive-technologies.com/products/embedded-computing-systems/mothe… ROM protocol: SPI ROM socketed: n Flashrom support: y -- To view, visit https://review.coreboot.org/c/coreboot/+/59837 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I943d0e2a91778df306f323e2b889cd4e928e0c2b Gerrit-Change-Number: 59837 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Justin van Son <justin.van.son(a)prodrive-technologies.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

1 0

Change in coreboot[master]: mb/google/guybrush: Configure EN_SPKR GPIO in PSP verstage
by Felix Held (Code Review) 03 Dec '21

03 Dec '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59813 ) Change subject: mb/google/guybrush: Configure EN_SPKR GPIO in PSP verstage ...................................................................... mb/google/guybrush: Configure EN_SPKR GPIO in PSP verstage EN_SPKR GPIO is used as a multiplexer select signal between RAM_ID straps and Developer Mode Beep signals. During boot up it is LOW and selects RAM_ID straps. When the system enters OS, it is driven HIGH and selects DEV BEEP signals. Since in some boards, the GPIO chosen is in S5 domain it does not reset until the system enters mechanical off (G3) state. On scenarios where the power button is pressed when the system is in S5, incorrect RAM_ID strap is being read because the EN_SPKR is still selecting DEV BEEP signal. This causes boot up failures. Fix this by configuring the EN_SPKR GPIO (in S5 domain) explicitly in PSP verstage. BUG=b:204450368 TEST=Build and boot to OS in Guybrush. Perform suspend-resume cycle followed by a S5 -> S0 boot cycle for 2 iterations successfully. Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> Change-Id: I9a52a167da9c7040731da5d355ec345fd9b13762 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59813 Reviewed-by: Rob Barnes <robbarnes(a)google.com> Reviewed-by: Raul Rangel <rrangel(a)chromium.org> Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/guybrush/variants/guybrush/gpio.c M src/mainboard/google/guybrush/variants/nipperkin/gpio.c 2 files changed, 4 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Raul Rangel: Looks good to me, approved Rob Barnes: Looks good to me, approved diff --git a/src/mainboard/google/guybrush/variants/guybrush/gpio.c b/src/mainboard/google/guybrush/variants/guybrush/gpio.c index fe2dcd1..0ebee22 100644 --- a/src/mainboard/google/guybrush/variants/guybrush/gpio.c +++ b/src/mainboard/google/guybrush/variants/guybrush/gpio.c @@ -42,6 +42,8 @@ }; static const struct soc_amd_gpio override_early_gpio_table[] = { + /* BID>=2: EN_SPKR to select RAM_ID input, BID < 2: Unused in later stages */ + PAD_GPO(GPIO_31, LOW), /* BID == 1: SD_AUX_RESET_L */ PAD_GPO(GPIO_70, LOW), }; diff --git a/src/mainboard/google/guybrush/variants/nipperkin/gpio.c b/src/mainboard/google/guybrush/variants/nipperkin/gpio.c index 00fd964..887be83 100644 --- a/src/mainboard/google/guybrush/variants/nipperkin/gpio.c +++ b/src/mainboard/google/guybrush/variants/nipperkin/gpio.c @@ -40,6 +40,8 @@ static const struct soc_amd_gpio override_early_gpio_table[] = { PAD_NC(GPIO_18), + /* BID==1: EN_SPKR to select RAM_ID input, BID >= 1: Unused in later stages */ + PAD_GPO(GPIO_31, LOW), }; static const struct soc_amd_gpio override_pcie_gpio_table[] = { -- To view, visit https://review.coreboot.org/c/coreboot/+/59813 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9a52a167da9c7040731da5d355ec345fd9b13762 Gerrit-Change-Number: 59813 Gerrit-PatchSet: 3 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

1 0

Change in coreboot[master]: mb/google/brya/var/brask: Enable LAN driver to program MAC
by Felix Held (Code Review) 03 Dec '21

03 Dec '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59087 ) Change subject: mb/google/brya/var/brask: Enable LAN driver to program MAC ...................................................................... mb/google/brya/var/brask: Enable LAN driver to program MAC Turn on the LAN device in devicetree and add Kconfig item RT8168_GET_MAC_FROM_VPD to support programming MAC address. BUG=b:193750191 BRANCH=None TEST=Use 'vpd -s ethernet_mac0=...' to write MAC to VPD. Use 'ifconfig' to check if the MAC written successfully. Signed-off-by: Alan Huang <alan-huang(a)quanta.corp-partner.google.com> Change-Id: Ibb95b02fd6d61621ef46db4d63b48456a0a72732 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59087 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> --- M src/mainboard/google/brya/Kconfig M src/mainboard/google/brya/variants/brask/overridetree.cb 2 files changed, 6 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index 6bf1fe1..b14178c 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -8,6 +8,7 @@ def_bool n select SPD_CACHE_IN_FMAP select ENABLE_TCSS_DISPLAY_DETECTION if RUN_FSP_GOP + select RT8168_GET_MAC_FROM_VPD if BOARD_GOOGLE_BASEBOARD_BRYA || BOARD_GOOGLE_BASEBOARD_BRASK diff --git a/src/mainboard/google/brya/variants/brask/overridetree.cb b/src/mainboard/google/brya/variants/brask/overridetree.cb index 2122acd..258898d 100644 --- a/src/mainboard/google/brya/variants/brask/overridetree.cb +++ b/src/mainboard/google/brya/variants/brask/overridetree.cb @@ -79,6 +79,11 @@ device generic 0 alias dptf_policy on end end end + device ref pcie_rp7 on + chip drivers/net + device pci 00.0 on end + end + end # RTL8125 Ethernet NIC device ref pcie4_0 on # Enable CPU PCIE RP 1 using CLK 0 register "cpu_pcie_rp[CPU_RP(1)]" = "{ -- To view, visit https://review.coreboot.org/c/coreboot/+/59087 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibb95b02fd6d61621ef46db4d63b48456a0a72732 Gerrit-Change-Number: 59087 Gerrit-PatchSet: 5 Gerrit-Owner: Alan Huang <alan-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

1 0

Change in coreboot[master]: drivers/net/r8168: Add support for Realtek RT8125
by Felix Held (Code Review) 03 Dec '21

03 Dec '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59086 ) Change subject: drivers/net/r8168: Add support for Realtek RT8125 ...................................................................... drivers/net/r8168: Add support for Realtek RT8125 The Realtek RT8168 and RT8125 have a similar programming interface, therefore add the PCI device ID for the RT8125 into driver for support. BUG=b:193750191 TEST=emerge-brask coreboot chromeos-bootimage. Test on brask whose NIC is RT8125. Check if the default MAC is written into the NIC. Signed-off-by: Alan Huang <alan-huang(a)quanta.corp-partner.google.com> Change-Id: Iaa4c41f94fd6e5fd6393abbb30bfc22a149f5d71 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59086 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Zhuohao Lee <zhuohao(a)google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> --- M src/drivers/net/r8168.c M src/include/device/pci_ids.h 2 files changed, 11 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Zhuohao Lee: Looks good to me, but someone else must approve Tim Wawrzynczak: Looks good to me, approved diff --git a/src/drivers/net/r8168.c b/src/drivers/net/r8168.c index 18e2aff..5606859 100644 --- a/src/drivers/net/r8168.c +++ b/src/drivers/net/r8168.c @@ -17,6 +17,7 @@ #include <device/pci.h> #include <device/pci_ops.h> #include <device/pci_def.h> +#include <device/pci_ids.h> #include <delay.h> #include <fmap.h> #include <types.h> @@ -360,10 +361,16 @@ #endif }; +static const unsigned short pci_device_ids[] = { + PCI_DEVICE_ID_REALTEK_8168, + PCI_DEVICE_ID_REALTEK_8125, + 0 +}; + static const struct pci_driver r8168_driver __pci_driver = { .ops = &r8168_ops, - .vendor = 0x10ec, - .device = 0x8168, + .vendor = PCI_VENDOR_ID_REALTEK, + .devices = pci_device_ids, }; struct chip_operations drivers_net_ops = { diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index db51905..b6cb7d8 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -1281,8 +1281,10 @@ #define PCI_VENDOR_ID_REALTEK 0x10ec #define PCI_DEVICE_ID_REALTEK_5261 0x5261 #define PCI_DEVICE_ID_REALTEK_8029 0x8029 +#define PCI_DEVICE_ID_REALTEK_8125 0x8125 #define PCI_DEVICE_ID_REALTEK_8129 0x8129 #define PCI_DEVICE_ID_REALTEK_8139 0x8139 +#define PCI_DEVICE_ID_REALTEK_8168 0x8168 #define PCI_VENDOR_ID_TYAN 0x10f1 #define PCI_VENDOR_ID_XILINX 0x10ee -- To view, visit https://review.coreboot.org/c/coreboot/+/59086 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaa4c41f94fd6e5fd6393abbb30bfc22a149f5d71 Gerrit-Change-Number: 59086 Gerrit-PatchSet: 15 Gerrit-Owner: Alan Huang <alan-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit December 2021