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Change subject: soc/intel/braswell: Make `num_cpus` unsigned
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Patch Set 1: Code-Review+2
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Change subject: mb/emulation/qemu-i440fx: Refactor `fw_cfg_max_cpus()`
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Patch Set 1: Code-Review+1
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Change subject: cpu/intel: Use unsigned types in `get_cpu_count()`
......................................................................
Patch Set 1: Code-Review+2
(1 comment)
File src/cpu/intel/model_1067x/mp_init.c:
https://review.coreboot.org/c/coreboot/+/58917/comment/b46d1e21_8499b09f
PS1, Line 26: 0xf
unrelated to what this patch does and not that it would matter here, but isn't that field 8 bits?
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Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58919 )
Change subject: cpu/x86/mp: Use unsigned type for CPU count
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Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58858 )
Change subject: soc/amd/stoneyridge/cpu: remove unneeded line break in get_cpu_count
......................................................................
soc/amd/stoneyridge/cpu: remove unneeded line break in get_cpu_count
The line length is no longer limited to 80 characters, so there's no
need for that line break any more.
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
Change-Id: I7a8fb472f00e039f25a71ee526a3dd0bc6c754f6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58858
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Raul Rangel <rrangel(a)chromium.org>
---
M src/soc/amd/stoneyridge/cpu.c
1 file changed, 1 insertion(+), 2 deletions(-)
Approvals:
build bot (Jenkins): Verified
Raul Rangel: Looks good to me, approved
diff --git a/src/soc/amd/stoneyridge/cpu.c b/src/soc/amd/stoneyridge/cpu.c
index 99b40a6..0655032 100644
--- a/src/soc/amd/stoneyridge/cpu.c
+++ b/src/soc/amd/stoneyridge/cpu.c
@@ -39,8 +39,7 @@
static int get_cpu_count(void)
{
- return (pci_read_config16(SOC_HT_DEV, D18F0_CPU_CNT) & CPU_CNT_MASK)
- + 1;
+ return (pci_read_config16(SOC_HT_DEV, D18F0_CPU_CNT) & CPU_CNT_MASK) + 1;
}
static const struct mp_ops mp_ops = {
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Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58922 )
Change subject: nb/intel/haswell/northbridge.c: Drop stale comment
......................................................................
nb/intel/haswell/northbridge.c: Drop stale comment
This can now be controlled with the `MMCONF_BUS_NUMBER` Kconfig option.
Change-Id: If0fdefc5b4339acc843443c551892b397ed39c2e
Signed-off-by: Angel Pons <th3fanbus(a)gmail.com>
---
M src/northbridge/intel/haswell/northbridge.c
1 file changed, 0 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/58922/1
diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c
index 2322097..9ead46b 100644
--- a/src/northbridge/intel/haswell/northbridge.c
+++ b/src/northbridge/intel/haswell/northbridge.c
@@ -34,10 +34,6 @@
return NULL;
}
-/*
- * TODO: We could determine how many PCIe buses we need in the bar.
- * For now, that number is hardcoded to a max of 64.
- */
static struct device_operations pci_domain_ops = {
.read_resources = pci_domain_read_resources,
.set_resources = pci_domain_set_resources,
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