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Change subject: driver/intel/mipi_camera: Add support for _DSC field
......................................................................
Patch Set 6:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/58767/comment/8f8b89ed_907271f4
PS6, Line 23: More details can be found here https://lkml.org/lkml/2021/10/25/397
also I believe this is expected to be added to ACPI 6.5 spec?
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Change subject: driver/intel/mipi_camera: Add support for _DSC field
......................................................................
Patch Set 6:
(3 comments)
File src/drivers/intel/mipi_camera/camera.c:
https://review.coreboot.org/c/coreboot/+/58767/comment/41d7986e_c4c171c3
PS6, Line 850: (
nit: space after `if`
https://review.coreboot.org/c/coreboot/+/58767/comment/47c5c56e_d4b65e79
PS6, Line 852: 0x4
`ACPI_DEVICE_SLEEP_D3_COLD`
but should this value be configurable in chip.h?
File src/drivers/intel/mipi_camera/chip.h:
https://review.coreboot.org/c/coreboot/+/58767/comment/9ed6275b_6b015bf5
PS5, Line 260: acpi_dsc;
> will test by adding _DSC in all camera devices
If the kernel doesn't check for its existence, I don't see how it could be a problem to include it.
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Change subject: mb/siemens/mc_ehl: Disable PMC low power modes
......................................................................
Patch Set 2: Code-Review+2
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Change subject: mb/siemens/mc_ehl2: Clean up devicetree
......................................................................
Patch Set 3: Code-Review+2
(1 comment)
File src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/58887/comment/6e350b26_4019d690
PS2, Line 100: [PchSerialIoIndexI2C0] = PchSerialIoPci,
: [PchSerialIoIndexI2C1] = PchSerialIoDisabled,
: [PchSerialIoIndexI2C2] = PchSerialIoPci,
: [PchSerialIoIndexI2C3] = PchSerialIoPci,
: [PchSerialIoIndexI2C4] = PchSerialIoPci,
: [PchSerialIoIndexI2C5] = PchSerialIoDisabled,
: [PchSerialIoIndexI2C6] = PchSerialIoDisabled,
: [PchSerialIoIndexI2C7] = PchSerialIoDisabled,
> Once you are here you could adjust the SIO I2C enablement in FSP to match your usage. […]
Done
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Change subject: src/lib: Add FW_CONIFG_SOURCE_VPD
......................................................................
Patch Set 4:
(3 comments)
File src/Kconfig:
https://review.coreboot.org/c/coreboot/+/58839/comment/0268b3d6_ed313eb3
PS4, Line 421: depends on FW_CONFIG
`depends on FW_CONFIG && VPD`
File src/lib/fw_config.c:
https://review.coreboot.org/c/coreboot/+/58839/comment/d1a7df99_d456ebbc
PS4, Line 51: int32_t
nit: `int`, then no casting is needed below?
https://review.coreboot.org/c/coreboot/+/58839/comment/97aafee9_f5c5047c
PS4, Line 59: fw_config_value = UNDEFINED_FW_CONFIG;
this line is redundant
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Change subject: soc/intel/elkhartlake: Introduce Intel PSE
......................................................................
Patch Set 46:
(1 comment)
Patchset:
PS46:
> Hi Nico, sorry for having not to reply to you on mailing list, just got back to coreboot work. […]
So this can wait until there is an Intel customer who needs it, right? And when
there is, they can push the code?
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Hello build bot (Jenkins), Werner Zeh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/58887
to look at the new patch set (#3).
Change subject: mb/siemens/mc_ehl2: Clean up devicetree
......................................................................
mb/siemens/mc_ehl2: Clean up devicetree
There are a bunch of devices in the devicetree that are disabled in
FSP-S and not used on this board. Having them around in the devicetree,
even if disabled, is not necessary and leads to a message in the log
(left over static devices...check your devicetree).
This commit cleans up devicetree.cb and removes all unused and disabled
devices.
Change-Id: I7486f9ba362c80b43b6c888a3b40a4c947218299
Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com>
---
M src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb
1 file changed, 4 insertions(+), 64 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/58887/3
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Change subject: mb/siemens/mc_ehl: Disable PMC low power modes
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/58895/comment/9d0f5426_4ef16605
PS1, Line 9: for
> line feed
Done
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Hello build bot (Jenkins), Lean Sheng Tan,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/58895
to look at the new patch set (#2).
Change subject: mb/siemens/mc_ehl: Disable PMC low power modes
......................................................................
mb/siemens/mc_ehl: Disable PMC low power modes
All the mainboard variants of mc_ehl do not use the external switches
for the bypass rails. Disable the matching UPDs and all the low power
modes of the PMC.
Change-Id: I08f4effe5c4d5845bed01dfe1bd1251c58012b7f
Signed-off-by: Werner Zeh <werner.zeh(a)siemens.com>
---
M src/mainboard/siemens/mc_ehl/mainboard.c
1 file changed, 5 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/58895/2
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Change subject: mb/siemens/mc_ehl: Disable PMC low power modes
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/58895/comment/6681c630_cbbaf1bc
PS1, Line 9: for
line feed
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