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Hello build bot (Jenkins), Tim Wawrzynczak, Nick Vaccaro,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#3).
Change subject: [RFC] ChromeOS: Add DECLARE_x_CROS_GPIOS()
......................................................................
[RFC] ChromeOS: Add DECLARE_x_CROS_GPIOS()
Change-Id: I88406fa1b54312616e6717af3d924436dc4ff1a6
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
---
M src/mainboard/emulation/qemu-q35/chromeos.c
M src/mainboard/google/auron/chromeos.c
M src/mainboard/google/beltino/chromeos.c
M src/mainboard/google/brya/variants/baseboard/brask/gpio.c
M src/mainboard/google/brya/variants/baseboard/brya/gpio.c
M src/mainboard/google/butterfly/chromeos.c
M src/mainboard/google/cyan/chromeos.c
M src/mainboard/google/dedede/variants/baseboard/gpio.c
M src/mainboard/google/deltaur/variants/baseboard/gpio.c
M src/mainboard/google/drallion/variants/drallion/gpio.c
M src/mainboard/google/eve/chromeos.c
M src/mainboard/google/fizz/variants/baseboard/gpio.c
M src/mainboard/google/glados/chromeos.c
M src/mainboard/google/guybrush/chromeos.c
M src/mainboard/google/hatch/variants/baseboard/gpio.c
M src/mainboard/google/jecht/chromeos.c
M src/mainboard/google/kahlee/chromeos.c
M src/mainboard/google/link/chromeos.c
M src/mainboard/google/octopus/variants/baseboard/gpio.c
M src/mainboard/google/parrot/chromeos.c
M src/mainboard/google/poppy/variants/baseboard/gpio.c
M src/mainboard/google/rambi/chromeos.c
M src/mainboard/google/reef/variants/baseboard/gpio.c
M src/mainboard/google/reef/variants/coral/gpio.c
M src/mainboard/google/sarien/variants/arcada/gpio.c
M src/mainboard/google/sarien/variants/sarien/gpio.c
M src/mainboard/google/slippy/chromeos.c
M src/mainboard/google/stout/chromeos.c
M src/mainboard/google/volteer/variants/baseboard/gpio.c
M src/mainboard/google/zork/chromeos.c
M src/mainboard/intel/adlrvp/gpio.c
M src/mainboard/intel/adlrvp/gpio_m.c
M src/mainboard/intel/baskingridge/chromeos.c
M src/mainboard/intel/coffeelake_rvp/variants/baseboard/gpio.c
M src/mainboard/intel/emeraldlake2/chromeos.c
M src/mainboard/intel/glkrvp/variants/baseboard/gpio.c
M src/mainboard/intel/icelake_rvp/variants/icl_u/gpio.c
M src/mainboard/intel/icelake_rvp/variants/icl_y/gpio.c
M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c
M src/mainboard/intel/kblrvp/chromeos.c
M src/mainboard/intel/kunimitsu/chromeos.c
M src/mainboard/intel/shadowmountain/variants/baseboard/gpio.c
M src/mainboard/intel/strago/chromeos.c
M src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c
M src/mainboard/intel/tglrvp/variants/tglrvp_up4/gpio.c
M src/mainboard/intel/wtm2/chromeos.c
M src/mainboard/samsung/lumpy/chromeos.c
M src/mainboard/samsung/stumpy/chromeos.c
M src/vendorcode/google/chromeos/chromeos.h
49 files changed, 62 insertions(+), 241 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/58899/3
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Gerrit-Change-Id: I88406fa1b54312616e6717af3d924436dc4ff1a6
Gerrit-Change-Number: 58899
Gerrit-PatchSet: 3
Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org>
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Attention is currently required from: Jason Glenesk, Marshall Dawson, Tim Wawrzynczak, Nick Vaccaro, Felix Held.
Hello build bot (Jenkins), Jason Glenesk, Marshall Dawson, Tim Wawrzynczak, Nick Vaccaro, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/58897
to look at the new patch set (#3).
Change subject: [RFC] ChromeOS: Promote variant_cros_gpio()
......................................................................
[RFC] ChromeOS: Promote variant_cros_gpio()
The only purpose of mainboard_chromeos_acpi_generate()
was to pass cros_gpio array for ACPI \\OIPG package
generation.
Promote variant_cros_gpio() from baseboards to ChromeOS
declaration.
Change-Id: I5c2ac1dcea35f1f00dea401528404bc6ca0ab53c
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
---
M src/mainboard/amd/majolica/chromeos.c
M src/mainboard/emulation/qemu-q35/chromeos.c
M src/mainboard/google/auron/chromeos.c
M src/mainboard/google/beltino/chromeos.c
M src/mainboard/google/brya/chromeos.c
M src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h
M src/mainboard/google/butterfly/chromeos.c
M src/mainboard/google/cyan/chromeos.c
M src/mainboard/google/dedede/chromeos.c
M src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h
M src/mainboard/google/deltaur/chromeos.c
M src/mainboard/google/deltaur/variants/baseboard/gpio.c
M src/mainboard/google/deltaur/variants/baseboard/include/baseboard/gpio.h
M src/mainboard/google/deltaur/variants/baseboard/include/baseboard/variants.h
M src/mainboard/google/drallion/chromeos.c
M src/mainboard/google/drallion/variants/drallion/include/variant/gpio.h
M src/mainboard/google/eve/chromeos.c
M src/mainboard/google/fizz/chromeos.c
M src/mainboard/google/fizz/variants/baseboard/gpio.c
M src/mainboard/google/fizz/variants/baseboard/include/baseboard/variants.h
M src/mainboard/google/glados/chromeos.c
M src/mainboard/google/guybrush/chromeos.c
M src/mainboard/google/hatch/chromeos.c
M src/mainboard/google/hatch/variants/baseboard/gpio.c
M src/mainboard/google/hatch/variants/baseboard/include/baseboard/variants.h
M src/mainboard/google/jecht/chromeos.c
M src/mainboard/google/kahlee/chromeos.c
M src/mainboard/google/link/chromeos.c
M src/mainboard/google/octopus/chromeos.c
M src/mainboard/google/octopus/variants/baseboard/gpio.c
M src/mainboard/google/octopus/variants/baseboard/include/baseboard/variants.h
M src/mainboard/google/parrot/chromeos.c
M src/mainboard/google/poppy/chromeos.c
M src/mainboard/google/poppy/variants/baseboard/gpio.c
M src/mainboard/google/poppy/variants/baseboard/include/baseboard/variants.h
M src/mainboard/google/rambi/chromeos.c
M src/mainboard/google/reef/chromeos.c
M src/mainboard/google/reef/variants/baseboard/gpio.c
M src/mainboard/google/reef/variants/baseboard/include/baseboard/variants.h
M src/mainboard/google/reef/variants/coral/gpio.c
M src/mainboard/google/sarien/chromeos.c
M src/mainboard/google/sarien/variants/arcada/include/variant/gpio.h
M src/mainboard/google/sarien/variants/sarien/include/variant/gpio.h
M src/mainboard/google/slippy/chromeos.c
M src/mainboard/google/stout/chromeos.c
M src/mainboard/google/volteer/chromeos.c
M src/mainboard/google/volteer/variants/baseboard/gpio.c
M src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h
M src/mainboard/google/zork/chromeos.c
M src/mainboard/intel/adlrvp/chromeos.c
M src/mainboard/intel/adlrvp/gpio.c
M src/mainboard/intel/adlrvp/gpio_m.c
M src/mainboard/intel/adlrvp/include/baseboard/variants.h
M src/mainboard/intel/baskingridge/chromeos.c
M src/mainboard/intel/coffeelake_rvp/chromeos.c
M src/mainboard/intel/coffeelake_rvp/variants/baseboard/gpio.c
M src/mainboard/intel/coffeelake_rvp/variants/baseboard/include/baseboard/variants.h
M src/mainboard/intel/emeraldlake2/chromeos.c
M src/mainboard/intel/glkrvp/chromeos.c
M src/mainboard/intel/glkrvp/variants/baseboard/gpio.c
M src/mainboard/intel/glkrvp/variants/baseboard/include/baseboard/variants.h
M src/mainboard/intel/icelake_rvp/chromeos.c
M src/mainboard/intel/icelake_rvp/variants/baseboard/include/baseboard/variants.h
M src/mainboard/intel/icelake_rvp/variants/icl_u/gpio.c
M src/mainboard/intel/icelake_rvp/variants/icl_y/gpio.c
M src/mainboard/intel/jasperlake_rvp/chromeos.c
M src/mainboard/intel/jasperlake_rvp/variants/baseboard/include/baseboard/variants.h
M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c
M src/mainboard/intel/kblrvp/chromeos.c
M src/mainboard/intel/kunimitsu/chromeos.c
M src/mainboard/intel/shadowmountain/chromeos.c
M src/mainboard/intel/shadowmountain/variants/baseboard/gpio.c
M src/mainboard/intel/shadowmountain/variants/baseboard/include/baseboard/variants.h
M src/mainboard/intel/strago/chromeos.c
M src/mainboard/intel/tglrvp/chromeos.c
M src/mainboard/intel/tglrvp/variants/baseboard/include/baseboard/variants.h
M src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c
M src/mainboard/intel/tglrvp/variants/tglrvp_up4/gpio.c
M src/mainboard/intel/wtm2/chromeos.c
M src/mainboard/samsung/lumpy/chromeos.c
M src/mainboard/samsung/stumpy/chromeos.c
M src/vendorcode/google/chromeos/acpi.c
M src/vendorcode/google/chromeos/chromeos.h
M src/vendorcode/google/chromeos/gnvs.c
84 files changed, 105 insertions(+), 282 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/58897/3
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Gerrit-Change-Number: 58897
Gerrit-PatchSet: 3
Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
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Kyösti Mälkki has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/58896 )
Change subject: ChromeOS: Add legacy mainboard_ec_running_ro()
......................................................................
ChromeOS: Add legacy mainboard_ec_running_ro()
TBD: S3 resume path case
Motivation is to have mainboard_chromeos_acpi_generate()
do nothing else than fill ACPI \\OIPG package.
Change-Id: I3cb95268424dc27f8c1e26b3d34eff1a7b8eab7f
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
---
M src/mainboard/google/butterfly/chromeos.c
M src/mainboard/google/parrot/chromeos.c
M src/mainboard/google/stout/chromeos.c
M src/mainboard/samsung/lumpy/chromeos.c
M src/vendorcode/google/chromeos/chromeos.h
M src/vendorcode/google/chromeos/gnvs.c
6 files changed, 31 insertions(+), 29 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/58896/2
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Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58767 )
Change subject: driver/intel/mipi_camera: Add support for _DSC field
......................................................................
Patch Set 6:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/58767/comment/8f8b89ed_907271f4
PS6, Line 23: More details can be found here https://lkml.org/lkml/2021/10/25/397
also I believe this is expected to be added to ACPI 6.5 spec?
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Change subject: driver/intel/mipi_camera: Add support for _DSC field
......................................................................
Patch Set 6:
(3 comments)
File src/drivers/intel/mipi_camera/camera.c:
https://review.coreboot.org/c/coreboot/+/58767/comment/41d7986e_c4c171c3
PS6, Line 850: (
nit: space after `if`
https://review.coreboot.org/c/coreboot/+/58767/comment/47c5c56e_d4b65e79
PS6, Line 852: 0x4
`ACPI_DEVICE_SLEEP_D3_COLD`
but should this value be configurable in chip.h?
File src/drivers/intel/mipi_camera/chip.h:
https://review.coreboot.org/c/coreboot/+/58767/comment/9ed6275b_6b015bf5
PS5, Line 260: acpi_dsc;
> will test by adding _DSC in all camera devices
If the kernel doesn't check for its existence, I don't see how it could be a problem to include it.
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Change subject: mb/siemens/mc_ehl: Disable PMC low power modes
......................................................................
Patch Set 2: Code-Review+2
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Change subject: mb/siemens/mc_ehl2: Clean up devicetree
......................................................................
Patch Set 3: Code-Review+2
(1 comment)
File src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/58887/comment/6e350b26_4019d690
PS2, Line 100: [PchSerialIoIndexI2C0] = PchSerialIoPci,
: [PchSerialIoIndexI2C1] = PchSerialIoDisabled,
: [PchSerialIoIndexI2C2] = PchSerialIoPci,
: [PchSerialIoIndexI2C3] = PchSerialIoPci,
: [PchSerialIoIndexI2C4] = PchSerialIoPci,
: [PchSerialIoIndexI2C5] = PchSerialIoDisabled,
: [PchSerialIoIndexI2C6] = PchSerialIoDisabled,
: [PchSerialIoIndexI2C7] = PchSerialIoDisabled,
> Once you are here you could adjust the SIO I2C enablement in FSP to match your usage. […]
Done
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Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58839 )
Change subject: src/lib: Add FW_CONIFG_SOURCE_VPD
......................................................................
Patch Set 4:
(3 comments)
File src/Kconfig:
https://review.coreboot.org/c/coreboot/+/58839/comment/0268b3d6_ed313eb3
PS4, Line 421: depends on FW_CONFIG
`depends on FW_CONFIG && VPD`
File src/lib/fw_config.c:
https://review.coreboot.org/c/coreboot/+/58839/comment/d1a7df99_d456ebbc
PS4, Line 51: int32_t
nit: `int`, then no casting is needed below?
https://review.coreboot.org/c/coreboot/+/58839/comment/97aafee9_f5c5047c
PS4, Line 59: fw_config_value = UNDEFINED_FW_CONFIG;
this line is redundant
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55367 )
Change subject: soc/intel/elkhartlake: Introduce Intel PSE
......................................................................
Patch Set 46:
(1 comment)
Patchset:
PS46:
> Hi Nico, sorry for having not to reply to you on mailing list, just got back to coreboot work. […]
So this can wait until there is an Intel customer who needs it, right? And when
there is, they can push the code?
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Hello build bot (Jenkins), Werner Zeh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/58887
to look at the new patch set (#3).
Change subject: mb/siemens/mc_ehl2: Clean up devicetree
......................................................................
mb/siemens/mc_ehl2: Clean up devicetree
There are a bunch of devices in the devicetree that are disabled in
FSP-S and not used on this board. Having them around in the devicetree,
even if disabled, is not necessary and leads to a message in the log
(left over static devices...check your devicetree).
This commit cleans up devicetree.cb and removes all unused and disabled
devices.
Change-Id: I7486f9ba362c80b43b6c888a3b40a4c947218299
Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com>
---
M src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb
1 file changed, 4 insertions(+), 64 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/58887/3
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