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Change subject: Documentation/releases: Update 4.15 release notes
......................................................................
Patch Set 1: Code-Review+2
(1 comment)
Patchset:
PS1:
would be good to also update the planned release date in coreboot-4.16-relnotes.md. not sure if that should be in another patch or not
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Change subject: src/lib/fw_config: Change fw_config sources priority
......................................................................
Patch Set 8: Code-Review+2
(1 comment)
File src/Kconfig:
https://review.coreboot.org/c/coreboot/+/58833/comment/cf5626a4_b6da3b04
PS7, Line 408: config FW_CONFIG_SOURCE_CBFS
> Changing sequence is for following priority order or fallback order. […]
So the order of Kconfigs matches the order they are preferred to be read from in the code was my understanding.
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Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58963 )
Change subject: src/cpu,soc/amd/common/block/cpu: Add preload_microcode
......................................................................
Patch Set 2:
(1 comment)
File src/soc/amd/common/block/cpu/update_microcode.c:
https://review.coreboot.org/c/coreboot/+/58963/comment/2b0b9da2_2bda2f2e
PS1, Line 132: printk(BIOS_DEBUG, "Preloading microcode\n");
> nit: Printing CPU_MICROCODE_BLOB_NAME here would be helpful for debugging.
Done
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Hello build bot (Jenkins), Jason Glenesk, Marshall Dawson, Rob Barnes, Felix Held,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#2).
Change subject: src/cpu,soc/amd/common/block/cpu: Add preload_microcode
......................................................................
src/cpu,soc/amd/common/block/cpu: Add preload_microcode
This will enable preloading the microcode. By preloading the
file, into cbfs_cache we reduce boot time.
BUG=b:179699789
TEST=Boot guybrush with CL chain and see microcode preloading and a
reduction of 2 ms.
Signed-off-by: Raul E Rangel <rrangel(a)chromium.org>
Change-Id: If0c634c692c97769e71acd1175fc464dc592c356
---
M src/cpu/Makefile.inc
M src/include/cpu/amd/microcode.h
M src/soc/amd/common/block/cpu/update_microcode.c
3 files changed, 20 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/58963/2
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Hello build bot (Jenkins), Furquan Shaikh, Julius Werner, Rob Barnes, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
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Change subject: device/pci_rom: Add vga_oprom_preload
......................................................................
device/pci_rom: Add vga_oprom_preload
This method will allow preloading the VGA_BIOS_FILE. By preloading the
file, into cbfs_cache we reduce boot time. In the future we can also add
support for loading the second VGA_BIOS_FILE and the DGPU VGA_BIOS_FILE.
BUG=b:179699789
TEST=Boot guybrush to OS and verify 12 ms reduction in boot time
Signed-off-by: Raul E Rangel <rrangel(a)chromium.org>
Change-Id: Icb54fe3a942e9507ff6f1173ba5620a8f4ce6549
---
M src/device/pci_rom.c
M src/include/device/pci_rom.h
2 files changed, 16 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/56581/10
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Change subject: HACK: Herobrine: Reinit TPM INT gpio after qclib executes
......................................................................
Patch Set 28:
(2 comments)
File src/soc/qualcomm/common/qclib.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-132443):
https://review.coreboot.org/c/coreboot/+/57025/comment/6a4f86b4_73517efb
PS28, Line 220: mainboard_blob_fix();
code indent should use tabs where possible
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-132443):
https://review.coreboot.org/c/coreboot/+/57025/comment/0dc465af_b7c72a58
PS28, Line 220: mainboard_blob_fix();
please, no spaces at the start of a line
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Change subject: src/lib/fw_config: Change fw_config sources priority
......................................................................
Patch Set 8:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/58833/comment/9fe8f184_6ab81eac
PS7, Line 7: src/lib: Support fallback option for fw_config
:
: To support both non-chrome EC platform and chrome EC platform in
: single coreboot binary, need to support fallback option.
: Make reading fw_config from CBI and support other options as
: fallback options and support backward compatiblity to support only one
: option as before.
> Sorry, but this confuses readers more than it helps explain what's going on here. […]
Ack
File src/Kconfig:
https://review.coreboot.org/c/coreboot/+/58833/comment/5b129aee_3c5b4bf6
PS7, Line 408: config FW_CONFIG_SOURCE_CBFS
> Why move this?
Changing sequence is for following priority order or fallback order.
The order is
1. FW_CONFIG_SOURCE_CHROMEEC_CBI
2. FW_CONFIG_SOURCE_CBFS
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Change subject: src/lib/fw_config: Change fw_config sources priority
......................................................................
src/lib/fw_config: Change fw_config sources priority
Request fw_config values from various sources (as enabled via Kconfig)
until a valid value has been read.
With this change, Chrome EC CBI takes precedence over CBFS fw_config.
TEST=select both configs and check fallback behavior.
1. select both FW_CONFIG_SOURCE_CHROMEEC_CBI and FW_CONFIG_SOURCE_CBFS
2. check log for reading fw_config from CBI and CBFS
Signed-off-by: Wonkyu Kim <wonkyu.kim(a)intel.com>
Change-Id: I215c13a4fcb9dc3b94f73c770e704d4e353e9cff
---
M src/Kconfig
M src/lib/fw_config.c
2 files changed, 29 insertions(+), 29 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/58833/8
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