coreboot-gerrit September 2020

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Change in coreboot[master]: mb/google/octopus/variants/fleex: support LTE power sequence
by EricR Lai (Code Review) 18 Sep '20

18 Sep '20

EricR Lai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45193 ) Change subject: mb/google/octopus/variants/fleex: support LTE power sequence ...................................................................... mb/google/octopus/variants/fleex: support LTE power sequence GPIOs related to power sequnce are GPIO_67 - EN_PP3300 GPIO_117 - FULL_CARD_POWER_ON_OFF GPIO_161 - PLT_RST_LTE_L 1. Power on: GPIO_67 -> 0ms -> GPIO_117 -> 30ms -> GPIO_161 2. Power off: GPIO_161 -> 30ms -> GPIO_117 -> 100ms -> GPIO_67 3. Power reset: - keep GPIO_67 and GPIO_117 high and - pull down GPIO_161 for 30ms then release it. BUG=b:168075958 BRANCH=octopus TEST=build image and verify on the DUT with LTE DB. Signed-off-by: Eric Lai <ericr_lai(a)compal.corp-partner.google.com> Change-Id: I9b56ef8ff346c1d4edd5aad04d4a7396c4702ffc --- M src/mainboard/google/octopus/variants/fleex/Makefile.inc M src/mainboard/google/octopus/variants/fleex/gpio.c A src/mainboard/google/octopus/variants/fleex/variant.c 3 files changed, 71 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/45193/1 diff --git a/src/mainboard/google/octopus/variants/fleex/Makefile.inc b/src/mainboard/google/octopus/variants/fleex/Makefile.inc index 9fb63f5..51c9d39 100644 --- a/src/mainboard/google/octopus/variants/fleex/Makefile.inc +++ b/src/mainboard/google/octopus/variants/fleex/Makefile.inc @@ -1,3 +1,5 @@ bootblock-y += gpio.c ramstage-y += gpio.c + +ramstage-y += variant.c diff --git a/src/mainboard/google/octopus/variants/fleex/gpio.c b/src/mainboard/google/octopus/variants/fleex/gpio.c index 4d92630..8148dce 100644 --- a/src/mainboard/google/octopus/variants/fleex/gpio.c +++ b/src/mainboard/google/octopus/variants/fleex/gpio.c @@ -10,8 +10,10 @@ PAD_NC(GPIO_52, UP_20K), PAD_NC(GPIO_53, UP_20K), - PAD_NC(GPIO_67, UP_20K), - PAD_NC(GPIO_117, UP_20K), + /* UART2-CTS_B -- EN_PP3300_DX_LTE_SOC */ + PAD_CFG_GPO(GPIO_67, 1, PWROK), + /* PCIE_WAKE1_B -- FULL_CARD_POWER_OFF */ + PAD_CFG_GPO(GPIO_117, 1, PWROK), PAD_NC(GPIO_143, UP_20K), PAD_NC(GPIO_144, UP_20K), @@ -21,7 +23,8 @@ PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_146, 0, DEEP, NONE, Tx0RxDCRx0, DISPUPD), - PAD_NC(GPIO_161, UP_20K), + /* AVS_I2S1_MCLK -- PLT_RST_LTE_L */ + PAD_CFG_GPO(GPIO_161, 1, DEEP), PAD_NC(GPIO_213, DN_20K), PAD_NC(GPIO_214, DN_20K), @@ -33,3 +36,21 @@ return default_override_table; } + +static const struct pad_config lte_early_override_table[] = { + /* UART2-CTS_B -- EN_PP3300_DX_LTE_SOC */ + PAD_CFG_GPO(GPIO_67, 1, PWROK), + + /* PCIE_WAKE1_B -- FULL_CARD_POWER_OFF */ + PAD_CFG_GPO(GPIO_117, 1, PWROK), + + /* AVS_I2S1_MCLK -- PLT_RST_LTE_L */ + PAD_CFG_GPO(GPIO_161, 0, DEEP), +}; + +const struct pad_config *variant_early_override_gpio_table(size_t *num) +{ + *num = ARRAY_SIZE(lte_early_override_table); + + return lte_early_override_table; +} diff --git a/src/mainboard/google/octopus/variants/fleex/variant.c b/src/mainboard/google/octopus/variants/fleex/variant.c new file mode 100644 index 0000000..c71a63e --- /dev/null +++ b/src/mainboard/google/octopus/variants/fleex/variant.c @@ -0,0 +1,45 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <acpi/acpi.h> +#include <ec/google/chromeec/ec.h> +#include <baseboard/variants.h> +#include <delay.h> +#include <gpio.h> + +struct gpio_with_delay { + gpio_t gpio; + unsigned int delay_msecs; +}; + +static void power_off_lte_module(u8 slp_typ) +{ + const struct gpio_with_delay lte_power_off_gpios[] = { + { + GPIO_161, /* AVS_I2S1_MCLK -- PLT_RST_LTE_L */ + 30, + }, + { + GPIO_117, /* PCIE_WAKE1_B -- FULL_CARD_POWER_OFF */ + 100 + }, + { + GPIO_67, /* UART2-CTS_B -- EN_PP3300_DX_LTE_SOC */ + 0 + } + }; + + for (int i = 0; i < ARRAY_SIZE(lte_power_off_gpios); i++) { + gpio_output(lte_power_off_gpios[i].gpio, 0); + mdelay(lte_power_off_gpios[i].delay_msecs); + } +} + +void variant_smi_sleep(u8 slp_typ) +{ + /* Currently use cases here all target to S5 therefore we do early return + * here for saving one transaction to the EC for getting SKU ID. */ + if (slp_typ != ACPI_S5) + return; + + power_off_lte_module(slp_typ); +} -- To view, visit https://review.coreboot.org/c/coreboot/+/45193 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9b56ef8ff346c1d4edd5aad04d4a7396c4702ffc Gerrit-Change-Number: 45193 Gerrit-PatchSet: 1 Gerrit-Owner: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-MessageType: newchange

5 11

Change in coreboot[master]: mb/google/volteer: Remove redundant GPIO decls in Eldrid
by Tim Wawrzynczak (Code Review) 18 Sep '20

18 Sep '20

Tim Wawrzynczak has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45485 ) Change subject: mb/google/volteer: Remove redundant GPIO decls in Eldrid ...................................................................... mb/google/volteer: Remove redundant GPIO decls in Eldrid GPP_A19 and GPP_A20 are already declared as NC in the baseboard. Change-Id: I02f5751a70b51a197320b865d18da3a4ffeb87f7 Signed-off-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> --- M src/mainboard/google/volteer/variants/eldrid/gpio.c 1 file changed, 0 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/45485/1 diff --git a/src/mainboard/google/volteer/variants/eldrid/gpio.c b/src/mainboard/google/volteer/variants/eldrid/gpio.c index 855e96d..8ea1444e 100644 --- a/src/mainboard/google/volteer/variants/eldrid/gpio.c +++ b/src/mainboard/google/volteer/variants/eldrid/gpio.c @@ -18,10 +18,6 @@ PAD_NC(GPP_A15, NONE), /* A16 : USB_OC3# ==> USB_C0_OC_ODL */ PAD_CFG_NF(GPP_A16, NONE, DEEP, NF1), - /* A19 : DDSP_HPD1 ==> USB_C0_DP_HPD */ - PAD_NC(GPP_A19, NONE), - /* A20 : DDSP_HPD2 ==> USB_C1_DP_HPD */ - PAD_NC(GPP_A20, NONE), /* A21 : DDPC_CTRCLK ==> EN_FP_PWR */ PAD_CFG_GPO(GPP_A21, 1, DEEP), /* A23 : I2S1_SCLK ==> I2S1_SPKR_SCLK */ -- To view, visit https://review.coreboot.org/c/coreboot/+/45485 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I02f5751a70b51a197320b865d18da3a4ffeb87f7 Gerrit-Change-Number: 45485 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newchange

4 4

Change in coreboot[master]: mb/google/volteer/eldrid: Add option to enable WiFi SAR configs
by Malik Hsu (Code Review) 18 Sep '20

18 Sep '20

Malik Hsu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45233 ) Change subject: mb/google/volteer/eldrid: Add option to enable WiFi SAR configs ...................................................................... mb/google/volteer/eldrid: Add option to enable WiFi SAR configs This change adds a user selectable option to enable all WiFi SAR configs that apply to volteer BUG=b:168169690 Change-Id: I6b74cd2b34ebb99cc59d456e28fd7ab2399d71d0 --- M src/mainboard/google/volteer/Kconfig 1 file changed, 10 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/45233/1 diff --git a/src/mainboard/google/volteer/Kconfig b/src/mainboard/google/volteer/Kconfig index dda2f4e..6fb1766 100644 --- a/src/mainboard/google/volteer/Kconfig +++ b/src/mainboard/google/volteer/Kconfig @@ -45,6 +45,16 @@ select VBOOT_LID_SWITCH select VBOOT_EARLY_EC_SYNC +config CHROMEOS_WIFI_SAR + bool "Enable SAR options for Chrome OS build" + depends on CHROMEOS + select DSAR_ENABLE + select GEO_SAR_ENABLE + select SAR_ENABLE + select USE_SAR + select WIFI_SAR_CBFS + + config DIMM_SPD_SIZE int default 512 -- To view, visit https://review.coreboot.org/c/coreboot/+/45233 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6b74cd2b34ebb99cc59d456e28fd7ab2399d71d0 Gerrit-Change-Number: 45233 Gerrit-PatchSet: 1 Gerrit-Owner: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: drivers/genesyslogic/gl9755: Add driver for Genesys Logic GL9755
by Ben Chuang (Code Review) 18 Sep '20

18 Sep '20

Ben Chuang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45062 ) Change subject: drivers/genesyslogic/gl9755: Add driver for Genesys Logic GL9755 ...................................................................... drivers/genesyslogic/gl9755: Add driver for Genesys Logic GL9755 The device is a PCIe Gen2 to SD 4.0 card reader controller to be used in the Chromebook. The datasheet name is GL9755S the revision is 05. The patch sets LTR value. Signed-off-by: Ben Chuang <benchuanggli(a)gmail.com> Change-Id: I16048dde348be248c748d50ca4a8a62c8a781430 --- A src/drivers/genesyslogic/gl9755/Kconfig A src/drivers/genesyslogic/gl9755/Makefile.inc A src/drivers/genesyslogic/gl9755/gl9755.c A src/drivers/genesyslogic/gl9755/gl9755.h M src/include/device/pci_ids.h 5 files changed, 66 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/45062/1 diff --git a/src/drivers/genesyslogic/gl9755/Kconfig b/src/drivers/genesyslogic/gl9755/Kconfig new file mode 100644 index 0000000..0d1fe57 --- /dev/null +++ b/src/drivers/genesyslogic/gl9755/Kconfig @@ -0,0 +1,2 @@ +config DRIVERS_GENESYSLOGIC_GL9755 + bool diff --git a/src/drivers/genesyslogic/gl9755/Makefile.inc b/src/drivers/genesyslogic/gl9755/Makefile.inc new file mode 100644 index 0000000..995cfd3 --- /dev/null +++ b/src/drivers/genesyslogic/gl9755/Makefile.inc @@ -0,0 +1 @@ +ramstage-$(CONFIG_DRIVERS_GENESYSLOGIC_GL9755) += gl9755.c diff --git a/src/drivers/genesyslogic/gl9755/gl9755.c b/src/drivers/genesyslogic/gl9755/gl9755.c new file mode 100644 index 0000000..f66344b --- /dev/null +++ b/src/drivers/genesyslogic/gl9755/gl9755.c @@ -0,0 +1,47 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +/* Driver for Genesys Logic GL9763E */ + +#include <console/console.h> +#include <device/device.h> +#include <device/path.h> +#include <device/pci.h> +#include <device/pci_ops.h> +#include <device/pci_ids.h> +#include "gl9755.h" + +static void gl9755_init(struct device *dev) +{ + printk(BIOS_INFO, "GL9755: init\n"); + pci_dev_init(dev); + + /* Set Vendor Config to be configurable */ + pci_or_config32(dev, CFG, CFG_EN); + /* Set LTR value */ + pci_update_config32(dev, LTR, 0, NO_SNOOP_SCALE|NO_SNOOP_VALUE|SNOOP_SCALE|SNOOP_VALUE); + /* Set Vendor Config to be non-configurable */ + pci_and_config32(dev, CFG, ~CFG_EN); +} + +static struct device_operations gl9755_ops = { + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .ops_pci = &pci_dev_ops_pci, + .init = gl9755_init, +}; + +static const unsigned short pci_device_ids[] = { + PCI_DEVICE_ID_GLI_9755, + 0 +}; + +static const struct pci_driver genesyslogic_gl9755 __pci_driver = { + .ops = &gl9755_ops, + .vendor = PCI_VENDOR_ID_GLI, + .devices = pci_device_ids, +}; + +struct chip_operations drivers_generic_genesyslogic_gl9755_ops = { + CHIP_NAME("Genesys Logic GL9755") +}; diff --git a/src/drivers/genesyslogic/gl9755/gl9755.h b/src/drivers/genesyslogic/gl9755/gl9755.h new file mode 100644 index 0000000..04d25ef --- /dev/null +++ b/src/drivers/genesyslogic/gl9755/gl9755.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +/* Definitions for Genesys Logic GL9755 */ + +#include <types.h> + +#define CFG 0x800 +#define CFG_EN 0x1 +#define LTR 0x5C +#define SNOOP_VALUE 0x25 +#define SNOOP_SCALE (0x3 << 10) +#define NO_SNOOP_VALUE (0x25 << 16) +#define NO_SNOOP_SCALE (0x3 << 26) + + diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 5aaf7b3..9b45d7e 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2035,6 +2035,7 @@ #define PCI_VENDOR_ID_GLI 0x17a0 #define PCI_DEVICE_ID_GLI_9763E 0xe763 +#define PCI_DEVICE_ID_GLI_9755 0x9755 #define PCI_VENDOR_ID_XGI 0x18ca #define PCI_DEVICE_ID_XGI_20 0x0020 -- To view, visit https://review.coreboot.org/c/coreboot/+/45062 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I16048dde348be248c748d50ca4a8a62c8a781430 Gerrit-Change-Number: 45062 Gerrit-PatchSet: 1 Gerrit-Owner: Ben Chuang <benchuanggli(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/system76/lemp9: move subsystem id from Kconfig to devicetree
by Michael Niewöhner (Code Review) 18 Sep '20

18 Sep '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45528 ) Change subject: mb/system76/lemp9: move subsystem id from Kconfig to devicetree ...................................................................... Patch Set 1: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/45528 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I21e7e53787b115f50093d7caa72285ce480cef52 Gerrit-Change-Number: 45528 Gerrit-PatchSet: 1 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 18 Sep 2020 16:10:34 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/up/squared: move subsystem id from Kconfig to devicetree
by Michael Niewöhner (Code Review) 18 Sep '20

18 Sep '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45527 ) Change subject: mb/up/squared: move subsystem id from Kconfig to devicetree ...................................................................... Patch Set 1: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/45527 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icf62a73ee568d9369c53bd767bd4cfb736ea76f1 Gerrit-Change-Number: 45527 Gerrit-PatchSet: 1 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 18 Sep 2020 16:10:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/volteer/variants/eldrid: Configure DP_HPD as PAD_NC and dis...
by Nick Chen (Code Review) 18 Sep '20

18 Sep '20

Nick Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45246 ) Change subject: mb/google/volteer/variants/eldrid: Configure DP_HPD as PAD_NC and disable DdiPortHpd ...................................................................... mb/google/volteer/variants/eldrid: Configure DP_HPD as PAD_NC and disable DdiPortHpd GPP_A19(DP_HPD1) and GPP_A20(DP_HPD2) were configured native function (NF1) without internal pull-down which wrongly presents HPD interrupts. This change configures GPP_A19 and GPP_A20 to be no connection and disables DdiPort1Hpd and DdiPort2Hpd. BUG=b:165893624, b:168090618 Signed-off-by: nick_xr_chen <nick_xr_chen(a)wistron.corp-partner.google.com> Change-Id: I31b25be1c9248debf855435c7b688b358e2cd57e --- M src/mainboard/google/volteer/variants/eldrid/gpio.c M src/mainboard/google/volteer/variants/eldrid/overridetree.cb 2 files changed, 4 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/45246/1 diff --git a/src/mainboard/google/volteer/variants/eldrid/gpio.c b/src/mainboard/google/volteer/variants/eldrid/gpio.c index aeccfab..855e96d 100644 --- a/src/mainboard/google/volteer/variants/eldrid/gpio.c +++ b/src/mainboard/google/volteer/variants/eldrid/gpio.c @@ -19,9 +19,9 @@ /* A16 : USB_OC3# ==> USB_C0_OC_ODL */ PAD_CFG_NF(GPP_A16, NONE, DEEP, NF1), /* A19 : DDSP_HPD1 ==> USB_C0_DP_HPD */ - PAD_CFG_NF(GPP_A19, NONE, DEEP, NF1), + PAD_NC(GPP_A19, NONE), /* A20 : DDSP_HPD2 ==> USB_C1_DP_HPD */ - PAD_CFG_NF(GPP_A20, NONE, DEEP, NF1), + PAD_NC(GPP_A20, NONE), /* A21 : DDPC_CTRCLK ==> EN_FP_PWR */ PAD_CFG_GPO(GPP_A21, 1, DEEP), /* A23 : I2S1_SCLK ==> I2S1_SPKR_SCLK */ diff --git a/src/mainboard/google/volteer/variants/eldrid/overridetree.cb b/src/mainboard/google/volteer/variants/eldrid/overridetree.cb index 171e397..b04b1e7 100644 --- a/src/mainboard/google/volteer/variants/eldrid/overridetree.cb +++ b/src/mainboard/google/volteer/variants/eldrid/overridetree.cb @@ -1,6 +1,8 @@ chip soc/intel/tigerlake register "TcssAuxOri" = "1" + register "DdiPort1Hpd" = "0" + register "DdiPort2Hpd" = "0" register "IomTypeCPortPadCfg[0]" = "0x090E000A" register "IomTypeCPortPadCfg[1]" = "0x090E000D" #+-------------------+---------------------------+ -- To view, visit https://review.coreboot.org/c/coreboot/+/45246 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I31b25be1c9248debf855435c7b688b358e2cd57e Gerrit-Change-Number: 45246 Gerrit-PatchSet: 1 Gerrit-Owner: Nick Chen <nick_xr_chen(a)wistron.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: lint: check for misuse of Kconfig SUBSYSTEM_*_ID
by Michael Niewöhner (Code Review) 18 Sep '20

18 Sep '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45513 ) Change subject: lint: check for misuse of Kconfig SUBSYSTEM_*_ID ...................................................................... Patch Set 3: (1 comment) https://review.coreboot.org/c/coreboot/+/45513/1/util/lint/check_lint_tests File util/lint/check_lint_tests: https://review.coreboot.org/c/coreboot/+/45513/1/util/lint/check_lint_tests… PS1, Line 31: lint > use lint-stable instead so that it runs on the builder? hah! that was the missing bit, thank you :-) -- To view, visit https://review.coreboot.org/c/coreboot/+/45513 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I21c021c718154f1396f795a555af47a76d6efe03 Gerrit-Change-Number: 45513 Gerrit-PatchSet: 3 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Elyes HAOUAS Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 18 Sep 2020 15:52:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: lint: check for misuse of Kconfig SUBSYSTEM_*_ID
by Michael Niewöhner (Code Review) 18 Sep '20

18 Sep '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45513 ) Change subject: lint: check for misuse of Kconfig SUBSYSTEM_*_ID ...................................................................... Patch Set 3: (1 comment) https://review.coreboot.org/c/coreboot/+/45513/1/util/lint/check_lint_tests File util/lint/check_lint_tests: https://review.coreboot.org/c/coreboot/+/45513/1/util/lint/check_lint_tests… PS1, Line 31: 009 > Since this is a new test, the number should be the next number in the lint list - currently 24. Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/45513 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I21c021c718154f1396f795a555af47a76d6efe03 Gerrit-Change-Number: 45513 Gerrit-PatchSet: 3 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Elyes HAOUAS Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 18 Sep 2020 15:52:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: lint: check for misuse of Kconfig SUBSYSTEM_*_ID
by Michael Niewöhner (Code Review) 18 Sep '20

18 Sep '20

Hello Felix Singer, Elyes HAOUAS, build bot (Jenkins), Nico Huber, Martin Roth, Patrick Georgi, Paul Menzel, Duncan Laurie, Stefan Reinauer, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/45513 to look at the new patch set (#3). Change subject: lint: check for misuse of Kconfig SUBSYSTEM_*_ID ...................................................................... lint: check for misuse of Kconfig SUBSYSTEM_*_ID Check that nobody misuses the Kconfigs SUBSYSTEM_*_ID. They are meant to be used for overriding the devicetree subsystem ids locally but shall not be added to a board's Kconfig. Instead, the devicetree option `subsystemid` should be used. Add a linter script for this that finds and warns about such misuse. Also add a note in the Kconfigs' description. Change-Id: I21c021c718154f1396f795a555af47a76d6efe03 Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> --- M src/device/Kconfig M util/lint/check_lint_tests A util/lint/lint-stable-024-kconfig-no-subsystem 3 files changed, 26 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/45513/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/45513 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I21c021c718154f1396f795a555af47a76d6efe03 Gerrit-Change-Number: 45513 Gerrit-PatchSet: 3 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Elyes HAOUAS Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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coreboot-gerrit September 2020