coreboot-gerrit September 2020

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Change in coreboot[master]: drivers/intel/mipi_camera: Add support for dynamic SSDT generation
by Paul Fagerburg (Code Review) 18 Sep '20

18 Sep '20

Paul Fagerburg has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45172 ) Change subject: drivers/intel/mipi_camera: Add support for dynamic SSDT generation ...................................................................... Patch Set 8: (1 comment) https://review.coreboot.org/c/coreboot/+/45172/8/src/drivers/intel/mipi_cam… File src/drivers/intel/mipi_camera/camera_sku.c: https://review.coreboot.org/c/coreboot/+/45172/8/src/drivers/intel/mipi_cam… PS8, Line 36: /* By default device will be set to enabled in alloc_dev. So calling dev_set_enabled : is not making call to chip_ops->enable_dev as device is already enabled */ : dev_set_enabled(sensor, 0); : dev_set_enabled(sensor, 1); : } > On calling alloc_dev, it sets the enabled flag in device to 1. […] Great, thanks! -- To view, visit https://review.coreboot.org/c/coreboot/+/45172 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6a5aa6c313c026871e55bc6d067b44de4c1f1afe Gerrit-Change-Number: 45172 Gerrit-PatchSet: 8 Gerrit-Owner: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Reviewer: Andy Yeh <andy.yeh(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Chen Wisley <wisley.chen(a)quantatw.com> Gerrit-Reviewer: Chiasheng Lee <chiasheng.lee(a)intel.com> Gerrit-Reviewer: Jett Rink <jettrink(a)google.com> Gerrit-Reviewer: Justin TerAvest <teravest(a)google.com> Gerrit-Reviewer: Marco Chen <marcochen(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: ShawnX Tu <shawnx.tu(a)intel.com> Gerrit-Reviewer: Tomasz Figa <tfiga(a)google.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-CC: Henry Sun <henrysun(a)google.com> Gerrit-CC: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 18 Sep 2020 03:46:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Comment-In-Reply-To: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/mipi_camera: Add support for dynamic SSDT generation
by Sugnan Prabhu S (Code Review) 18 Sep '20

18 Sep '20

Sugnan Prabhu S has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45172 ) Change subject: drivers/intel/mipi_camera: Add support for dynamic SSDT generation ...................................................................... Patch Set 8: (1 comment) https://review.coreboot.org/c/coreboot/+/45172/8/src/drivers/intel/mipi_cam… File src/drivers/intel/mipi_camera/camera_sku.c: https://review.coreboot.org/c/coreboot/+/45172/8/src/drivers/intel/mipi_cam… PS8, Line 36: /* By default device will be set to enabled in alloc_dev. So calling dev_set_enabled : is not making call to chip_ops->enable_dev as device is already enabled */ : dev_set_enabled(sensor, 0); : dev_set_enabled(sensor, 1); : } > This is a little confusing. […] On calling alloc_dev, it sets the enabled flag in device to 1. https://github.com/coreboot/coreboot/blob/b8b117c7e72ceb641c14db499a2c004fd… Due to this, on calling dev_set_enabled once, it returns without doing anything, as the device is already set to enabled. https://github.com/coreboot/coreboot/blob/b8b117c7e72ceb641c14db499a2c004fd… As following functions in dev_set_enabled are not called, camera_enable in camera.c is never called. dev->ops->enable(dev) dev->chip_ops && dev->chip_ops->enable_dev(dev) https://github.com/coreboot/coreboot/blob/b8b117c7e72ceb641c14db499a2c004fd… So camera_ssdt_fill(which is responsible for the SSDT generation for the device) will not be called from acpi.c as dev->ops is not initialized. https://github.com/coreboot/coreboot/blob/b8b117c7e72ceb641c14db499a2c004fd… So it is required to disable once and then enable. I will update the comment. -- To view, visit https://review.coreboot.org/c/coreboot/+/45172 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6a5aa6c313c026871e55bc6d067b44de4c1f1afe Gerrit-Change-Number: 45172 Gerrit-PatchSet: 8 Gerrit-Owner: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Reviewer: Andy Yeh <andy.yeh(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Chen Wisley <wisley.chen(a)quantatw.com> Gerrit-Reviewer: Chiasheng Lee <chiasheng.lee(a)intel.com> Gerrit-Reviewer: Jett Rink <jettrink(a)google.com> Gerrit-Reviewer: Justin TerAvest <teravest(a)google.com> Gerrit-Reviewer: Marco Chen <marcochen(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: ShawnX Tu <shawnx.tu(a)intel.com> Gerrit-Reviewer: Tomasz Figa <tfiga(a)google.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-CC: Henry Sun <henrysun(a)google.com> Gerrit-CC: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 18 Sep 2020 03:43:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: libpayload: cbgfx: Fix 'equals' counter for Lanczos resampling
by Yu-Ping Wu (Code Review) 18 Sep '20

18 Sep '20

Yu-Ping Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45235 ) Change subject: libpayload: cbgfx: Fix 'equals' counter for Lanczos resampling ...................................................................... libpayload: cbgfx: Fix 'equals' counter for Lanczos resampling The 'equals' counter stores the number of latest pixels that were exactly equal. Since the sample array is updated in a column-based manner, we should also initialize the 'equals' counter in the same order. BUG=b:167739127 TEST=emerge-puff libpayload TEST=Character 'k' is rendered correctly on puff BRANCH=zork Change-Id: Ibc91ad1af85adcf093eff40797cd54f32f57111d Signed-off-by: Yu-Ping Wu <yupingso(a)chromium.org> --- M payloads/libpayload/drivers/video/graphics.c 1 file changed, 22 insertions(+), 20 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/45235/1 diff --git a/payloads/libpayload/drivers/video/graphics.c b/payloads/libpayload/drivers/video/graphics.c index 2bf5e19..a8c9612 100644 --- a/payloads/libpayload/drivers/video/graphics.c +++ b/payloads/libpayload/drivers/video/graphics.c @@ -858,36 +858,38 @@ } /* - * Initialize the sample array for this line. For pixels to the - * left of S0 there are no corresponding input pixels so just - * copy the S0 values over. - * - * Also initialize the equals counter, which counts how many of - * the latest pixels were exactly equal. We know the columns - * left of S0 must be equal to S0, so start with that number. + * Initialize the sample array for this line, and also + * the equals counter, which counts how many of the latest + * pixels were exactly equal. */ - int equals = S0 * SSZ; - uint8_t last_equal = ypix[0][0]; - for (sy = 0; sy < SSZ; sy++) { - for (sx = S0; sx < SSZ; sx++) { + int equals = 0; + uint8_t last_equal = -1; + struct rgb_color *last_sample = NULL; + for (sx = 0; sx < SSZ; sx++) { + for (sy = 0; sy < SSZ; sy++) { if (sx >= dim_org->width) { sample[sx][sy] = sample[sx - 1][sy]; equals++; continue; } - uint8_t i = ypix[sy][sx - S0]; + /* + * For pixels to the left of S0 there are no + * corresponding input pixels so just use + * ypix[sy][0]. + */ + uint8_t i = ypix[sy][MAX(0, sx - S0)]; + if (last_sample && i == last_equal) { + sample[sx][sy] = *last_sample; + equals++; + continue; + } if (pal_to_rgb(i, pal, header->colors_used, &sample[sx][sy])) goto bitmap_error; - if (i == last_equal) { - equals++; - } else { - last_equal = i; - equals = 1; - } + last_equal = i; + last_sample = &sample[sx][sy]; + equals = 1; } - for (sx = S0 - 1; sx >= 0; sx--) - sample[sx][sy] = sample[S0][sy]; } ix = 0; -- To view, visit https://review.coreboot.org/c/coreboot/+/45235 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibc91ad1af85adcf093eff40797cd54f32f57111d Gerrit-Change-Number: 45235 Gerrit-PatchSet: 1 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/system76/lemp9: update power limits
by Jeremy Soller (Code Review) 18 Sep '20

18 Sep '20

Jeremy Soller has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43624 ) Change subject: mb/system76/lemp9: update power limits ...................................................................... mb/system76/lemp9: update power limits Tested on lemp9, power limits are corrected Signed-off-by: Jeremy Soller <jeremy(a)system76.com> Change-Id: I5e176e9d98376f8e2dc415e4397efc456869e72d --- M src/mainboard/system76/lemp9/devicetree.cb 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/43624/1 diff --git a/src/mainboard/system76/lemp9/devicetree.cb b/src/mainboard/system76/lemp9/devicetree.cb index 27f5efb..3a158ed 100644 --- a/src/mainboard/system76/lemp9/devicetree.cb +++ b/src/mainboard/system76/lemp9/devicetree.cb @@ -25,8 +25,8 @@ # CPU (soc/intel/cannonlake/cpu.c) # Power limit register "power_limits_config" = "{ - .tdp_pl1_override = 15, - .tdp_pl2_override = 25, + .tdp_pl1_override = 20, + .tdp_pl2_override = 30, }" # Enable "Intel Speed Shift Technology" -- To view, visit https://review.coreboot.org/c/coreboot/+/43624 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5e176e9d98376f8e2dc415e4397efc456869e72d Gerrit-Change-Number: 43624 Gerrit-PatchSet: 1 Gerrit-Owner: Jeremy Soller <jeremy(a)system76.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/xeon_sp/cpx: Enable ACPI Continuous Performance Control
by Jingle Hsu (Code Review) 18 Sep '20

18 Sep '20

Jingle Hsu has removed build bot (Jenkins) from this change. ( https://review.coreboot.org/c/coreboot/+/45426 ) Change subject: soc/intel/xeon_sp/cpx: Enable ACPI Continuous Performance Control ...................................................................... Removed reviewer build bot (Jenkins). -- To view, visit https://review.coreboot.org/c/coreboot/+/45426 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I612598a5189375f335315933b590e1f7d24b2944 Gerrit-Change-Number: 45426 Gerrit-PatchSet: 3 Gerrit-Owner: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-MessageType: deleteReviewer

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Change in coreboot[master]: soc/intel/xeon_sp/cpx: Enable ACPI Continuous Performance Control
by Jingle Hsu (Code Review) 18 Sep '20

18 Sep '20

Jingle Hsu has removed Johnny Lin from this change. ( https://review.coreboot.org/c/coreboot/+/45426 ) Change subject: soc/intel/xeon_sp/cpx: Enable ACPI Continuous Performance Control ...................................................................... Removed reviewer Johnny Lin. -- To view, visit https://review.coreboot.org/c/coreboot/+/45426 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I612598a5189375f335315933b590e1f7d24b2944 Gerrit-Change-Number: 45426 Gerrit-PatchSet: 3 Gerrit-Owner: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: deleteReviewer

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Change in coreboot[master]: soc/intel/xeon_sp/cpx: Enable ACPI Continuous Performance Control
by Jingle Hsu (Code Review) 18 Sep '20

18 Sep '20

Jingle Hsu has removed Patrick Rudolph from this change. ( https://review.coreboot.org/c/coreboot/+/45426 ) Change subject: soc/intel/xeon_sp/cpx: Enable ACPI Continuous Performance Control ...................................................................... Removed reviewer Patrick Rudolph. -- To view, visit https://review.coreboot.org/c/coreboot/+/45426 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I612598a5189375f335315933b590e1f7d24b2944 Gerrit-Change-Number: 45426 Gerrit-PatchSet: 3 Gerrit-Owner: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: deleteReviewer

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Change in coreboot[master]: soc/intel/xeon_sp/cpx: Enable ACPI Continuous Performance Control
by Jingle Hsu (Code Review) 18 Sep '20

18 Sep '20

Jingle Hsu has removed Morgan Jang from this change. ( https://review.coreboot.org/c/coreboot/+/45426 ) Change subject: soc/intel/xeon_sp/cpx: Enable ACPI Continuous Performance Control ...................................................................... Removed reviewer Morgan Jang. -- To view, visit https://review.coreboot.org/c/coreboot/+/45426 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I612598a5189375f335315933b590e1f7d24b2944 Gerrit-Change-Number: 45426 Gerrit-PatchSet: 3 Gerrit-Owner: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: deleteReviewer

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Change in coreboot[master]: soc/intel/xeon_sp/cpx: Enable ACPI Continuous Performance Control
by Jingle Hsu (Code Review) 18 Sep '20

18 Sep '20

Jingle Hsu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45426 ) Change subject: soc/intel/xeon_sp/cpx: Enable ACPI Continuous Performance Control ...................................................................... Patch Set 3: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/45426 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I612598a5189375f335315933b590e1f7d24b2944 Gerrit-Change-Number: 45426 Gerrit-PatchSet: 3 Gerrit-Owner: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 18 Sep 2020 02:16:15 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/cannonlake: add missing special function pads
by 9elements QA (Code Review) 18 Sep '20

18 Sep '20

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45211 ) Change subject: soc/intel/cannonlake: add missing special function pads ...................................................................... Patch Set 13: Automatic boot test returned (PASS/FAIL/TOTAL): 8/1/9 "QEMU x86 q35/ich9" (x86_32) using payload TianoCore : SUCCESS : https://lava.9esec.io/r/19887 "QEMU x86 q35/ich9" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/19886 "QEMU x86 i440fx/piix4" (x86_64) using payload SeaBIOS : FAIL : https://lava.9esec.io/r/19885 "QEMU x86 i440fx/piix4" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/19884 "QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/19883 "HP Z220 SFF Workstation" (x86_32) using payload LinuxBoot_BusyBox_kexec : SUCCESS : https://lava.9esec.io/r/19891 "HP Z220 SFF Workstation" (x86_32) using payload LinuxBoot_BusyBox_kexec : SUCCESS : https://lava.9esec.io/r/19890 "HP Compaq 8200 Elite SFF PC" (x86_32) using payload TianoCore : SUCCESS : https://lava.9esec.io/r/19889 "HP Compaq 8200 Elite SFF PC" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/19888 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/45211 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia3bc1df1a14dbca7c7213577cb2d5b98bb0acf64 Gerrit-Change-Number: 45211 Gerrit-PatchSet: 13 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Fri, 18 Sep 2020 02:10:43 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit September 2020