coreboot-gerrit July 2020

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Change in coreboot[master]: arch/x86/postcar_loader: Remove unused 'include <cpu/cpu.h>'
by HAOUAS Elyes (Code Review) 14 Jul '20

14 Jul '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42080 ) Change subject: arch/x86/postcar_loader: Remove unused 'include <cpu/cpu.h>' ...................................................................... arch/x86/postcar_loader: Remove unused 'include <cpu/cpu.h>' Change-Id: I5a36f5729a1a5ad5819ebb3c46b775ba52237d65 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/arch/x86/postcar_loader.c 1 file changed, 0 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/42080/1 diff --git a/src/arch/x86/postcar_loader.c b/src/arch/x86/postcar_loader.c index 084384e..241ba8c 100644 --- a/src/arch/x86/postcar_loader.c +++ b/src/arch/x86/postcar_loader.c @@ -3,7 +3,6 @@ #include <arch/romstage.h> #include <cbmem.h> #include <console/console.h> -#include <cpu/cpu.h> #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/smm.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/42080 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5a36f5729a1a5ad5819ebb3c46b775ba52237d65 Gerrit-Change-Number: 42080 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

2 4

Change in coreboot[master]: cpu/intel/model_1067x: Drop <cpu/x86/mp.h> include
by HAOUAS Elyes (Code Review) 14 Jul '20

14 Jul '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42395 ) Change subject: cpu/intel/model_1067x: Drop <cpu/x86/mp.h> include ...................................................................... cpu/intel/model_1067x: Drop <cpu/x86/mp.h> include Change-Id: Ib721e667144d6803261f3761a077570e0e27391d Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/cpu/intel/model_1067x/model_1067x_init.c 1 file changed, 0 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/42395/1 diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c index 7230213..cd774d3 100644 --- a/src/cpu/intel/model_1067x/model_1067x_init.c +++ b/src/cpu/intel/model_1067x/model_1067x_init.c @@ -4,7 +4,6 @@ #include <device/device.h> #include <cpu/cpu.h> #include <cpu/x86/msr.h> -#include <cpu/x86/mp.h> #include <cpu/x86/lapic.h> #include <cpu/intel/speedstep.h> #include <cpu/x86/cache.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/42395 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib721e667144d6803261f3761a077570e0e27391d Gerrit-Change-Number: 42395 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

2 6

Change in coreboot[master]: src: Drop unused <cpu/x86/tsc.h> include
by HAOUAS Elyes (Code Review) 14 Jul '20

14 Jul '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42393 ) Change subject: src: Drop unused <cpu/x86/tsc.h> include ...................................................................... src: Drop unused <cpu/x86/tsc.h> include Change-Id: Id090e232a96323adb8d9a24b81f7ae5669248f57 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/drivers/pc80/pc/spkmodem.c M src/soc/intel/baytrail/acpi.c M src/soc/intel/braswell/acpi.c M src/soc/intel/broadwell/acpi.c M src/soc/intel/broadwell/refcode.c M src/soc/intel/skylake/acpi.c 6 files changed, 0 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/42393/1 diff --git a/src/drivers/pc80/pc/spkmodem.c b/src/drivers/pc80/pc/spkmodem.c index 7b88c0a..ced544e 100644 --- a/src/drivers/pc80/pc/spkmodem.c +++ b/src/drivers/pc80/pc/spkmodem.c @@ -2,7 +2,6 @@ #include <arch/io.h> #include <console/spkmodem.h> -#include <cpu/x86/tsc.h> #define SPEAKER_PIT_FREQUENCY 0x1234dd diff --git a/src/soc/intel/baytrail/acpi.c b/src/soc/intel/baytrail/acpi.c index d008dd8..43d0e90 100644 --- a/src/soc/intel/baytrail/acpi.c +++ b/src/soc/intel/baytrail/acpi.c @@ -9,7 +9,6 @@ #include <cpu/x86/smm.h> #include <types.h> #include <cpu/x86/msr.h> -#include <cpu/x86/tsc.h> #include <cpu/intel/turbo.h> #include <soc/acpi.h> diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c index 0bac42c..03e7c05 100644 --- a/src/soc/intel/braswell/acpi.c +++ b/src/soc/intel/braswell/acpi.c @@ -9,7 +9,6 @@ #include <cpu/intel/turbo.h> #include <cpu/x86/msr.h> #include <cpu/x86/smm.h> -#include <cpu/x86/tsc.h> #include <device/pci.h> #include <ec/google/chromeec/ec.h> #include <drivers/intel/gma/opregion.h> diff --git a/src/soc/intel/broadwell/acpi.c b/src/soc/intel/broadwell/acpi.c index fce2e45..bc99441 100644 --- a/src/soc/intel/broadwell/acpi.c +++ b/src/soc/intel/broadwell/acpi.c @@ -11,7 +11,6 @@ #include <string.h> #include <arch/cpu.h> #include <cpu/x86/msr.h> -#include <cpu/x86/tsc.h> #include <cpu/intel/turbo.h> #include <ec/google/chromeec/ec.h> #include <vendorcode/google/chromeos/gnvs.h> diff --git a/src/soc/intel/broadwell/refcode.c b/src/soc/intel/broadwell/refcode.c index 5e5bc49..882f888 100644 --- a/src/soc/intel/broadwell/refcode.c +++ b/src/soc/intel/broadwell/refcode.c @@ -5,7 +5,6 @@ #include <cbmem.h> #include <console/console.h> #include <console/streams.h> -#include <cpu/x86/tsc.h> #include <program_loading.h> #include <rmodule.h> #include <stage_cache.h> diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c index bdfacd3..71ecd0b 100644 --- a/src/soc/intel/skylake/acpi.c +++ b/src/soc/intel/skylake/acpi.c @@ -9,7 +9,6 @@ #include <console/console.h> #include <cpu/x86/smm.h> #include <cpu/x86/msr.h> -#include <cpu/x86/tsc.h> #include <cpu/intel/common/common.h> #include <cpu/intel/turbo.h> #include <ec/google/chromeec/ec.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/42393 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id090e232a96323adb8d9a24b81f7ae5669248f57 Gerrit-Change-Number: 42393 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

2 5

Change in coreboot[master]: src: Remove unused 'include <cpu/x86/msr.h>'
by HAOUAS Elyes (Code Review) 14 Jul '20

14 Jul '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41969 ) Change subject: src: Remove unused 'include <cpu/x86/msr.h>' ...................................................................... src: Remove unused 'include <cpu/x86/msr.h>' Change-Id: I45a41e77e5269969280e9f95cfc0effe7f117a40 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/cpu/intel/speedstep/acpi.c M src/cpu/x86/lapic/apic_timer.c M src/drivers/intel/gma/intel_ddi.c M src/mainboard/bap/ode_e21XX/mainboard.c M src/mainboard/intel/harcuvar/acpi_tables.c M src/mainboard/kontron/ktqm77/early_init.c M src/mainboard/lenovo/x220/early_init.c M src/mainboard/scaleway/tagada/acpi_tables.c M src/northbridge/intel/e7505/raminit.c M src/northbridge/intel/ironlake/northbridge.c M src/security/intel/stm/SmmStm.h M src/soc/amd/common/block/psp/psp.c M src/soc/amd/picasso/romstage.c M src/soc/intel/apollolake/car.c M src/soc/intel/apollolake/chip.c M src/soc/intel/baytrail/include/soc/pattrs.h M src/soc/intel/braswell/include/soc/pattrs.h M src/soc/intel/broadwell/cpu_info.c M src/soc/intel/common/block/acpi/acpi.c M src/soc/intel/denverton_ns/include/soc/pattrs.h M src/soc/intel/quark/include/soc/reg_access.h M src/soc/intel/xeon_sp/skx/soc_util.c M src/southbridge/amd/pi/hudson/early_setup.c 23 files changed, 0 insertions(+), 23 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/41969/1 diff --git a/src/cpu/intel/speedstep/acpi.c b/src/cpu/intel/speedstep/acpi.c index 3955614..2beb890 100644 --- a/src/cpu/intel/speedstep/acpi.c +++ b/src/cpu/intel/speedstep/acpi.c @@ -5,7 +5,6 @@ #include <acpi/acpi.h> #include <acpi/acpigen.h> #include <arch/cpu.h> -#include <cpu/x86/msr.h> #include <cpu/intel/fsb.h> #include <cpu/intel/speedstep.h> #include <device/device.h> diff --git a/src/cpu/x86/lapic/apic_timer.c b/src/cpu/x86/lapic/apic_timer.c index 97c28bd..01a67fa 100644 --- a/src/cpu/x86/lapic/apic_timer.c +++ b/src/cpu/x86/lapic/apic_timer.c @@ -4,7 +4,6 @@ #include <console/console.h> #include <delay.h> #include <thread.h> -#include <cpu/x86/msr.h> #include <cpu/x86/lapic.h> void init_timer(void) diff --git a/src/drivers/intel/gma/intel_ddi.c b/src/drivers/intel/gma/intel_ddi.c index a04789b..3893664 100644 --- a/src/drivers/intel/gma/intel_ddi.c +++ b/src/drivers/intel/gma/intel_ddi.c @@ -8,7 +8,6 @@ #include <device/pci.h> #include <ec/google/chromeec/ec.h> #include <cpu/x86/tsc.h> -#include <cpu/x86/msr.h> #include <edid.h> #include <drivers/intel/gma/i915.h> diff --git a/src/mainboard/bap/ode_e21XX/mainboard.c b/src/mainboard/bap/ode_e21XX/mainboard.c index ce4a63c..b26722a 100644 --- a/src/mainboard/bap/ode_e21XX/mainboard.c +++ b/src/mainboard/bap/ode_e21XX/mainboard.c @@ -3,7 +3,6 @@ #include <console/console.h> #include <device/device.h> #include <device/pci_def.h> -#include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> /********************************************** diff --git a/src/mainboard/intel/harcuvar/acpi_tables.c b/src/mainboard/intel/harcuvar/acpi_tables.c index 3b4f14a..66fddd3 100644 --- a/src/mainboard/intel/harcuvar/acpi_tables.c +++ b/src/mainboard/intel/harcuvar/acpi_tables.c @@ -2,7 +2,6 @@ #include <acpi/acpi.h> #include <device/device.h> -#include <cpu/x86/msr.h> #include <intelblocks/acpi.h> #include <soc/acpi.h> diff --git a/src/mainboard/kontron/ktqm77/early_init.c b/src/mainboard/kontron/ktqm77/early_init.c index b8f44b5..669577e 100644 --- a/src/mainboard/kontron/ktqm77/early_init.c +++ b/src/mainboard/kontron/ktqm77/early_init.c @@ -4,7 +4,6 @@ #include <stdint.h> #include <device/pnp_ops.h> #include <device/pci_ops.h> -#include <cpu/x86/msr.h> #include <device/pci_def.h> #include <northbridge/intel/sandybridge/raminit_native.h> #include <northbridge/intel/sandybridge/raminit.h> diff --git a/src/mainboard/lenovo/x220/early_init.c b/src/mainboard/lenovo/x220/early_init.c index 5f0ad45..e4c854c 100644 --- a/src/mainboard/lenovo/x220/early_init.c +++ b/src/mainboard/lenovo/x220/early_init.c @@ -7,7 +7,6 @@ #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/common/gpio.h> -#include <cpu/x86/msr.h> void mainboard_fill_pei_data(struct pei_data *pei_data) { diff --git a/src/mainboard/scaleway/tagada/acpi_tables.c b/src/mainboard/scaleway/tagada/acpi_tables.c index 3b4f14a..66fddd3 100644 --- a/src/mainboard/scaleway/tagada/acpi_tables.c +++ b/src/mainboard/scaleway/tagada/acpi_tables.c @@ -2,7 +2,6 @@ #include <acpi/acpi.h> #include <device/device.h> -#include <cpu/x86/msr.h> #include <intelblocks/acpi.h> #include <soc/acpi.h> diff --git a/src/northbridge/intel/e7505/raminit.c b/src/northbridge/intel/e7505/raminit.c index b87ba6e..63642d7 100644 --- a/src/northbridge/intel/e7505/raminit.c +++ b/src/northbridge/intel/e7505/raminit.c @@ -19,7 +19,6 @@ #include <lib.h> #include <commonlib/helpers.h> #include <console/console.h> -#include <cpu/x86/msr.h> #include <assert.h> #include <spd.h> #include <sdram_mode.h> diff --git a/src/northbridge/intel/ironlake/northbridge.c b/src/northbridge/intel/ironlake/northbridge.c index d98af9e..7894dd3 100644 --- a/src/northbridge/intel/ironlake/northbridge.c +++ b/src/northbridge/intel/ironlake/northbridge.c @@ -6,7 +6,6 @@ #include <stdint.h> #include <delay.h> #include <cpu/intel/model_2065x/model_2065x.h> -#include <cpu/x86/msr.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> diff --git a/src/security/intel/stm/SmmStm.h b/src/security/intel/stm/SmmStm.h index c12b034..0447a9e 100644 --- a/src/security/intel/stm/SmmStm.h +++ b/src/security/intel/stm/SmmStm.h @@ -3,7 +3,6 @@ #ifndef _SMM_STM_H_ #define _SMM_STM_H_ -#include <cpu/x86/msr.h> #include "StmApi.h" /* diff --git a/src/soc/amd/common/block/psp/psp.c b/src/soc/amd/common/block/psp/psp.c index 0e03174..2787b73 100644 --- a/src/soc/amd/common/block/psp/psp.c +++ b/src/soc/amd/common/block/psp/psp.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <device/mmio.h> -#include <cpu/x86/msr.h> #include <bootstate.h> #include <console/console.h> #include <amdblocks/psp.h> diff --git a/src/soc/amd/picasso/romstage.c b/src/soc/amd/picasso/romstage.c index 0bbceec..80bfa0a 100644 --- a/src/soc/amd/picasso/romstage.c +++ b/src/soc/amd/picasso/romstage.c @@ -3,7 +3,6 @@ #include <arch/cpu.h> #include <acpi/acpi.h> #include <cpu/x86/cache.h> -#include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <console/uart.h> #include <cbmem.h> diff --git a/src/soc/intel/apollolake/car.c b/src/soc/intel/apollolake/car.c index cbc43d5..fc6691b 100644 --- a/src/soc/intel/apollolake/car.c +++ b/src/soc/intel/apollolake/car.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include <assert.h> -#include <cpu/x86/msr.h> #include <intelblocks/msr.h> #include <program_loading.h> #include <soc/cpu.h> diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index cc190ba..3558956 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -5,7 +5,6 @@ #include <cbmem.h> #include <console/console.h> #include <cpu/x86/mp.h> -#include <cpu/x86/msr.h> #include <device/mmio.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/soc/intel/baytrail/include/soc/pattrs.h b/src/soc/intel/baytrail/include/soc/pattrs.h index c1ca7f4..7c1be28 100644 --- a/src/soc/intel/baytrail/include/soc/pattrs.h +++ b/src/soc/intel/baytrail/include/soc/pattrs.h @@ -4,7 +4,6 @@ #define _PATTRS_H_ #include <stdint.h> -#include <cpu/x86/msr.h> enum { IACORE_MIN, diff --git a/src/soc/intel/braswell/include/soc/pattrs.h b/src/soc/intel/braswell/include/soc/pattrs.h index 5cad6d0..89c6861 100644 --- a/src/soc/intel/braswell/include/soc/pattrs.h +++ b/src/soc/intel/braswell/include/soc/pattrs.h @@ -4,7 +4,6 @@ #define _SOC_PATTRS_H_ #include <stdint.h> -#include <cpu/x86/msr.h> enum { IACORE_MIN, diff --git a/src/soc/intel/broadwell/cpu_info.c b/src/soc/intel/broadwell/cpu_info.c index 5542f17..506b1a7 100644 --- a/src/soc/intel/broadwell/cpu_info.c +++ b/src/soc/intel/broadwell/cpu_info.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <arch/cpu.h> -#include <cpu/x86/msr.h> #include <soc/cpu.h> #include <soc/msr.h> #include <soc/systemagent.h> diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c index 70a9cac..6570c5c 100644 --- a/src/soc/intel/common/block/acpi/acpi.c +++ b/src/soc/intel/common/block/acpi/acpi.c @@ -8,7 +8,6 @@ #include <cf9_reset.h> #include <console/console.h> #include <cpu/intel/turbo.h> -#include <cpu/x86/msr.h> #include <cpu/x86/smm.h> #include <intelblocks/acpi.h> #include <intelblocks/msr.h> diff --git a/src/soc/intel/denverton_ns/include/soc/pattrs.h b/src/soc/intel/denverton_ns/include/soc/pattrs.h index 224c56d..47bb1e7 100644 --- a/src/soc/intel/denverton_ns/include/soc/pattrs.h +++ b/src/soc/intel/denverton_ns/include/soc/pattrs.h @@ -4,7 +4,6 @@ #define _DENVERTON_NS_PATTRS_H_ #include <stdint.h> -#include <cpu/x86/msr.h> enum { IACORE_MIN, IACORE_LFM, IACORE_MAX, IACORE_TURBO, IACORE_END }; diff --git a/src/soc/intel/quark/include/soc/reg_access.h b/src/soc/intel/quark/include/soc/reg_access.h index 31df09d..1f186f7 100644 --- a/src/soc/intel/quark/include/soc/reg_access.h +++ b/src/soc/intel/quark/include/soc/reg_access.h @@ -4,7 +4,6 @@ #define _QUARK_REG_ACCESS_H_ #include <cpu/x86/cr.h> -#include <cpu/x86/msr.h> #include <fsp/util.h> #include <reg_script.h> #include <soc/IntelQNCConfig.h> diff --git a/src/soc/intel/xeon_sp/skx/soc_util.c b/src/soc/intel/xeon_sp/skx/soc_util.c index dc97d5e..f69f0b9 100644 --- a/src/soc/intel/xeon_sp/skx/soc_util.c +++ b/src/soc/intel/xeon_sp/skx/soc_util.c @@ -3,7 +3,6 @@ #include <assert.h> #include <commonlib/sort.h> #include <console/console.h> -#include <cpu/x86/msr.h> #include <delay.h> #include <device/pci.h> #include <hob_iiouds.h> diff --git a/src/southbridge/amd/pi/hudson/early_setup.c b/src/southbridge/amd/pi/hudson/early_setup.c index 8bca42b..14bb5e2 100644 --- a/src/southbridge/amd/pi/hudson/early_setup.c +++ b/src/southbridge/amd/pi/hudson/early_setup.c @@ -16,7 +16,6 @@ #if CONFIG(HUDSON_UART) -#include <cpu/x86/msr.h> #include <delay.h> void configure_hudson_uart(void) -- To view, visit https://review.coreboot.org/c/coreboot/+/41969 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I45a41e77e5269969280e9f95cfc0effe7f117a40 Gerrit-Change-Number: 41969 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

3 12

Change in coreboot[master]: src/drivers/usb/gadget.c: Add missing include
by HAOUAS Elyes (Code Review) 14 Jul '20

14 Jul '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43347 ) Change subject: src/drivers/usb/gadget.c: Add missing include ...................................................................... src/drivers/usb/gadget.c: Add missing include Replace unused <stddef.h> by missing <stdint.h>. Change-Id: I1ca111a30153526c3915bf393208fb2b4c569c01 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/drivers/usb/gadget.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/43347/1 diff --git a/src/drivers/usb/gadget.c b/src/drivers/usb/gadget.c index 48a83d2..b7aad23 100644 --- a/src/drivers/usb/gadget.c +++ b/src/drivers/usb/gadget.c @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <stddef.h> +#include <stdint.h> #include <console/console.h> #include <string.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/43347 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1ca111a30153526c3915bf393208fb2b4c569c01 Gerrit-Change-Number: 43347 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

2 3

Change in coreboot[master]: soc/intel/baytrail/northcluster.c: Add missing include
by HAOUAS Elyes (Code Review) 14 Jul '20

14 Jul '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43346 ) Change subject: soc/intel/baytrail/northcluster.c: Add missing include ...................................................................... soc/intel/baytrail/northcluster.c: Add missing include Replace unused <stddef.h> by missing <stdint.h>. Change-Id: I85745c331c81a419cef4547fc1c67bde1e202e8f Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/intel/baytrail/northcluster.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/43346/1 diff --git a/src/soc/intel/baytrail/northcluster.c b/src/soc/intel/baytrail/northcluster.c index 667c8e8..c5afa42 100644 --- a/src/soc/intel/baytrail/northcluster.c +++ b/src/soc/intel/baytrail/northcluster.c @@ -5,7 +5,7 @@ #include <device/pci_ids.h> #include <vendorcode/google/chromeos/chromeos.h> #include <acpi/acpi.h> -#include <stddef.h> +#include <stdint.h> #include <soc/iomap.h> #include <soc/iosf.h> #include <soc/pci_devs.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/43346 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I85745c331c81a419cef4547fc1c67bde1e202e8f Gerrit-Change-Number: 43346 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/baytrail/romstage/pmc.c: Add missing include
by HAOUAS Elyes (Code Review) 14 Jul '20

14 Jul '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43345 ) Change subject: soc/intel/baytrail/romstage/pmc.c: Add missing include ...................................................................... soc/intel/baytrail/romstage/pmc.c: Add missing include Replace unused <stddef.h> by missing <stdint.h>. Change-Id: If8384f4fea66e26d7377311e7bd8379c7848a26f Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/intel/baytrail/romstage/pmc.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/43345/1 diff --git a/src/soc/intel/baytrail/romstage/pmc.c b/src/soc/intel/baytrail/romstage/pmc.c index e495a2b..be058d0 100644 --- a/src/soc/intel/baytrail/romstage/pmc.c +++ b/src/soc/intel/baytrail/romstage/pmc.c @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <stddef.h> +#include <stdint.h> #include <device/pci_ops.h> #include <console/console.h> #include <device/device.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/43345 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If8384f4fea66e26d7377311e7bd8379c7848a26f Gerrit-Change-Number: 43345 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/baytrail/romstage/raminit.c: Add missing include
by HAOUAS Elyes (Code Review) 14 Jul '20

14 Jul '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43344 ) Change subject: soc/intel/baytrail/romstage/raminit.c: Add missing include ...................................................................... soc/intel/baytrail/romstage/raminit.c: Add missing include Replace unused <stddef.h> by missing <stdint.h>. Change-Id: I659a067e3b737dc7efe5bdadfd88207cd4d7175d Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/intel/baytrail/romstage/raminit.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/43344/1 diff --git a/src/soc/intel/baytrail/romstage/raminit.c b/src/soc/intel/baytrail/romstage/raminit.c index 5cedf22..0b7a8c6 100644 --- a/src/soc/intel/baytrail/romstage/raminit.c +++ b/src/soc/intel/baytrail/romstage/raminit.c @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <stddef.h> +#include <stdint.h> #include <acpi/acpi.h> #include <assert.h> #include <cbfs.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/43344 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I659a067e3b737dc7efe5bdadfd88207cd4d7175d Gerrit-Change-Number: 43344 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/braswell/romstage/romstage.c: Add missing include
by HAOUAS Elyes (Code Review) 14 Jul '20

14 Jul '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43343 ) Change subject: soc/intel/braswell/romstage/romstage.c: Add missing include ...................................................................... soc/intel/braswell/romstage/romstage.c: Add missing include Replace unused <stddef.h> by missing <stdint.h>. Change-Id: I43b8ba5849de30e2ee253382ef85b17f2d0ae589 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/intel/braswell/romstage/romstage.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/43343/1 diff --git a/src/soc/intel/braswell/romstage/romstage.c b/src/soc/intel/braswell/romstage/romstage.c index 77d13c4..b6b20b9 100644 --- a/src/soc/intel/braswell/romstage/romstage.c +++ b/src/soc/intel/braswell/romstage/romstage.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <cbmem.h> -#include <stddef.h> +#include <stdint.h> #include <arch/io.h> #include <device/mmio.h> #include <console/console.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/43343 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I43b8ba5849de30e2ee253382ef85b17f2d0ae589 Gerrit-Change-Number: 43343 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/rockchip/rk3399/display.c: Add missing include
by HAOUAS Elyes (Code Review) 14 Jul '20

14 Jul '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43342 ) Change subject: soc/rockchip/rk3399/display.c: Add missing include ...................................................................... soc/rockchip/rk3399/display.c: Add missing include Replace unused <stddef.h> by missing <stdint.h>. Change-Id: Ibdde8fb5ec5bf7d25facd78064a7837d24fa2c8a Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/rockchip/rk3399/display.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/43342/1 diff --git a/src/soc/rockchip/rk3399/display.c b/src/soc/rockchip/rk3399/display.c index b47fabc..70e8c7c 100644 --- a/src/soc/rockchip/rk3399/display.c +++ b/src/soc/rockchip/rk3399/display.c @@ -7,7 +7,7 @@ #include <delay.h> #include <edid.h> #include <gpio.h> -#include <stddef.h> +#include <stdint.h> #include <soc/addressmap.h> #include <soc/clock.h> #include <soc/display.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/43342 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibdde8fb5ec5bf7d25facd78064a7837d24fa2c8a Gerrit-Change-Number: 43342 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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