coreboot-gerrit June 2020

coreboot-gerrit@coreboot.org

1 participants
2825 discussions

Change in coreboot[master]: src/mainboard/supermicro/x11-lga1151v2-series: Add Support for X11SCH-F
by Patrick Rudolph (Code Review) 07 Jun '20

07 Jun '20

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37441 ) Change subject: src/mainboard/supermicro/x11-lga1151v2-series: Add Support for X11SCH-F ...................................................................... Patch Set 51: (4 comments) H https://review.coreboot.org/c/coreboot/+/37441/51/src/mainboard/supermicro/… File src/mainboard/supermicro/x11-lga1151v2-series/bootblock.c: https://review.coreboot.org/c/coreboot/+/37441/51/src/mainboard/supermicro/… PS51, Line 31: 1000 There's a Kconfig for that now. https://review.coreboot.org/c/coreboot/+/37441/51/src/mainboard/supermicro/… File src/mainboard/supermicro/x11-lga1151v2-series/devicetree.cb: https://review.coreboot.org/c/coreboot/+/37441/51/src/mainboard/supermicro/… PS51, Line 38: . Use_espi=1? https://review.coreboot.org/c/coreboot/+/37441/49/src/mainboard/supermicro/… File src/mainboard/supermicro/x11-lga1151v2-series/ramstage.c: https://review.coreboot.org/c/coreboot/+/37441/49/src/mainboard/supermicro/… PS49, Line 18: params->PchHdaVcType = 0x1; > Make this common then? That was a workaround for KBL. I don't think this should be here. https://review.coreboot.org/c/coreboot/+/37441/49/src/mainboard/supermicro/… File src/mainboard/supermicro/x11-lga1151v2-series/romstage.c: https://review.coreboot.org/c/coreboot/+/37441/49/src/mainboard/supermicro/… PS49, Line 6: console Not needed -- To view, visit https://review.coreboot.org/c/coreboot/+/37441 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0ab1cb9462607b9af068bc2374508d99c60d0a30 Gerrit-Change-Number: 37441 Gerrit-PatchSet: 51 Gerrit-Owner: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Guido Beyer @ Prodrive Technologies <guido.beyer(a)prodrive-technologies.com> Gerrit-Reviewer: Justin van Son <justin.van.son(a)prodrive-technologies.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Stef van Os <stef.van.os(a)prodrive-technologies.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: wouter.eckhardt(a)prodrive-technologies.com Gerrit-Comment-Date: Sun, 07 Jun 2020 11:36:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: src/mainboard/supermicro/x11-lga1151v2-series: Add Support for X11SCH-F
by Christian Walter (Code Review) 07 Jun '20

07 Jun '20

Hello build bot (Jenkins), Patrick Georgi, Patrick Rudolph, Angel Pons, Patrick Rudolph, Stef van Os, wouter.eckhardt(a)prodrive-technologies.com, Philipp Deppenwiese, Guido Beyer @ Prodrive Technologies, Justin van Son, Nico Huber, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/37441 to look at the new patch set (#51). Change subject: src/mainboard/supermicro/x11-lga1151v2-series: Add Support for X11SCH-F ...................................................................... src/mainboard/supermicro/x11-lga1151v2-series: Add Support for X11SCH-F This commit adds initial support for the Supermicro X11SCH-F. What is working: * Aspeed AST2500 Graphics Output * Serial Console * SuperIO DevTree Config * Boots into Linux * SATA Slots * USB Slots * IPMI KCS * LinuxBoot * Proper ACPI Tables * Windows Support * TPM Support (w/ patched IFD) - Patch IFD at 0x235=03 and 0x13E=84 Tested with Intel Xeon E-2186G and 64 GB ECC RAM. Change-Id: I0ab1cb9462607b9af068bc2374508d99c60d0a30 Signed-off-by: Christian Walter <christian.walter(a)9elements.com> --- M Documentation/mainboard/index.md A Documentation/mainboard/supermicro/x11-lga1151v2-series/x11-lga1151v2-series.md A Documentation/mainboard/supermicro/x11-lga1151v2-series/x11sch-f/x11sch-f.md A Documentation/mainboard/supermicro/x11-lga1151v2-series/x11sch-f/x11sch-f_flash.jpg M MAINTAINERS A src/mainboard/supermicro/x11-lga1151v2-series/Kconfig A src/mainboard/supermicro/x11-lga1151v2-series/Kconfig.name A src/mainboard/supermicro/x11-lga1151v2-series/Makefile.inc A src/mainboard/supermicro/x11-lga1151v2-series/board_info.txt A src/mainboard/supermicro/x11-lga1151v2-series/bootblock.c A src/mainboard/supermicro/x11-lga1151v2-series/devicetree.cb A src/mainboard/supermicro/x11-lga1151v2-series/dsdt.asl A src/mainboard/supermicro/x11-lga1151v2-series/memory.c A src/mainboard/supermicro/x11-lga1151v2-series/ramstage.c A src/mainboard/supermicro/x11-lga1151v2-series/romstage.c A src/mainboard/supermicro/x11-lga1151v2-series/variants/x11sch-f/Makefile.inc A src/mainboard/supermicro/x11-lga1151v2-series/variants/x11sch-f/board_info.txt A src/mainboard/supermicro/x11-lga1151v2-series/variants/x11sch-f/gpio.c A src/mainboard/supermicro/x11-lga1151v2-series/variants/x11sch-f/include/variant/gpio.h A src/mainboard/supermicro/x11-lga1151v2-series/variants/x11sch-f/include/variant/variants.h A src/mainboard/supermicro/x11-lga1151v2-series/variants/x11sch-f/overridetree.cb 21 files changed, 1,012 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/37441/51 -- To view, visit https://review.coreboot.org/c/coreboot/+/37441 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0ab1cb9462607b9af068bc2374508d99c60d0a30 Gerrit-Change-Number: 37441 Gerrit-PatchSet: 51 Gerrit-Owner: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Guido Beyer @ Prodrive Technologies <guido.beyer(a)prodrive-technologies.com> Gerrit-Reviewer: Justin van Son <justin.van.son(a)prodrive-technologies.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Stef van Os <stef.van.os(a)prodrive-technologies.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: wouter.eckhardt(a)prodrive-technologies.com Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: src/mainboard/supermicro/x11-lga1151v2-series: Add Support for X11SCH-F
by Christian Walter (Code Review) 07 Jun '20

07 Jun '20

Hello build bot (Jenkins), Patrick Georgi, Patrick Rudolph, Angel Pons, Patrick Rudolph, Stef van Os, wouter.eckhardt(a)prodrive-technologies.com, Philipp Deppenwiese, Guido Beyer @ Prodrive Technologies, Justin van Son, Nico Huber, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/37441 to look at the new patch set (#50). Change subject: src/mainboard/supermicro/x11-lga1151v2-series: Add Support for X11SCH-F ...................................................................... src/mainboard/supermicro/x11-lga1151v2-series: Add Support for X11SCH-F This commit adds initial support for the Supermicro X11SCH-F. What is working: * Aspeed AST2500 Graphics Output * Serial Console * SuperIO DevTree Config * Boots into Linux * SATA Slots * USB Slots * IPMI KCS * LinuxBoot * Proper ACPI Tables * Windows Support * TPM Support (w/ patched IFD) - Patch IFD at 0x235=03 and 0x13E=84 Tested with Intel Xeon E-2186G and 64 GB ECC RAM. Change-Id: I0ab1cb9462607b9af068bc2374508d99c60d0a30 Signed-off-by: Christian Walter <christian.walter(a)9elements.com> --- M Documentation/mainboard/index.md A Documentation/mainboard/supermicro/x11-lga1151v2-series/x11-lga1151v2-series.md A Documentation/mainboard/supermicro/x11-lga1151v2-series/x11sch-f/x11sch-f.md A Documentation/mainboard/supermicro/x11-lga1151v2-series/x11sch-f/x11sch-f_flash.jpg M MAINTAINERS A src/mainboard/supermicro/x11-lga1151v2-series/Kconfig A src/mainboard/supermicro/x11-lga1151v2-series/Kconfig.name A src/mainboard/supermicro/x11-lga1151v2-series/Makefile.inc A src/mainboard/supermicro/x11-lga1151v2-series/board_info.txt A src/mainboard/supermicro/x11-lga1151v2-series/bootblock.c A src/mainboard/supermicro/x11-lga1151v2-series/devicetree.cb A src/mainboard/supermicro/x11-lga1151v2-series/dsdt.asl A src/mainboard/supermicro/x11-lga1151v2-series/memory.c A src/mainboard/supermicro/x11-lga1151v2-series/ramstage.c A src/mainboard/supermicro/x11-lga1151v2-series/romstage.c A src/mainboard/supermicro/x11-lga1151v2-series/variants/x11sch-f/Makefile.inc A src/mainboard/supermicro/x11-lga1151v2-series/variants/x11sch-f/board_info.txt A src/mainboard/supermicro/x11-lga1151v2-series/variants/x11sch-f/gpio.c A src/mainboard/supermicro/x11-lga1151v2-series/variants/x11sch-f/include/variant/gpio.h A src/mainboard/supermicro/x11-lga1151v2-series/variants/x11sch-f/include/variant/variants.h A src/mainboard/supermicro/x11-lga1151v2-series/variants/x11sch-f/overridetree.cb 21 files changed, 1,013 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/37441/50 -- To view, visit https://review.coreboot.org/c/coreboot/+/37441 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0ab1cb9462607b9af068bc2374508d99c60d0a30 Gerrit-Change-Number: 37441 Gerrit-PatchSet: 50 Gerrit-Owner: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Guido Beyer @ Prodrive Technologies <guido.beyer(a)prodrive-technologies.com> Gerrit-Reviewer: Justin van Son <justin.van.son(a)prodrive-technologies.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Stef van Os <stef.van.os(a)prodrive-technologies.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: wouter.eckhardt(a)prodrive-technologies.com Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: Maintainers: Remove Martin as maintainer
by Martin Roth (Code Review) 06 Jun '20

06 Jun '20

Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38584 ) Change subject: Maintainers: Remove Martin as maintainer ...................................................................... Maintainers: Remove Martin as maintainer Signed-off-by: Martin Roth <martin(a)coreboot.org> Change-Id: Ibb0446958e27c9c4cc6b8408b162e7ada48e291a --- M MAINTAINERS 1 file changed, 3 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/38584/1 diff --git a/MAINTAINERS b/MAINTAINERS index 6c565f7..ab78b9d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -358,7 +358,6 @@ ABUILD M: Patrick Georgi <patrick(a)georgi-clan.de> -M: Martin Roth <gaumless(a)gmail.com> S: Supported F: util/abuild/ @@ -424,7 +423,6 @@ LINT SCRIPTS M: Patrick Georgi <patrick(a)georgi-clan.de> -M: Martin Roth <gaumless(a)gmail.com> S: Supported F: util/lint/ @@ -448,7 +446,6 @@ BUILD SYSTEM M: Patrick Georgi <patrick(a)georgi-clan.de> -M: Martin Roth <gaumless(a)gmail.com> S: Supported F: Makefile F: *.inc @@ -509,7 +506,6 @@ EXTERNAL PAYLOADS INTEGRATION M: Stefan Reinauer <stefan.reinauer(a)coreboot.org> -M: Martin Roth <gaumless(a)gmail.com> F: payloads/external LINUXBOOT PAYLOAD INTEGRATION @@ -530,7 +526,6 @@ F: src/security/tpm DOCKER -M: Martin Roth <gaumless(a)gmail.com> S: Supported F: util/docker/ @@ -586,7 +581,7 @@ # Backups: # Website -# Owners: Martin, Philipp +# Owners: Philipp # Backups: Patrick, Stefan # Documentation Website @@ -597,7 +592,6 @@ M: Stefan Reinauer <stefan.reinauer(a)coreboot.org> M: Patrick Georgi <patrick(a)coreboot.org> M: Ronald Minnich <rminnich(a)coreboot.org> -M: Martin Roth <martin(a)coreboot.org> S: Maintained F: Documentation/community/code_of_conduct.md @@ -607,20 +601,17 @@ # Gerrit # Owners: Stefan, Patrick -# Backups: Martin # Jenkins -# Owners: Patrick, Martin +# Owners: Patrick # Backups: # Bug Tracker # Owners: Lynxis, -# Backups: Martin, # Mailing List # Owners: Stefan, Patrick -# Backups: Martin, + # Software Freedom Conservancy -# Main contact: Martin # “Official” contact: Stefan -- To view, visit https://review.coreboot.org/c/coreboot/+/38584 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibb0446958e27c9c4cc6b8408b162e7ada48e291a Gerrit-Change-Number: 38584 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: newchange

5 5

Change in coreboot[master]: lockdown: Add hint for how to check for lockdown support in boot log
by Daniel Gröber (dxld) (Code Review) 06 Jun '20

06 Jun '20

Hello Daniel Gröber, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/41749 to review the following change. Change subject: lockdown: Add hint for how to check for lockdown support in boot log ...................................................................... lockdown: Add hint for how to check for lockdown support in boot log Change-Id: Iaceb2e82f900e52efcce702486e18d0483665640 Signed-off-by: Daniel Gröber <dxld(a)darkboxed.org> --- M src/security/lockdown/Kconfig 1 file changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/41749/1 diff --git a/src/security/lockdown/Kconfig b/src/security/lockdown/Kconfig index 97094ff..9d83a45 100644 --- a/src/security/lockdown/Kconfig +++ b/src/security/lockdown/Kconfig @@ -18,7 +18,8 @@ bool "Lock boot media using the chip" help Select this if you want the chip to lock specific regions. - This only works on some chips, please check the code or boot log. + This only works on some chips, please check the code or search the + boot log for "BM-LOCKDOWN". endchoice -- To view, visit https://review.coreboot.org/c/coreboot/+/41749 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaceb2e82f900e52efcce702486e18d0483665640 Gerrit-Change-Number: 41749 Gerrit-PatchSet: 1 Gerrit-Owner: Daniel Gröber (dxld) Gerrit-Reviewer: Daniel Gröber <dxld(a)darkboxed.org> Gerrit-MessageType: newchange

3 2

Change in coreboot[master]: ec/google/wilco: Always use current value of battery status bit
by Mathew King (Code Review) 06 Jun '20

06 Jun '20

Mathew King has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42017 ) Change subject: ec/google/wilco: Always use current value of battery status bit ...................................................................... ec/google/wilco: Always use current value of battery status bit According to the Wilco EC spec the BTSC bit of PWSR is always cleared when PWSR is read so that battery status change events are only triggered one time. Testing of the Wilco EC has verified this behavior. This changes the way in which the battery status change bit is used from checking the bit state against the prevous value to always issuing a battery event when the BTSC bit is set. The other bits in PWSR indicate state directly and do not behave like the BTSC bit. BUG=b:157113138 TEST=Deploy on Drallion and verify that battery events are generated BRANCH=drallion, sarien Signed-off-by: Mathew King <mathewk(a)chromium.org> Change-Id: I8fbf2ee1158ddd790b04a20b1eb27a6cce4f5c81 --- M src/ec/google/wilco/acpi/event.asl 1 file changed, 5 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/42017/1 diff --git a/src/ec/google/wilco/acpi/event.asl b/src/ec/google/wilco/acpi/event.asl index a98344d..bf4bb19 100644 --- a/src/ec/google/wilco/acpi/event.asl +++ b/src/ec/google/wilco/acpi/event.asl @@ -25,7 +25,11 @@ } } - If (EBIT (BTSC, Local1)) { + /* + * Battery status is cleared when read so always use the value from + * PWSR directly regardless of the previous value stored in ECPR. + */ + If (EBIT (BTSC, Local0)) { Printf ("BAT0 Status Change") Notify (BAT0, 0x80) } -- To view, visit https://review.coreboot.org/c/coreboot/+/42017 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8fbf2ee1158ddd790b04a20b1eb27a6cce4f5c81 Gerrit-Change-Number: 42017 Gerrit-PatchSet: 1 Gerrit-Owner: Mathew King <mathewk(a)chromium.org> Gerrit-MessageType: newchange

3 3

Change in coreboot[master]: chromeos/cr50_enable_update.c: Modify recovery flow for cr50
by Edward O'Callaghan (Code Review) 06 Jun '20

06 Jun '20

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41988 ) Change subject: chromeos/cr50_enable_update.c: Modify recovery flow for cr50 ...................................................................... chromeos/cr50_enable_update.c: Modify recovery flow for cr50 Enable Cr50 update in recovery mode, so that we can at least still update the process for most cases (that an update is pending in recovery mode is not impossible but should be unlikely in the field). Leave manual recovery unaffected so at least that would still work even if Cr50 wedges in a weird way that it thinks it has an update on every boot or something. Setting the recovery_reason to VB2_RECOVERY_TRAIN_AND_REBOOT allows the update to be applied. BUG=b:154071064 BRANCH=none TEST=builds Thanks to Julius Werner for the suggested fix. Change-Id: Iba341a750cce8334da4dcf6353ca8cd1268d170f Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- M src/vendorcode/google/chromeos/cr50_enable_update.c 1 file changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/41988/1 diff --git a/src/vendorcode/google/chromeos/cr50_enable_update.c b/src/vendorcode/google/chromeos/cr50_enable_update.c index 5b3a1a3..4351e7c 100644 --- a/src/vendorcode/google/chromeos/cr50_enable_update.c +++ b/src/vendorcode/google/chromeos/cr50_enable_update.c @@ -73,7 +73,8 @@ uint8_t num_restored_headers; /* Nothing to do on recovery mode. */ - if (vboot_recovery_mode_enabled()) + if (vboot_recovery_mode_enabled() && + (vboot_get_context()->flags & VB2_CONTEXT_FORCE_RECOVERY_MODE)) return; ret = tlcl_lib_init(); -- To view, visit https://review.coreboot.org/c/coreboot/+/41988 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iba341a750cce8334da4dcf6353ca8cd1268d170f Gerrit-Change-Number: 41988 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

4 9

Change in coreboot[master]: mb/google/dedede/var/wheelie: Add memory parts and generate DRAM IDs
by Furquan Shaikh (Code Review) 06 Jun '20

06 Jun '20

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41990 ) Change subject: mb/google/dedede/var/wheelie: Add memory parts and generate DRAM IDs ...................................................................... mb/google/dedede/var/wheelie: Add memory parts and generate DRAM IDs This change adds memory parts used by variant wheelie to mem_list_variant.txt and generates DRAM IDs allocated to these parts. BUG=b:157862308 Change-Id: I53f6f5c832cd40068a6d4379ace849f6e8ad7a91 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- M src/mainboard/google/dedede/variants/wheelie/memory/Makefile.inc M src/mainboard/google/dedede/variants/wheelie/memory/dram_id.generated.txt M src/mainboard/google/dedede/variants/wheelie/memory/mem_list_variant.txt 3 files changed, 11 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/41990/1 diff --git a/src/mainboard/google/dedede/variants/wheelie/memory/Makefile.inc b/src/mainboard/google/dedede/variants/wheelie/memory/Makefile.inc index add0919..e82241f 100644 --- a/src/mainboard/google/dedede/variants/wheelie/memory/Makefile.inc +++ b/src/mainboard/google/dedede/variants/wheelie/memory/Makefile.inc @@ -3,4 +3,7 @@ MEM_TYPE = lp4x SPD_SOURCES = -SPD_SOURCES += spd-8.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:F +SPD_SOURCES += spd-8.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E +SPD_SOURCES += spd-3.hex # ID = 1(0b0001) Parts = K4U6E3S4AA-MGCR +SPD_SOURCES += spd-1.hex # ID = 2(0b0010) Parts = H9HCNNNBKMMLXR-NEE +SPD_SOURCES += spd-9.hex # ID = 3(0b0011) Parts = NT6AP256T32AV-J2 diff --git a/src/mainboard/google/dedede/variants/wheelie/memory/dram_id.generated.txt b/src/mainboard/google/dedede/variants/wheelie/memory/dram_id.generated.txt index 93934ae..a856e26 100644 --- a/src/mainboard/google/dedede/variants/wheelie/memory/dram_id.generated.txt +++ b/src/mainboard/google/dedede/variants/wheelie/memory/dram_id.generated.txt @@ -1,2 +1,5 @@ DRAM Part Name ID to assign -MT53E512M32D2NP-046 WT:F 0 (0000) +MT53E512M32D2NP-046 WT:E 0 (0000) +K4U6E3S4AA-MGCR 1 (0001) +H9HCNNNBKMMLXR-NEE 2 (0010) +NT6AP256T32AV-J2 3 (0011) diff --git a/src/mainboard/google/dedede/variants/wheelie/memory/mem_list_variant.txt b/src/mainboard/google/dedede/variants/wheelie/memory/mem_list_variant.txt index 08daad4..2dc3706 100644 --- a/src/mainboard/google/dedede/variants/wheelie/memory/mem_list_variant.txt +++ b/src/mainboard/google/dedede/variants/wheelie/memory/mem_list_variant.txt @@ -1,2 +1,4 @@ -MT53E512M32D2NP-046 WT:F +MT53E512M32D2NP-046 WT:E +K4U6E3S4AA-MGCR +H9HCNNNBKMMLXR-NEE NT6AP256T32AV-J2 -- To view, visit https://review.coreboot.org/c/coreboot/+/41990 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I53f6f5c832cd40068a6d4379ace849f6e8ad7a91 Gerrit-Change-Number: 41990 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: newchange

3 3

Change in coreboot[master]: mb/google/volteer: Switch to using auto-generated SPDs
by Furquan Shaikh (Code Review) 06 Jun '20

06 Jun '20

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41618 ) Change subject: mb/google/volteer: Switch to using auto-generated SPDs ...................................................................... mb/google/volteer: Switch to using auto-generated SPDs This change switches volteer and family to using auto-generated SPDs obtained using gen_spd.go and gen_part_id.go. BUG=b:147321551,b:155423877 Change-Id: I9ed48f0b51714b072a0459d0b70b5417a49db54f Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- M src/mainboard/google/volteer/Makefile.inc M src/mainboard/google/volteer/spd/Makefile.inc 2 files changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/41618/1 diff --git a/src/mainboard/google/volteer/Makefile.inc b/src/mainboard/google/volteer/Makefile.inc index c7e1dae..dbaa0c0 100644 --- a/src/mainboard/google/volteer/Makefile.inc +++ b/src/mainboard/google/volteer/Makefile.inc @@ -19,7 +19,7 @@ VARIANT_DIR:=$(call strip_quotes,$(CONFIG_VARIANT_DIR)) subdirs-y += variants/$(VARIANT_DIR) -subdirs-y += variants/$(VARIANT_DIR)/spd +subdirs-y += variants/$(VARIANT_DIR)/memory CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include subdirs-y += spd diff --git a/src/mainboard/google/volteer/spd/Makefile.inc b/src/mainboard/google/volteer/spd/Makefile.inc index 5891b6d..eafcafa 100644 --- a/src/mainboard/google/volteer/spd/Makefile.inc +++ b/src/mainboard/google/volteer/spd/Makefile.inc @@ -4,7 +4,7 @@ ifneq ($(SPD_SOURCES),) SPD_BIN = $(obj)/spd.bin -SPD_DEPS := $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/spd/$(f).spd.hex) +SPD_DEPS := $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/spd/$(f)) # Include spd ROM data $(SPD_BIN): $(SPD_DEPS) -- To view, visit https://review.coreboot.org/c/coreboot/+/41618 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ed48f0b51714b072a0459d0b70b5417a49db54f Gerrit-Change-Number: 41618 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: newchange

5 12

Change in coreboot[master]: usb/xhci: Fix timeout logic
by Patrick Georgi (Code Review) 06 Jun '20

06 Jun '20

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/41854 ) Change subject: usb/xhci: Fix timeout logic ...................................................................... usb/xhci: Fix timeout logic This fixes a logic bug in how timeouts are reported back. In the timeout case, the original code would return -1 instead of 0. All call sites expect a return value of 0 as the timeout indicator. Signed-off-by: Caveh Jalali <caveh(a)chromium.org> Change-Id: I81a888aa0a1544e55e6a680be8f3b7f6e0d87812 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41854 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> --- M payloads/libpayload/drivers/usb/xhci.c 1 file changed, 6 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved diff --git a/payloads/libpayload/drivers/usb/xhci.c b/payloads/libpayload/drivers/usb/xhci.c index 07d5b16..749ff0a 100644 --- a/payloads/libpayload/drivers/usb/xhci.c +++ b/payloads/libpayload/drivers/usb/xhci.c @@ -129,7 +129,12 @@ static long xhci_handshake(volatile u32 *const reg, u32 mask, u32 wait_for, long timeout_us) { - while ((*reg & mask) != wait_for && timeout_us--) udelay(1); + if (timeout_us <= 0) + return 0; + while ((*reg & mask) != wait_for && timeout_us != 0) { + --timeout_us; + udelay(1); + } return timeout_us; } -- To view, visit https://review.coreboot.org/c/coreboot/+/41854 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I81a888aa0a1544e55e6a680be8f3b7f6e0d87812 Gerrit-Change-Number: 41854 Gerrit-PatchSet: 3 Gerrit-Owner: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: merged

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit June 2020