Felix Singer has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/48293 )
Change subject: mb/prodrive/hermes: Wrap UART driver by PCI device
......................................................................
Abandoned
See CB:48385
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Gerrit-Change-Id: I298247276ec95b2f599f1fcd399550a51b63aff1
Gerrit-Change-Number: 48293
Gerrit-PatchSet: 5
Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net>
Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com>
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Gerrit-MessageType: abandon
Hello Felix Singer, build bot (Jenkins), Nico Huber, Furquan Shaikh, Tim Wawrzynczak, Paul Menzel, Duncan Laurie, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/48385
to look at the new patch set (#3).
Change subject: soc/intel/common/block/uart: rework to use dummy device
......................................................................
soc/intel/common/block/uart: rework to use dummy device
This change reorganizes the uart chip driver to use a dummy device
instead of wrapping the actual UART controller by the chip. This is done
to make the organization of the UART PCI device in the devicetree
consistent with all the other internal PCI devices of the SoC i.e.
without a chip around the PCI device.
Thus, with this change, UART entry in devicetrees can be changed from:
```
chip soc/intel/common/block/uart
device pci xx.y hidden
register "devid" = "PCI_DEVICE_ID_INTEL_XXX_UART2"
end # UART #2, in ACPI mode
```
to:
```
device pci xx.y hidden
chip soc/intel/common/block/uart
register "devid" = "PCI_DEVICE_ID_INTEL_XXX_UART2"
device generic 0 on end # Dummy UART device
end
end # UART #2, in ACPI mode
```
This change also corrects the devicetree of the only board currently
using this driver, prodrive/hermes.
Change-Id: Ic9c9398829b52e6b0523504b862aae9aff559bc7
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
---
M src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb
M src/soc/intel/common/block/uart/uart.c
2 files changed, 38 insertions(+), 21 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/48385/3
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Gerrit-Change-Number: 48385
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Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net>
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Gerrit-MessageType: newpatchset
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48385 )
Change subject: soc/intel/common/block/uart: rework to use dummy device
......................................................................
Patch Set 2:
This change is ready for review.
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Gerrit-Comment-Date: Tue, 08 Dec 2020 21:20:08 +0000
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48396 )
Change subject: soc/intel/cannonlake: Restore alphabetical order of Kconfig selects
......................................................................
Patch Set 4: Code-Review+2
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Gerrit-Change-Id: I5fa1e7216f3e80de0da5a58b84f221af321e4753
Gerrit-Change-Number: 48396
Gerrit-PatchSet: 4
Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net>
Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de>
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Gerrit-Comment-Date: Tue, 08 Dec 2020 21:10:19 +0000
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Hello build bot (Jenkins), Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/48396
to look at the new patch set (#4).
Change subject: soc/intel/cannonlake: Restore alphabetical order of Kconfig selects
......................................................................
soc/intel/cannonlake: Restore alphabetical order of Kconfig selects
Built clevo/l140cu with BUILD_TIMELESS=1, coreboot.rom remains
identical.
Change-Id: I5fa1e7216f3e80de0da5a58b84f221af321e4753
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/soc/intel/cannonlake/Kconfig
1 file changed, 11 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/48396/4
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Gerrit-Change-Id: I5fa1e7216f3e80de0da5a58b84f221af321e4753
Gerrit-Change-Number: 48396
Gerrit-PatchSet: 4
Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net>
Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-MessageType: newpatchset
Hello build bot (Jenkins), Matt DeVillier, Jeremy Soller, Michael Niewöhner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/48391
to look at the new patch set (#4).
Change subject: mb/*: Remove SATA mode config for CNL based mainboards
......................................................................
mb/*: Remove SATA mode config for CNL based mainboards
SATA_AHCI is already the default mode for CNL based mainboards.
Therefore, remove its configuration from all related devicetrees.
Built clevo/l140cu with BUILD_TIMELESS=1, coreboot.rom remains
identical.
Change-Id: I814e191243224a4b021cd7d4c1b611316f1fd1a4
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb
M src/mainboard/google/hatch/variants/baseboard/devicetree.cb
M src/mainboard/google/sarien/variants/arcada/devicetree.cb
M src/mainboard/google/sarien/variants/sarien/devicetree.cb
M src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb
M src/mainboard/system76/lemp9/devicetree.cb
6 files changed, 0 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/48391/4
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