Frank Chu has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/48194 )
Change subject: mb/google/volteer: Improve Port 1 USB2 Eye Diagram for delbin
......................................................................
mb/google/volteer: Improve Port 1 USB2 Eye Diagram for delbin
In order to pass DB type-C USB2 eye diagram, DB USB2 PHY register needs
to be overridden.
port#1
PortUsb20Enable=1
Usb2PhyPetxiset=3
Usb2PhyTxiset=2
Usb2PhyPredeemp=7
Usb2PhyPehalfbit=1
BUG=b:173676539
BRANCH=None
TEST=emerge-volteer coreboot chromeos-bootimage
Signed-off-by: FrankChu <frank_chu(a)pegatron.corp-partner.google.com>
Change-Id: I41cda27f97287fae5c23dc9843fdf0a8a33057f8
---
M src/mainboard/google/volteer/variants/delbin/overridetree.cb
1 file changed, 8 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/48194/2
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Gerrit-Change-Number: 48194
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Paul Fagerburg has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48129 )
Change subject: util/mb/google/puff: remove HECI from overridetree
......................................................................
util/mb/google/puff: remove HECI from overridetree
The template for overridetree.cb includes HeciEnabled, which has
been removed from the CNL config struct, so remove it from the
overridetree.
BUG=b:174360951
TEST=`new_variant_fulltest.sh puff` succeeds
Change-Id: I87f67c53cc75d9ddd40b4960739180a95de6ecd6
---
M util/mainboard/google/puff/template/overridetree.cb
1 file changed, 0 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/48129/1
diff --git a/util/mainboard/google/puff/template/overridetree.cb b/util/mainboard/google/puff/template/overridetree.cb
index adb00e4..a30dad0 100644
--- a/util/mainboard/google/puff/template/overridetree.cb
+++ b/util/mainboard/google/puff/template/overridetree.cb
@@ -1,7 +1,4 @@
chip soc/intel/cannonlake
- # Enable heci communication
- register "HeciEnabled" = "1"
-
# Auto-switch between X4 NVMe and X2 NVMe.
register "TetonGlacierMode" = "1"
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Julius Werner has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/25643 )
Change subject: cheza: Fix SPI clocking and pinmuxing
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Change subject: cheza: Additional configs for SPI boot
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Change subject: cheza: Use -a flag in qgpt.py.
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Change subject: util/qualcomm: Add updated qgpt.py script.
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Change subject: Revert "arch/arm64/armv8/mmu: Add support for 48bit VA"
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