coreboot-gerrit November 2020

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Change in coreboot[master]: util/futility: Don't refresh the binary all the time
by Patrick Georgi (Code Review) 11 Nov '20

11 Nov '20

Patrick Georgi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47453 ) Change subject: util/futility: Don't refresh the binary all the time ...................................................................... util/futility: Don't refresh the binary all the time Due to the phony dependency to check for openssl, vboot-futility was always rebuilt, and because it was newer than coreboot-futility, it was always copied over. Do that in parallel often enough and you run into race conditions, as we did on our builders. Mark check-openssl-presence as order-only dependency so that it's executed (and can bail out) but doesn't force regeneration of vboot-futility. Change-Id: Ib7fb798096d423d6b6cba5d199e12fe5917c3b41 Signed-off-by: Patrick Georgi <pgeorgi(a)google.com> --- M util/futility/Makefile.inc 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/47453/1 diff --git a/util/futility/Makefile.inc b/util/futility/Makefile.inc index ed185ce..9890339 100644 --- a/util/futility/Makefile.inc +++ b/util/futility/Makefile.inc @@ -4,7 +4,7 @@ HOSTPKGCONFIG ?= pkg-config -$(VBOOT_FUTILITY): check-openssl-presence +$(VBOOT_FUTILITY): | check-openssl-presence @printf " MAKE $(subst $(objutil)/,,$(@))\n" unset CFLAGS LDFLAGS; $(MAKE) -C $(VBOOT_SOURCE) \ BUILD=$(VBOOT_HOST_BUILD) \ -- To view, visit https://review.coreboot.org/c/coreboot/+/47453 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib7fb798096d423d6b6cba5d199e12fe5917c3b41 Gerrit-Change-Number: 47453 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: FSP 2.0: Add fsp_relax_security
by Michael Niewöhner (Code Review) 11 Nov '20

11 Nov '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/25437 ) Change subject: FSP 2.0: Add fsp_relax_security ...................................................................... Patch Set 20: (1 comment) https://review.coreboot.org/c/coreboot/+/25437/18/src/drivers/intel/fsp2_0/… File src/drivers/intel/fsp2_0/notify.c: https://review.coreboot.org/c/coreboot/+/25437/18/src/drivers/intel/fsp2_0/… PS18, Line 70: __attribute__((weak)) bool fsp_relax_security(void) > Huh? Tbh I'm not sure how that would be used, anyway. […] Ah, I missed the bmcInfo patch and I don't know bmcInfo, yet \o/ Soo... just that I get that right... is the plan to set that mode via BMC? -- To view, visit https://review.coreboot.org/c/coreboot/+/25437 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I972e7387c2612ee0053df21afb55b0b264961174 Gerrit-Change-Number: 25437 Gerrit-PatchSet: 20 Gerrit-Owner: Julien Viard de Galbert <coreboot-review-ju(a)vdg.name> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: David Guckian <d.guckian20(a)gmail.com> Gerrit-Reviewer: Julien Viard de Galbert <coreboot-review-ju(a)vdg.name> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Aaron Durbin <adurbin(a)chromium.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-CC: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Comment-Date: Wed, 11 Nov 2020 17:09:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julien Viard de Galbert <coreboot-review-ju(a)vdg.name> Comment-In-Reply-To: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: comment

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Change in coreboot[master]: FSP 2.0: Add fsp_relax_security
by Michael Niewöhner (Code Review) 11 Nov '20

11 Nov '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/25437 ) Change subject: FSP 2.0: Add fsp_relax_security ...................................................................... Patch Set 20: (1 comment) https://review.coreboot.org/c/coreboot/+/25437/18/src/drivers/intel/fsp2_0/… File src/drivers/intel/fsp2_0/notify.c: https://review.coreboot.org/c/coreboot/+/25437/18/src/drivers/intel/fsp2_0/… PS18, Line 70: __attribute__((weak)) bool fsp_relax_security(void) > Well the purpose was to set it at runtime, not compile time ;) Huh? Tbh I'm not sure how that would be used, anyway. However, I wonder if we want to always add debug/testing functionality, even in production images. "Relax security" doesn't sound like something that should be always there. When using CHIPSET_LOCKDOWN_COREBOOT, wouldn't that be the same (setting it at build time)? -- To view, visit https://review.coreboot.org/c/coreboot/+/25437 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I972e7387c2612ee0053df21afb55b0b264961174 Gerrit-Change-Number: 25437 Gerrit-PatchSet: 20 Gerrit-Owner: Julien Viard de Galbert <coreboot-review-ju(a)vdg.name> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: David Guckian <d.guckian20(a)gmail.com> Gerrit-Reviewer: Julien Viard de Galbert <coreboot-review-ju(a)vdg.name> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Aaron Durbin <adurbin(a)chromium.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-CC: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Comment-Date: Wed, 11 Nov 2020 17:06:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julien Viard de Galbert <coreboot-review-ju(a)vdg.name> Comment-In-Reply-To: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: comment

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Change in coreboot[master]: libpayload/usb: Add format string checking to usb_debug
by Tim Wawrzynczak (Code Review) 11 Nov '20

11 Nov '20

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45025 ) Change subject: libpayload/usb: Add format string checking to usb_debug ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/45025 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic94ebcbafdde8a5f79278b5635111b99af40f892 Gerrit-Change-Number: 45025 Gerrit-PatchSet: 2 Gerrit-Owner: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 11 Nov 2020 16:28:15 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: libpayload/usb: Fix printf format string mismatches in debug messages
by Tim Wawrzynczak (Code Review) 11 Nov '20

11 Nov '20

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45024 ) Change subject: libpayload/usb: Fix printf format string mismatches in debug messages ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/c/coreboot/+/45024/2/payloads/libpayload/driver… File payloads/libpayload/drivers/usb/usb.c: PS2: Does `#include <inttypes.h>` help? Maybe ARM isn't implicitly including it, but you should be adding the include anyway. -- To view, visit https://review.coreboot.org/c/coreboot/+/45024 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4dc70baefb3cd82fcc915cc2e7f68719cf6870cc Gerrit-Change-Number: 45024 Gerrit-PatchSet: 2 Gerrit-Owner: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 11 Nov 2020 16:23:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/asrock/h110m: add libgfxinit support
by Angel Pons (Code Review) 11 Nov '20

11 Nov '20

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39104 ) Change subject: mb/asrock/h110m: add libgfxinit support ...................................................................... Patch Set 15: (1 comment) https://review.coreboot.org/c/coreboot/+/39104/10//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/39104/10//COMMIT_MSG@7 PS10, Line 7: mb/asrock/h110m: add libgfxinit support > Unfortunately VGA works on Windows only. Uh, libgfxinit doesn't care about the OS (in fact, it never interacts with the OS). Does VGA light up with libgfxinit *before* an OS takes over? Also, does VGA work on linux with vendor firmware? -- To view, visit https://review.coreboot.org/c/coreboot/+/39104 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4d87413f87d00986111ecb7b046423ff5eac1bf1 Gerrit-Change-Number: 39104 Gerrit-PatchSet: 15 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 11 Nov 2020 16:21:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Maxim Polyakov <max.senia.poliak(a)gmail.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: [RFC] Add new board configuration entry to coreboot tables
by Tim Wawrzynczak (Code Review) 11 Nov '20

11 Nov '20

Tim Wawrzynczak has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46605 ) Change subject: [RFC] Add new board configuration entry to coreboot tables ...................................................................... [RFC] Add new board configuration entry to coreboot tables The new entry is intended to be the configuration entry to rule them all, possibly deprecating the three separate "strapping ID" tables with which it is slightly redundant with. In one entry, it should provide enough information to give firmware the information it needs at runtime to make decisions based on what kind of board it is or what is attached to it, all in one place. The new entry contains: - Board ID - DRAM ID (RAM code) - SKU ID - FW Config Signed-off-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Change-Id: I1ecec847ee77b72233587c1ad7f124e2027470bf --- M payloads/libpayload/include/coreboot_tables.h M src/commonlib/include/commonlib/coreboot_tables.h M src/include/fw_config.h M src/lib/coreboot_table.c 4 files changed, 59 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/46605/1 diff --git a/payloads/libpayload/include/coreboot_tables.h b/payloads/libpayload/include/coreboot_tables.h index bf8c0d9..fc10031 100644 --- a/payloads/libpayload/include/coreboot_tables.h +++ b/payloads/libpayload/include/coreboot_tables.h @@ -79,6 +79,7 @@ CB_TAG_MMC_INFO = 0x0035, CB_TAG_TCPA_LOG = 0x0036, CB_TAG_FMAP = 0x0037, + CB_TAG_BOARD_CONFIG = 0x0039, CB_TAG_CMOS_OPTION_TABLE = 0x00c8, CB_TAG_OPTION = 0x00c9, CB_TAG_OPTION_ENUM = 0x00ca, @@ -316,6 +317,16 @@ int32_t early_cmd1_status; }; +struct cb_board_config { + uint32_t tag; + uint32_t size; + + struct cbuint64 fw_config; + uint32_t board_id; + uint32_t dram_id; + uint32_t sku_id; +}; + #define CB_MAX_SERIALNO_LENGTH 32 struct cb_cmos_option_table { diff --git a/src/commonlib/include/commonlib/coreboot_tables.h b/src/commonlib/include/commonlib/coreboot_tables.h index 6393c01..4fb7318 100644 --- a/src/commonlib/include/commonlib/coreboot_tables.h +++ b/src/commonlib/include/commonlib/coreboot_tables.h @@ -80,6 +80,8 @@ LB_TAG_TCPA_LOG = 0x0036, LB_TAG_FMAP = 0x0037, LB_TAG_PLATFORM_BLOB_VERSION = 0x0038, + LB_TAG_BOARD_CONFIG = 0x0039, + /* The following options are CMOS-related */ LB_TAG_CMOS_OPTION_TABLE = 0x00c8, LB_TAG_OPTION = 0x00c9, LB_TAG_OPTION_ENUM = 0x00ca, @@ -415,6 +417,16 @@ struct mac_address mac_addrs[0]; }; +struct lb_board_config { + uint32_t tag; + uint32_t size; + + struct lb_uint64 fw_config; + uint32_t board_id; + uint32_t dram_id; + uint32_t sku_id; +}; + #define MAX_SERIALNO_LENGTH 32 /* The following structures are for the CMOS definitions table */ diff --git a/src/include/fw_config.h b/src/include/fw_config.h index c9ef75f..7eaad7d 100644 --- a/src/include/fw_config.h +++ b/src/include/fw_config.h @@ -8,6 +8,8 @@ #include <stdbool.h> #include <stdint.h> +#define DEFAULT_FW_CONFIG (uint64_t)0 + /** * struct fw_config - Firmware configuration field and option. * @field_name: Name of the field that this option belongs to. diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index 9148405..82b718a 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -1,22 +1,23 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <arch/cbconfig.h> -#include <console/console.h> -#include <console/uart.h> -#include <ip_checksum.h> +#include <boardid.h> #include <boot/coreboot_tables.h> #include <boot/tables.h> #include <boot_device.h> -#include <string.h> -#include <version.h> -#include <boardid.h> -#include <device/device.h> -#include <fmap.h> -#include <stdlib.h> -#include <cbfs.h> -#include <cbmem.h> #include <bootmem.h> #include <bootsplash.h> +#include <cbfs.h> +#include <cbmem.h> +#include <console/console.h> +#include <console/uart.h> +#include <device/device.h> +#include <fmap.h> +#include <fw_config.h> +#include <ip_checksum.h> +#include <stdlib.h> +#include <string.h> +#include <version.h> #include <spi_flash.h> #include <security/vboot/misc.h> #include <security/vboot/vbnv_layout.h> @@ -211,6 +212,7 @@ __weak uint32_t board_id(void) { return UNDEFINED_STRAPPING_ID; } __weak uint32_t ram_code(void) { return UNDEFINED_STRAPPING_ID; } __weak uint32_t sku_id(void) { return UNDEFINED_STRAPPING_ID; } +__weak uint64_t fw_config_get(void) { return DEFAULT_FW_CONFIG; } static void lb_board_id(struct lb_header *header) { @@ -368,6 +370,24 @@ return mainboard; } +static struct lb_board_config *lb_board_config(struct lb_header *header) +{ + struct lb_record *rec; + struct lb_board_config *config; + rec = lb_new_record(header); + config = (struct lb_board_config *)rec; + + config->tag = LB_TAG_BOARD_CONFIG; + config->size = sizeof(*config); + + config->board_id = board_id(); + config->dram_id = ram_code(); + config->sku_id = sku_id(); + config->fw_config = pack_lb64(fw_config_get()); + + return config; +} + #if CONFIG(USE_OPTION_TABLE) static struct cmos_checksum *lb_cmos_checksum(struct lb_header *header) { @@ -557,6 +577,9 @@ lb_boot_media_params(head); + /* Board configuration information */ + lb_board_config(head); + /* Add architecture records. */ lb_arch_add_records(head); -- To view, visit https://review.coreboot.org/c/coreboot/+/46605 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1ecec847ee77b72233587c1ad7f124e2027470bf Gerrit-Change-Number: 46605 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/asrock/h110m: add libgfxinit support
by Maxim Polyakov (Code Review) 11 Nov '20

11 Nov '20

Maxim Polyakov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39104 ) Change subject: mb/asrock/h110m: add libgfxinit support ...................................................................... Patch Set 15: (3 comments) https://review.coreboot.org/c/coreboot/+/39104/10//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/39104/10//COMMIT_MSG@7 PS10, Line 7: mb/asrock/h110m: add libgfxinit support > You can add `DP2, HDMI2, Internal` (the latter will be `eDP` in the future) […] Unfortunately VGA works on Windows only. https://review.coreboot.org/c/coreboot/+/39104/13//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/39104/13//COMMIT_MSG@14 PS13, Line 14: - EDP_TXN[2] -> EDP_VGA_TX0# : - EDP_TXN[3] -> EDP_VGA_TX1# : - EDP_TXP[2] -> EDP_VGA_TX0 : - EDP_TXP[2] -> EDP_VGA_TX1 > Where does this come from? boardview https://review.coreboot.org/c/coreboot/+/39104/13/src/mainboard/asrock/h110… File src/mainboard/asrock/h110m/gma-mainboard.ads: https://review.coreboot.org/c/coreboot/+/39104/13/src/mainboard/asrock/h110… PS13, Line 12: (DP2, -- DVI (DDI2) : HDMI3, -- HDMI (DDI3) : eDP, -- eDP->VGA (PTN3356R1BS) : others => Disabled); > On SKL/KBL-S there are three DDIs plus one eDP port. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/39104 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4d87413f87d00986111ecb7b046423ff5eac1bf1 Gerrit-Change-Number: 39104 Gerrit-PatchSet: 15 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 11 Nov 2020 15:26:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Maxim Polyakov <max.senia.poliak(a)gmail.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: FSP 2.0: Add fsp_relax_security
by Julien Viard de Galbert (Code Review) 11 Nov '20

11 Nov '20

Julien Viard de Galbert has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/25437 ) Change subject: FSP 2.0: Add fsp_relax_security ...................................................................... Patch Set 20: (2 comments) Thanks for the hint, I'll use CHIPSET_LOCKDOWN_{FSP,COREBOOT} on the next update of this patch. https://review.coreboot.org/c/coreboot/+/25437/18/src/drivers/intel/fsp2_0/… File src/drivers/intel/fsp2_0/notify.c: https://review.coreboot.org/c/coreboot/+/25437/18/src/drivers/intel/fsp2_0/… PS18, Line 70: __attribute__((weak)) bool fsp_relax_security(void) > instead of *another* callback, why not have a Kconfig? Well the purpose was to set it at runtime, not compile time ;) https://review.coreboot.org/c/coreboot/+/25437/18/src/drivers/intel/fsp2_0/… PS18, Line 70: fsp_relax_security > Maybe rename this to sound less like an action? E. g. […] Right I missed the introduction of CHIPSET_LOCKDOWN_COREBOOT, I can certainly rewrite it using that. Will do. -- To view, visit https://review.coreboot.org/c/coreboot/+/25437 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I972e7387c2612ee0053df21afb55b0b264961174 Gerrit-Change-Number: 25437 Gerrit-PatchSet: 20 Gerrit-Owner: Julien Viard de Galbert <coreboot-review-ju(a)vdg.name> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: David Guckian <d.guckian20(a)gmail.com> Gerrit-Reviewer: Julien Viard de Galbert <coreboot-review-ju(a)vdg.name> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Aaron Durbin <adurbin(a)chromium.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-CC: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Comment-Date: Wed, 11 Nov 2020 15:19:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/asrock/h110m: add libgfxinit support
by Maxim Polyakov (Code Review) 11 Nov '20

11 Nov '20

Hello build bot (Jenkins), Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/39104 to look at the new patch set (#15). Change subject: mb/asrock/h110m: add libgfxinit support ...................................................................... mb/asrock/h110m: add libgfxinit support Add libgfxinit support for Asrock H110M-DVS-R2 [1]. - DVI (DDI2); - HDMI (DDI3); - VGA (eDP), PTN3356R1BS, DisplayPort to VGA adapter [2]. VGA works with Windows 10 only. [1] https://www.2by2.be/images/photolib/604201.jpg [2] https://www.nxp.com/docs/en/data-sheet/PTN3356R1.pdf Change-Id: I4d87413f87d00986111ecb7b046423ff5eac1bf1 Signed-off-by: Maxim Polyakov <max.senia.poliak(a)gmail.com> --- M src/mainboard/asrock/h110m/Kconfig M src/mainboard/asrock/h110m/gma-mainboard.ads 2 files changed, 4 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/39104/15 -- To view, visit https://review.coreboot.org/c/coreboot/+/39104 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4d87413f87d00986111ecb7b046423ff5eac1bf1 Gerrit-Change-Number: 39104 Gerrit-PatchSet: 15 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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coreboot-gerrit November 2020