Change in coreboot[master]: mb/*/*/acpi: Convert superio.asl to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 08 Oct '20
by HAOUAS Elyes (Code Review) 08 Oct '20
08 Oct '20
HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46026 )
Change subject: mb/*/*/acpi: Convert superio.asl to ASL 2.0 syntax
......................................................................
mb/*/*/acpi: Convert superio.asl to ASL 2.0 syntax
Change-Id: I836b65bbfa281f95a7b15136116ce3bd62f01b82
Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr>
---
M src/mainboard/aopen/dxplplusu/acpi/superio.asl
M src/mainboard/biostar/am1ml/acpi/superio.asl
M src/mainboard/roda/rk9/acpi/superio.asl
3 files changed, 158 insertions(+), 158 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/46026/1
diff --git a/src/mainboard/aopen/dxplplusu/acpi/superio.asl b/src/mainboard/aopen/dxplplusu/acpi/superio.asl
index 9889032..2a72e8f 100644
--- a/src/mainboard/aopen/dxplplusu/acpi/superio.asl
+++ b/src/mainboard/aopen/dxplplusu/acpi/superio.asl
@@ -58,11 +58,11 @@
Method (ECFG, 0, NotSerialized)
{
- Store (0x55, INDX)
+ INDX = 0x55
}
Method (XCFG, 0, NotSerialized)
{
- Store (0xAA, INDX)
+ INDX = 0xaa
}
Method (_CRS, 0, NotSerialized)
@@ -72,16 +72,16 @@
CreateByteField (MSBF, \_SB.PCI0.ICH0.SMSC._Y1B._LEN, IOML)
ECFG ()
- Store (0x0A, \_SB.PCI0.ICH0.SMSC.LDN)
- Store (0x00, IOM1)
- Store (0x00, IOM2)
- Or (\_SB.PCI0.ICH0.SMSC.IOAH, IOM1, IOM1)
- ShiftLeft (IOM1, 0x08, IOM1)
- Or (\_SB.PCI0.ICH0.SMSC.IOAL, IOM1, IOM1)
- Store (IOM1, IOM2)
- If (LNotEqual (IOM1, 0x00))
+ \_SB.PCI0.ICH0.SMSC.LDN = 0x0A
+ IOM1 = 0x00
+ IOM2 = 0x00
+ IOM1 |= \_SB.PCI0.ICH0.SMSC.IOAH
+ IOM1 <<= 8
+ IOM1 |= \_SB.PCI0.ICH0.SMSC.IOAL
+ IOM2 = IOM1
+ If (IOM1 != 0x00)
{
- Store (0x80, IOML)
+ IOML = 0x80
}
XCFG ()
@@ -92,70 +92,70 @@
Method (_INI, 0, NotSerialized)
{
/* GPIO configuration */
- Store (0x00, GC10)
- Store (0x81, GC11)
- Store (0x00, GC17)
- Store (0x0c, GC21)
- Store (0x00, GC22)
- Store (0x04, GC27)
- Store (0x04, GC30)
- Store (0x01, GC31)
- Store (0x01, GC32)
- Store (0x01, GC33)
- Store (0x01, GC34) /* GPI password jumper */
- Store (0x01, GC35) /* GPI scsi enable jumper */
- Store (0x01, GC42) /* GPI */
- Store (0x86, GC60) /* led 1 */
- Store (0x81, GC61) /* led 2 ?? */
+ GC10 = 0x00
+ GC11 = 0x81
+ GC17 = 0x00
+ GC21 = 0x0c
+ GC22 = 0x00
+ GC27 = 0x04
+ GC30 = 0x04
+ GC31 = 0x01
+ GC32 = 0x01
+ GC33 = 0x01
+ GC34 = 0x01 /* GPI password jumper */
+ GC35 = 0x01 /* GPI scsi enable jumper */
+ GC42 = 0x01 /* GPI */
+ GC60 = 0x86 /* led 1 */
+ GC61 = 0x81 /* led 2 ?? */
/* GPIO initial output levels */
- Store (GP_1, Local0)
- And( Local0, 0x7C, Local0)
- Or ( Local0, 0x81, Local0)
- Store (Local0, GP_1)
+ Local0 = GP_1
+ Local0 &= 0x7C
+ Local0 |= 0x81
+ GP_1 = Local0
- Store (GP_2, Local0)
- And( Local0, 0xFE, Local0)
- Or ( Local0, 0x00, Local0)
- Store (Local0, GP_2)
+ Local0 = GP_2
+ Local0 &= 0xFE
+ Local0 |= 0x00
+ GP_2 = Local0
- Store (GP_3, Local0)
- And( Local0, 0x7F, Local0)
- Or ( Local0, 0x80, Local0)
- Store (Local0, GP_3)
+ Local0 = GP_3
+ Local0 &= 0x7F
+ Local0 |= 0x80
+ GP_3 = Local0
- Store (GP_4, Local0)
- And( Local0, 0x7F, Local0)
- Or ( Local0, 0x00, Local0)
- Store (Local0, GP_4)
+ Local0 = GP_4
+ Local0 &= 0x7F
+ Local0 |= 0x00
+ GP_4 = Local0
/* Power Led */
- Store (LED1, Local0)
- And( Local0, 0xfc, Local0)
- Or ( Local0, 0x01, Local0)
- Store (Local0, LED1)
+ Local0 = LED1
+ Local0 &= 0xfc
+ Local0 |= 0x01
+ LED1 = Local0
}
Method (MLED, 1, NotSerialized)
{
- If (LEqual (Arg0, 0x00))
+ If (Arg0 == 0x00)
{
- Store (0x00, LED1)
+ LED1 = 0x00
}
- If (LOr (LEqual (Arg0, 0x01), LEqual (Arg0, 0x02)))
+ If ((Arg0 == 0x01) || (Arg0 == 0x02))
{
- Store (0x01, LED1)
+ LED1 = 0x01
}
- If (LEqual (Arg0, 0x03))
+ If (Arg0 == 0x03)
{
- Store (0x02, LED1)
+ LED1 = 0x02
}
- If (LOr (LEqual (Arg0, 0x04), LEqual (Arg0, 0x05)))
+ If ((Arg0 == 0x04) || (Arg0 == 0x05))
{
- Store (0x03, LED1)
+ LED1 = 0x03
}
}
diff --git a/src/mainboard/biostar/am1ml/acpi/superio.asl b/src/mainboard/biostar/am1ml/acpi/superio.asl
index a4eda2b..03683b3 100644
--- a/src/mainboard/biostar/am1ml/acpi/superio.asl
+++ b/src/mainboard/biostar/am1ml/acpi/superio.asl
@@ -12,8 +12,8 @@
IRQNoFlags () {12}
})
Method (_STA, 0, NotSerialized) {
- And (FLG0, 0x04, Local0)
- If (LEqual (Local0, 0x04)) {
+ Local0 = FLG0 & 0x04
+ If (Local0 == 0x04) {
Return (0x0F)
} Else {
Return (0x00)
@@ -24,8 +24,8 @@
Device (PS2K) {
Name (_HID, EisaId ("PNP0303"))
Method (_STA, 0, NotSerialized) {
- And (FLG0, 0x04, Local0)
- If (LEqual (Local0, 0x04)) {
+ Local0 = FLG0 & 0x04
+ If (Local0 == 0x04) {
Return (0x0F)
} Else {
Return (0x00)
@@ -42,8 +42,8 @@
Name (_HID, EISAID ("PNP0501"))
Name (_UID, 1)
Method (_STA, 0, NotSerialized) {
- And (FLG0, 0x04, Local0)
- If (LEqual (Local0, 0x04)) {
+ Local0 = FLG0 & 0x04
+ If (Local0 == 0x04) {
Return (0x0F)
} Else {
Return (0x00)
@@ -65,8 +65,8 @@
Name (_HID, EISAID ("PNP0400"))
Name (_UID, 1)
Method (_STA, 0, NotSerialized) {
- And (FLG0, 0x04, Local0)
- If (LEqual (Local0, 0x04)) {
+ Local0 = FLG0 & 0x04
+ If (Local0 == 0x04) {
Return (0x0F)
} Else {
Return (0x00)
diff --git a/src/mainboard/roda/rk9/acpi/superio.asl b/src/mainboard/roda/rk9/acpi/superio.asl
index 6f356e9..efca0a1e 100644
--- a/src/mainboard/roda/rk9/acpi/superio.asl
+++ b/src/mainboard/roda/rk9/acpi/superio.asl
@@ -19,13 +19,13 @@
Method (READ, 3)
{
Acquire (SIOM, 0xffff)
- If (LEqual(Arg0, 0)) {
- Store (0x55, INDX)
- Store (Arg1, INDX)
- Store (DATA, Local1)
- Store (0xaa, INDX)
+ If (Arg0 == 0) {
+ INDX = 0x55
+ INDX = Arg1
+ Local1 = DATA
+ INDX = 0xaa
}
- And (Local1, Arg2, Local1)
+ Local1 &= Arg2
Release(SIOM)
Return(Local1)
}
@@ -33,11 +33,11 @@
Method (WRIT, 3)
{
Acquire (SIOM, 0xffff)
- If (LEqual(Arg0, 0)) {
- Store (0x55, INDX)
- Store (Arg1, INDX)
- Store (Arg2, DATA)
- Store (0xaa, INDX)
+ If (Arg0 == 0) {
+ INDX = 0x55
+ INDX = Arg1
+ DATA = Arg2
+ INDX = 0xaa
}
Release(SIOM)
}
@@ -52,18 +52,18 @@
Method (_STA, 0)
{
// Device disabled by coreboot?
- If (LEqual(CMAP, 0)) {
+ If (CMAP == 0) {
Return (0)
}
// Is the hardware enabled?
- Store (READ(0, 0x24, 0xff), Local0)
- If (LEqual(Local0, 0)) {
+ Local0 = READ (0, 0x24, 0xff)
+ If (Local0 == 0) {
Return (0xd)
} Else {
// Power Enabled?
- Store (READ(0, 0x02, 0x08), Local0)
- If (LEqual(Local0, 0)) {
+ Local0 = READ (0, 0x02, 0x08)
+ If (Local0 == 0) {
Return (0x0d)
} Else {
Return (0x0f)
@@ -76,12 +76,12 @@
{
WRIT(0, 0x24, 0x00)
- Store(READ(0, 0x28, 0x0f), Local0)
+ Local0 = READ (0, 0x28, 0x0f)
WRIT(0, 0x28, Local0)
- Store(READ(0, 0x02, 0xff), Local0)
- Not(0x08, Local1)
- And(Local0, Local1, Local0)
+ Local0 = READ(0, 0x02, 0xff)
+ Local1 = 0x08
+ Local0 &= Local1
WRIT(0, 0x02, Local0)
}
@@ -106,8 +106,8 @@
IRQNoFlags(_IRA) { 4 }
})
- And (_STA(), 0x02, Local0)
- If (LEqual(Local0, 0)) {
+ Local0 = _STA() & 0x02
+ If (Local0 == 0) {
Return(NONE)
}
@@ -119,15 +119,15 @@
\_SB.PCI0.LPCB.SIO1.COMA._CRS._IRA._INT, IRQ)
/* I/O Base */
- Store (READ(0, 0x24, 0xfe), Local0)
- ShiftLeft(Local0, 0x02, Local0)
- Store(Local0, IOMN)
- Store(Local0, IOMX)
+ Local0 = READ (0, 0x24, 0xfe)
+ Local0 <<= 2
+ IOMN = Local0
+ IOMX = Local0
/* Interrupt */
- Store(READ(0, 0x28, 0xf0), Local0)
- ShiftRight(Local0, 4, Local0)
- ShiftLeft(1, Local0, IRQ)
+ Local0 = READ (0, 0x28, 0xf0)
+ Local0 >>= 4
+ IRQ = 1 << Local0
Return(RSRC)
}
@@ -140,29 +140,29 @@
WRIT(0, 0x24, 0)
FindSetRightBit(IRQL, Local0)
- Decrement(Local0)
- ShiftLeft(Local0, 4, Local0)
+ Local0--
+ Local0 <<= 4
- Store(READ(0, 0x28, 0x0f), Local1)
- Or(Local0, Local1, Local0)
+ Local1 = READ (0, 0x28, 0x0f)
+ Local0 |= Local1
WRIT(0, 0x28, Local0)
- Store(IOLO, Local0)
- ShiftRight(Local0, 2, Local0)
- And(Local0, 0xfe, Local0)
+ Local0 = IOLO
+ Local0 >>= 2
+ Local0 &= 0xfe
- Store(IOHI, Local1)
- ShiftLeft(Local1, 6, Local1)
- Or (Local0, Local1, Local0)
+ Local1 = IOHI
+ Local1 <<= 6
+ Local0 |= Local1
WRIT(0, 0x24, Local0)
- Store(READ(0, 0x02, 0xff), Local0)
- Or(Local0, 0x08, Local0)
+ Local0 = READ(0, 0x02, 0xff)
+ Local0 |= 0x08
WRIT(0, 0x02, Local0)
- Store(READ(0, 0x07, 0xff), Local0)
- Not(0x40, Local1)
- And (Local0, Local1, Local0)
+ Local0 = READ (0, 0x07, 0xff)
+ Local1 = ~0x40
+ Local0 &= Local1
WRIT(0, 0x07, Local0)
}
@@ -170,22 +170,22 @@
/* D0 state - Line drivers are on */
Method (_PS0, 0)
{
- Store(READ(0, 0x02, 0xff), Local0)
- Or(Local0, 0x08, Local0)
+ Local0 = READ(0, 0x02, 0xff)
+ Local0 |= 0x08
WRIT(0, 0x02, Local0)
- Store (READ(0, 0x07, 0xff), Local0)
- Not(0x40, Local1)
- And(Local0, Local1, Local0)
+ Local0 = READ (0, 0x07, 0xff)
+ Local1 = ~0x40
+ Local0 &= Local1
WRIT(0, 0x07, Local0)
}
/* D3 State - Line drivers are off */
Method(_PS3, 0)
{
- Store(READ(0, 0x02, 0xff), Local0)
- Not(0x08, Local1)
- And(Local0, Local1, Local0)
+ Local0 = READ(0, 0x02, 0xff)
+ Local1 = 0x08
+ Local0 &= Local1
WRIT(0, 0x02, Local0)
}
}
@@ -200,24 +200,24 @@
Method (_STA, 0)
{
// Device disabled by coreboot?
- If (LEqual(CMBP, 0)) {
+ If (CMBP == 0) {
Return (0)
}
/* IRDA? */
- Store(READ(0, 0x0c, 0x38), Local0)
- If (LNotEqual(Local0, Zero)) {
+ Local0 = READ (0, 0x0c, 0x38)
+ If (Local0 != 0) {
Return (0)
}
// Is the hardware enabled?
- Store (READ(0, 0x25, 0xff), Local0)
- If (LEqual(Local0, 0)) {
+ Local0 = READ (0, 0x25, 0xff)
+ If (Local0 == 0) {
Return (0xd)
} Else {
// Power Enabled?
- Store (READ(0, 0x02, 0x80), Local0)
- If (LEqual(Local0, 0)) {
+ Local0 = READ (0, 0x02, 0x80)
+ If (Local0 == 0) {
Return (0x0d)
} Else {
Return (0x0f)
@@ -230,12 +230,12 @@
{
WRIT(0, 0x25, 0x00)
- Store(READ(0, 0x28, 0xf0), Local0)
+ Local0 = READ (0, 0x28, 0xf0)
WRIT(0, 0x28, Local0)
- Store(READ(0, 0x02, 0xff), Local0)
- Not(0x80, Local1)
- And(Local0, Local1, Local0)
+ Local0 = READ(0, 0x02, 0xff)
+ Local1 = ~0x80
+ Local0 &= Local1
WRIT(0, 0x02, Local0)
}
@@ -260,8 +260,8 @@
IRQNoFlags(_IRB) { 3 }
})
- And (_STA(), 0x02, Local0)
- If (LEqual(Local0, 0)) {
+ Local0 = _STA() & 0x02
+ If (Local0 == 0) {
Return(NONE)
}
@@ -273,14 +273,14 @@
\_SB.PCI0.LPCB.SIO1.COMB._CRS._IRB._INT, IRQ)
/* I/O Base */
- Store (READ(0, 0x25, 0xfe), Local0)
- ShiftLeft(Local0, 0x02, Local0)
- Store(Local0, IOMN)
- Store(Local0, IOMX)
+ Local0 = READ (0, 0x25, 0xfe)
+ Local0 <<= 2
+ IOMN = Local0
+ IOMX = Local0
/* Interrupt */
- Store(READ(0, 0x28, 0x0f), Local0)
- ShiftLeft(1, Local0, IRQ)
+ Local0 = READ (0, 0x28, 0x0f)
+ IRQ = 1 << Local0
Return(RSRC)
}
@@ -293,55 +293,55 @@
WRIT(0, 0x25, 0)
FindSetRightBit(IRQL, Local0)
- Decrement(Local0)
+ Local0--
- Store(READ(0, 0x28, 0xf0), Local1)
- Or(Local0, Local1, Local0)
+ Local1 = READ (0, 0x28, 0xf0)
+ Local0 |= Local1
WRIT(0, 0x28, Local0)
- Store(IOLO, Local0)
- ShiftRight(Local0, 2, Local0)
- And(Local0, 0xfe, Local0)
+ Local0 = IOLO
+ Local0 >>= 2
+ Local0 &= 0xfe
- Store(IOHI, Local1)
- ShiftLeft(Local1, 6, Local1)
- Or (Local0, Local1, Local0)
+ Local1 = IOHI
+ Local1 <<= 6
+ Local0 |= Local1
WRIT(0, 0x25, Local0)
- Store(READ(0, 0x0c, 0xff), Local0)
- Not(0x38, Local1)
- And(Local0, Local1, Local0)
+ Local0 = READ (0, 0x0c, 0xff)
+ Local1 = ~0x38
+ Local0 &= Local1
WRIT(0, 0x0c, Local0)
- Store(READ(0, 0x02, 0xff), Local0)
- Or(Local0, 0x80, Local0)
+ Local0 = READ(0, 0x02, 0xff)
+ Local0 |= 0x80
WRIT(0, 0x02, Local0)
- Store(READ(0, 0x07, 0xff), Local0)
- Not(0x20, Local1)
- And (Local0, Local1, Local0)
+ Local0 = READ (0, 0x07, 0xff)
+ Local1 = ~0x20
+ Local0 &= Local1
WRIT(0, 0x07, Local0)
}
/* D0 state - Line drivers are on */
Method (_PS0, 0)
{
- Store(READ(0, 0x02, 0xff), Local0)
- Or(Local0, 0x80, Local0)
+ Local0 = READ(0, 0x02, 0xff)
+ Local0 |= 0x80
WRIT(0, 0x02, Local0)
- Store (READ(0, 0x07, 0xff), Local0)
- Not(0x20, Local1)
- And(Local0, Local1, Local0)
+ Local0 = READ (0, 0x07, 0xff)
+ Local1 = ~0x20
+ Local0 &= Local1
WRIT(0, 0x07, Local0)
}
/* D3 State - Line drivers are off */
Method(_PS3, 0)
{
- Store(READ(0, 0x02, 0xff), Local0)
- Not(0x80, Local1)
- And(Local0, Local1, Local0)
+ Local0 = READ(0, 0x02, 0xff)
+ Local1 = ~0x80
+ Local0 &= Local1
WRIT(0, 0x02, Local0)
}
}
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I836b65bbfa281f95a7b15136116ce3bd62f01b82
Gerrit-Change-Number: 46026
Gerrit-PatchSet: 1
Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr>
Gerrit-MessageType: newchange
2
2
Change in coreboot[master]: mb/*/*/acpi: Convert 'ide.asl' to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 08 Oct '20
by HAOUAS Elyes (Code Review) 08 Oct '20
08 Oct '20
HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46043 )
Change subject: mb/*/*/acpi: Convert 'ide.asl' to ASL 2.0 syntax
......................................................................
mb/*/*/acpi: Convert 'ide.asl' to ASL 2.0 syntax
Also fix typo in comment.
Change-Id: I2d9fbf8a163cff4151f73ea5fb7cdd0fd6eb6e91
Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr>
---
M src/mainboard/amd/inagua/acpi/ide.asl
M src/mainboard/amd/persimmon/acpi/ide.asl
M src/mainboard/amd/south_station/acpi/ide.asl
M src/mainboard/amd/union_station/acpi/ide.asl
M src/mainboard/biostar/am1ml/acpi/ide.asl
M src/mainboard/elmex/pcm205400/acpi/ide.asl
M src/mainboard/gizmosphere/gizmo/acpi/ide.asl
7 files changed, 385 insertions(+), 413 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/46043/1
diff --git a/src/mainboard/amd/inagua/acpi/ide.asl b/src/mainboard/amd/inagua/acpi/ide.asl
index 663b36a..e3a1bec 100644
--- a/src/mainboard/amd/inagua/acpi/ide.asl
+++ b/src/mainboard/amd/inagua/acpi/ide.asl
@@ -50,11 +50,11 @@
Method(GTTM, 1) /* get total time*/
{
- Store(And(Arg0, 0x0F), Local0) /* Recovery Width */
- Increment(Local0)
- Store(ShiftRight(Arg0, 4), Local1) /* Command Width */
- Increment(Local1)
- Return(Multiply(30, Add(Local0, Local1)))
+ Local0 = Arg0 & 0x0F /* Recovery Width */
+ Local0++
+ Local1 = Arg0 >> 4 /* Command Width */
+ Local1++
+ Return(30 * (Local0 + Local1))
}
Device(PRID)
@@ -76,30 +76,30 @@
CreateDwordField(OTBF, 16, BFFG) /* buffer flags */
/* Just return if the channel is disabled */
- If(And(PPCR, 0x01)) { /* primary PIO control */
+ If (PPCR & 0x01) { /* primary PIO control */
Return(OTBF)
}
/* Always tell them independent timing available and IOChannelReady used on both drives */
- Or(BFFG, 0x1A, BFFG)
+ BFFG |= 0x1A
- Store(GTTM(PPTM), PSD0) /* save total time of primary PIO master timming to PIO spd0 */
- Store(GTTM(PPTS), PSD1) /* save total time of primary PIO slave Timing to PIO spd1 */
+ PSD0 = GTTM (PPTM) /* save total time of primary PIO master timing to PIO spd0 */
+ PSD1 = GTTM (PPTS) /* save total time of primary PIO slave Timing to PIO spd1 */
- If(And(PDCR, 0x01)) { /* It's under UDMA mode */
- Or(BFFG, 0x01, BFFG)
- Store(DerefOf(Index(UDTT, PDMM)), DSD0)
+ If (PDCR & 0x01) { /* It's under UDMA mode */
+ BFFG |= 0x01
+ DSD0 = DerefOf(UDTT [PDMM])
}
Else {
- Store(GTTM(PMTM), DSD0) /* Primary MWDMA Master Timing, DmaSpd0 */
+ DSD0 = GTTM (PMTM) /* Primary MWDMA Master Timing, DmaSpd0 */
}
- If(And(PDCR, 0x02)) { /* It's under UDMA mode */
- Or(BFFG, 0x04, BFFG)
- Store(DerefOf(Index(UDTT, PDSM)), DSD1)
+ If (PDCR & 0x02) { /* It's under UDMA mode */
+ BFFG |= 0x04
+ DSD1 = DerefOf(UDTT [PDSM])
}
Else {
- Store(GTTM(PMTS), DSD1) /* Primary MWDMA Slave Timing, DmaSpd0 */
+ DSD1 = GTTM (PMTS) /* Primary MWDMA Slave Timing, DmaSpd0 */
}
Return(OTBF) /* out buffer */
@@ -120,35 +120,35 @@
CreateDwordField(INBF, 12, DSD1) /* DMA spd1 */
CreateDwordField(INBF, 16, BFFG) /*buffer flag */
- Store(Match(POTT, MLE, PSD0, MTR, 0, 0), Local0)
- Divide(Local0, 5, PPMM,) /* Primary PIO master Mode */
- Store(Match(POTT, MLE, PSD1, MTR, 0, 0), Local1)
- Divide(Local1, 5, PPSM,) /* Primary PIO slave Mode */
+ Local0 = Match (POTT, MLE, PSD0, MTR, 0, 0)
+ PPMM = Local0 % 5 /* Primary PIO master Mode */
+ Local1 = Match (POTT, MLE, PSD1, MTR, 0, 0)
+ PPSM = Local1 % 5 /* Primary PIO slave Mode */
- Store(DerefOf(Index(PORT, Local0)), PPTM) /* Primary PIO Master Timing */
- Store(DerefOf(Index(PORT, Local1)), PPTS) /* Primary PIO Slave Timing */
+ PPTM = DerefOf(PORT [Local0]) /* Primary PIO Master Timing */
+ PPTS = DerefOf(PORT [Local1]) /* Primary PIO Slave Timing */
- If(And(BFFG, 0x01)) { /* Drive 0 is under UDMA mode */
- Store(Match(UDTT, MLE, DSD0, MTR, 0, 0), Local0)
- Divide(Local0, 7, PDMM,)
- Or(PDCR, 0x01, PDCR)
+ If (BFFG & 0x01) { /* Drive 0 is under UDMA mode */
+ Local0 = Match (UDTT, MLE, DSD0, MTR, 0, 0)
+ PDMM = Local0 % 7
+ PDCR |= 0x01
}
Else {
- If(LNotEqual(DSD0, 0xFFFFFFFF)) {
- Store(Match(MDTT, MLE, DSD0, MTR, 0, 0), Local0)
- Store(DerefOf(Index(MDRT, Local0)), PMTM)
+ If (DSD0 != 0xFFFFFFFF) {
+ Local0 = Match (MDTT, MLE, DSD0, MTR, 0, 0)
+ PMTM = DerefOf(MDRT [Local0])
}
}
- If(And(BFFG, 0x04)) { /* Drive 1 is under UDMA mode */
- Store(Match(UDTT, MLE, DSD1, MTR, 0, 0), Local0)
- Divide(Local0, 7, PDSM,)
- Or(PDCR, 0x02, PDCR)
+ If (BFFG & 0x04) { /* Drive 1 is under UDMA mode */
+ Local0 = Match (UDTT, MLE, DSD1, MTR, 0, 0)
+ PDSM = Local0 % 7
+ PDCR |= 0x02
}
Else {
- If(LNotEqual(DSD1, 0xFFFFFFFF)) {
- Store(Match(MDTT, MLE, DSD1, MTR, 0, 0), Local0)
- Store(DerefOf(Index(MDRT, Local0)), PMTS)
+ If (DSD1 != 0xFFFFFFFF) {
+ Local0 = Match (MDTT, MLE, DSD1, MTR, 0, 0)
+ PMTS = DerefOf(MDRT [Local0])
}
}
/* Return(INBF) */
@@ -168,21 +168,19 @@
CreateByteField(CMBF, 12, CMDB)
CreateByteField(CMBF, 19, CMDC)
- Store(0xA0, CMDA)
- Store(0xA0, CMDB)
- Store(0xA0, CMDC)
+ CMDA = 0xA0
+ CMDB = 0xA0
+ CMDC = 0xA0
- Or(PPMM, 0x08, POMD)
+ POMD = PPMM | 0x08
- If(And(PDCR, 0x01)) {
- Or(PDMM, 0x40, DMMD)
+ If (PDCR & 0x01) {
+ DMMD = PDMM | 0x40
}
Else {
- Store(Match
- (MDTT, MLE, GTTM(PMTM),
- MTR, 0, 0), Local0)
- If(LLess(Local0, 3)) {
- Or(0x20, Local0, DMMD)
+ Local0 = Match (MDTT, MLE, GTTM(PMTM), MTR, 0, 0)
+ If (Local0 < 3) {
+ DMMD = Local0 | 0x20
}
}
Return(CMBF)
@@ -204,21 +202,19 @@
CreateByteField(CMBF, 12, CMDB)
CreateByteField(CMBF, 19, CMDC)
- Store(0xB0, CMDA)
- Store(0xB0, CMDB)
- Store(0xB0, CMDC)
+ CMDA = 0xB0
+ CMDB = 0xB0
+ CMDC = 0xB0
- Or(PPSM, 0x08, POMD)
+ POMD = PPSM | 0x08
- If(And(PDCR, 0x02)) {
- Or(PDSM, 0x40, DMMD)
+ If (PDCR & 0x02) {
+ DMMD = PDSM | 0x40
}
Else {
- Store(Match
- (MDTT, MLE, GTTM(PMTS),
- MTR, 0, 0), Local0)
- If(LLess(Local0, 3)) {
- Or(0x20, Local0, DMMD)
+ Local0 = Match (MDTT, MLE, GTTM(PMTS), MTR, 0, 0)
+ If (Local0 < 3) {
+ DMMD = Local0 | 0x20
}
}
Return(CMBF)
diff --git a/src/mainboard/amd/persimmon/acpi/ide.asl b/src/mainboard/amd/persimmon/acpi/ide.asl
index 663b36a..e3a1bec 100644
--- a/src/mainboard/amd/persimmon/acpi/ide.asl
+++ b/src/mainboard/amd/persimmon/acpi/ide.asl
@@ -50,11 +50,11 @@
Method(GTTM, 1) /* get total time*/
{
- Store(And(Arg0, 0x0F), Local0) /* Recovery Width */
- Increment(Local0)
- Store(ShiftRight(Arg0, 4), Local1) /* Command Width */
- Increment(Local1)
- Return(Multiply(30, Add(Local0, Local1)))
+ Local0 = Arg0 & 0x0F /* Recovery Width */
+ Local0++
+ Local1 = Arg0 >> 4 /* Command Width */
+ Local1++
+ Return(30 * (Local0 + Local1))
}
Device(PRID)
@@ -76,30 +76,30 @@
CreateDwordField(OTBF, 16, BFFG) /* buffer flags */
/* Just return if the channel is disabled */
- If(And(PPCR, 0x01)) { /* primary PIO control */
+ If (PPCR & 0x01) { /* primary PIO control */
Return(OTBF)
}
/* Always tell them independent timing available and IOChannelReady used on both drives */
- Or(BFFG, 0x1A, BFFG)
+ BFFG |= 0x1A
- Store(GTTM(PPTM), PSD0) /* save total time of primary PIO master timming to PIO spd0 */
- Store(GTTM(PPTS), PSD1) /* save total time of primary PIO slave Timing to PIO spd1 */
+ PSD0 = GTTM (PPTM) /* save total time of primary PIO master timing to PIO spd0 */
+ PSD1 = GTTM (PPTS) /* save total time of primary PIO slave Timing to PIO spd1 */
- If(And(PDCR, 0x01)) { /* It's under UDMA mode */
- Or(BFFG, 0x01, BFFG)
- Store(DerefOf(Index(UDTT, PDMM)), DSD0)
+ If (PDCR & 0x01) { /* It's under UDMA mode */
+ BFFG |= 0x01
+ DSD0 = DerefOf(UDTT [PDMM])
}
Else {
- Store(GTTM(PMTM), DSD0) /* Primary MWDMA Master Timing, DmaSpd0 */
+ DSD0 = GTTM (PMTM) /* Primary MWDMA Master Timing, DmaSpd0 */
}
- If(And(PDCR, 0x02)) { /* It's under UDMA mode */
- Or(BFFG, 0x04, BFFG)
- Store(DerefOf(Index(UDTT, PDSM)), DSD1)
+ If (PDCR & 0x02) { /* It's under UDMA mode */
+ BFFG |= 0x04
+ DSD1 = DerefOf(UDTT [PDSM])
}
Else {
- Store(GTTM(PMTS), DSD1) /* Primary MWDMA Slave Timing, DmaSpd0 */
+ DSD1 = GTTM (PMTS) /* Primary MWDMA Slave Timing, DmaSpd0 */
}
Return(OTBF) /* out buffer */
@@ -120,35 +120,35 @@
CreateDwordField(INBF, 12, DSD1) /* DMA spd1 */
CreateDwordField(INBF, 16, BFFG) /*buffer flag */
- Store(Match(POTT, MLE, PSD0, MTR, 0, 0), Local0)
- Divide(Local0, 5, PPMM,) /* Primary PIO master Mode */
- Store(Match(POTT, MLE, PSD1, MTR, 0, 0), Local1)
- Divide(Local1, 5, PPSM,) /* Primary PIO slave Mode */
+ Local0 = Match (POTT, MLE, PSD0, MTR, 0, 0)
+ PPMM = Local0 % 5 /* Primary PIO master Mode */
+ Local1 = Match (POTT, MLE, PSD1, MTR, 0, 0)
+ PPSM = Local1 % 5 /* Primary PIO slave Mode */
- Store(DerefOf(Index(PORT, Local0)), PPTM) /* Primary PIO Master Timing */
- Store(DerefOf(Index(PORT, Local1)), PPTS) /* Primary PIO Slave Timing */
+ PPTM = DerefOf(PORT [Local0]) /* Primary PIO Master Timing */
+ PPTS = DerefOf(PORT [Local1]) /* Primary PIO Slave Timing */
- If(And(BFFG, 0x01)) { /* Drive 0 is under UDMA mode */
- Store(Match(UDTT, MLE, DSD0, MTR, 0, 0), Local0)
- Divide(Local0, 7, PDMM,)
- Or(PDCR, 0x01, PDCR)
+ If (BFFG & 0x01) { /* Drive 0 is under UDMA mode */
+ Local0 = Match (UDTT, MLE, DSD0, MTR, 0, 0)
+ PDMM = Local0 % 7
+ PDCR |= 0x01
}
Else {
- If(LNotEqual(DSD0, 0xFFFFFFFF)) {
- Store(Match(MDTT, MLE, DSD0, MTR, 0, 0), Local0)
- Store(DerefOf(Index(MDRT, Local0)), PMTM)
+ If (DSD0 != 0xFFFFFFFF) {
+ Local0 = Match (MDTT, MLE, DSD0, MTR, 0, 0)
+ PMTM = DerefOf(MDRT [Local0])
}
}
- If(And(BFFG, 0x04)) { /* Drive 1 is under UDMA mode */
- Store(Match(UDTT, MLE, DSD1, MTR, 0, 0), Local0)
- Divide(Local0, 7, PDSM,)
- Or(PDCR, 0x02, PDCR)
+ If (BFFG & 0x04) { /* Drive 1 is under UDMA mode */
+ Local0 = Match (UDTT, MLE, DSD1, MTR, 0, 0)
+ PDSM = Local0 % 7
+ PDCR |= 0x02
}
Else {
- If(LNotEqual(DSD1, 0xFFFFFFFF)) {
- Store(Match(MDTT, MLE, DSD1, MTR, 0, 0), Local0)
- Store(DerefOf(Index(MDRT, Local0)), PMTS)
+ If (DSD1 != 0xFFFFFFFF) {
+ Local0 = Match (MDTT, MLE, DSD1, MTR, 0, 0)
+ PMTS = DerefOf(MDRT [Local0])
}
}
/* Return(INBF) */
@@ -168,21 +168,19 @@
CreateByteField(CMBF, 12, CMDB)
CreateByteField(CMBF, 19, CMDC)
- Store(0xA0, CMDA)
- Store(0xA0, CMDB)
- Store(0xA0, CMDC)
+ CMDA = 0xA0
+ CMDB = 0xA0
+ CMDC = 0xA0
- Or(PPMM, 0x08, POMD)
+ POMD = PPMM | 0x08
- If(And(PDCR, 0x01)) {
- Or(PDMM, 0x40, DMMD)
+ If (PDCR & 0x01) {
+ DMMD = PDMM | 0x40
}
Else {
- Store(Match
- (MDTT, MLE, GTTM(PMTM),
- MTR, 0, 0), Local0)
- If(LLess(Local0, 3)) {
- Or(0x20, Local0, DMMD)
+ Local0 = Match (MDTT, MLE, GTTM(PMTM), MTR, 0, 0)
+ If (Local0 < 3) {
+ DMMD = Local0 | 0x20
}
}
Return(CMBF)
@@ -204,21 +202,19 @@
CreateByteField(CMBF, 12, CMDB)
CreateByteField(CMBF, 19, CMDC)
- Store(0xB0, CMDA)
- Store(0xB0, CMDB)
- Store(0xB0, CMDC)
+ CMDA = 0xB0
+ CMDB = 0xB0
+ CMDC = 0xB0
- Or(PPSM, 0x08, POMD)
+ POMD = PPSM | 0x08
- If(And(PDCR, 0x02)) {
- Or(PDSM, 0x40, DMMD)
+ If (PDCR & 0x02) {
+ DMMD = PDSM | 0x40
}
Else {
- Store(Match
- (MDTT, MLE, GTTM(PMTS),
- MTR, 0, 0), Local0)
- If(LLess(Local0, 3)) {
- Or(0x20, Local0, DMMD)
+ Local0 = Match (MDTT, MLE, GTTM(PMTS), MTR, 0, 0)
+ If (Local0 < 3) {
+ DMMD = Local0 | 0x20
}
}
Return(CMBF)
diff --git a/src/mainboard/amd/south_station/acpi/ide.asl b/src/mainboard/amd/south_station/acpi/ide.asl
index 663b36a..e3a1bec 100644
--- a/src/mainboard/amd/south_station/acpi/ide.asl
+++ b/src/mainboard/amd/south_station/acpi/ide.asl
@@ -50,11 +50,11 @@
Method(GTTM, 1) /* get total time*/
{
- Store(And(Arg0, 0x0F), Local0) /* Recovery Width */
- Increment(Local0)
- Store(ShiftRight(Arg0, 4), Local1) /* Command Width */
- Increment(Local1)
- Return(Multiply(30, Add(Local0, Local1)))
+ Local0 = Arg0 & 0x0F /* Recovery Width */
+ Local0++
+ Local1 = Arg0 >> 4 /* Command Width */
+ Local1++
+ Return(30 * (Local0 + Local1))
}
Device(PRID)
@@ -76,30 +76,30 @@
CreateDwordField(OTBF, 16, BFFG) /* buffer flags */
/* Just return if the channel is disabled */
- If(And(PPCR, 0x01)) { /* primary PIO control */
+ If (PPCR & 0x01) { /* primary PIO control */
Return(OTBF)
}
/* Always tell them independent timing available and IOChannelReady used on both drives */
- Or(BFFG, 0x1A, BFFG)
+ BFFG |= 0x1A
- Store(GTTM(PPTM), PSD0) /* save total time of primary PIO master timming to PIO spd0 */
- Store(GTTM(PPTS), PSD1) /* save total time of primary PIO slave Timing to PIO spd1 */
+ PSD0 = GTTM (PPTM) /* save total time of primary PIO master timing to PIO spd0 */
+ PSD1 = GTTM (PPTS) /* save total time of primary PIO slave Timing to PIO spd1 */
- If(And(PDCR, 0x01)) { /* It's under UDMA mode */
- Or(BFFG, 0x01, BFFG)
- Store(DerefOf(Index(UDTT, PDMM)), DSD0)
+ If (PDCR & 0x01) { /* It's under UDMA mode */
+ BFFG |= 0x01
+ DSD0 = DerefOf(UDTT [PDMM])
}
Else {
- Store(GTTM(PMTM), DSD0) /* Primary MWDMA Master Timing, DmaSpd0 */
+ DSD0 = GTTM (PMTM) /* Primary MWDMA Master Timing, DmaSpd0 */
}
- If(And(PDCR, 0x02)) { /* It's under UDMA mode */
- Or(BFFG, 0x04, BFFG)
- Store(DerefOf(Index(UDTT, PDSM)), DSD1)
+ If (PDCR & 0x02) { /* It's under UDMA mode */
+ BFFG |= 0x04
+ DSD1 = DerefOf(UDTT [PDSM])
}
Else {
- Store(GTTM(PMTS), DSD1) /* Primary MWDMA Slave Timing, DmaSpd0 */
+ DSD1 = GTTM (PMTS) /* Primary MWDMA Slave Timing, DmaSpd0 */
}
Return(OTBF) /* out buffer */
@@ -120,35 +120,35 @@
CreateDwordField(INBF, 12, DSD1) /* DMA spd1 */
CreateDwordField(INBF, 16, BFFG) /*buffer flag */
- Store(Match(POTT, MLE, PSD0, MTR, 0, 0), Local0)
- Divide(Local0, 5, PPMM,) /* Primary PIO master Mode */
- Store(Match(POTT, MLE, PSD1, MTR, 0, 0), Local1)
- Divide(Local1, 5, PPSM,) /* Primary PIO slave Mode */
+ Local0 = Match (POTT, MLE, PSD0, MTR, 0, 0)
+ PPMM = Local0 % 5 /* Primary PIO master Mode */
+ Local1 = Match (POTT, MLE, PSD1, MTR, 0, 0)
+ PPSM = Local1 % 5 /* Primary PIO slave Mode */
- Store(DerefOf(Index(PORT, Local0)), PPTM) /* Primary PIO Master Timing */
- Store(DerefOf(Index(PORT, Local1)), PPTS) /* Primary PIO Slave Timing */
+ PPTM = DerefOf(PORT [Local0]) /* Primary PIO Master Timing */
+ PPTS = DerefOf(PORT [Local1]) /* Primary PIO Slave Timing */
- If(And(BFFG, 0x01)) { /* Drive 0 is under UDMA mode */
- Store(Match(UDTT, MLE, DSD0, MTR, 0, 0), Local0)
- Divide(Local0, 7, PDMM,)
- Or(PDCR, 0x01, PDCR)
+ If (BFFG & 0x01) { /* Drive 0 is under UDMA mode */
+ Local0 = Match (UDTT, MLE, DSD0, MTR, 0, 0)
+ PDMM = Local0 % 7
+ PDCR |= 0x01
}
Else {
- If(LNotEqual(DSD0, 0xFFFFFFFF)) {
- Store(Match(MDTT, MLE, DSD0, MTR, 0, 0), Local0)
- Store(DerefOf(Index(MDRT, Local0)), PMTM)
+ If (DSD0 != 0xFFFFFFFF) {
+ Local0 = Match (MDTT, MLE, DSD0, MTR, 0, 0)
+ PMTM = DerefOf(MDRT [Local0])
}
}
- If(And(BFFG, 0x04)) { /* Drive 1 is under UDMA mode */
- Store(Match(UDTT, MLE, DSD1, MTR, 0, 0), Local0)
- Divide(Local0, 7, PDSM,)
- Or(PDCR, 0x02, PDCR)
+ If (BFFG & 0x04) { /* Drive 1 is under UDMA mode */
+ Local0 = Match (UDTT, MLE, DSD1, MTR, 0, 0)
+ PDSM = Local0 % 7
+ PDCR |= 0x02
}
Else {
- If(LNotEqual(DSD1, 0xFFFFFFFF)) {
- Store(Match(MDTT, MLE, DSD1, MTR, 0, 0), Local0)
- Store(DerefOf(Index(MDRT, Local0)), PMTS)
+ If (DSD1 != 0xFFFFFFFF) {
+ Local0 = Match (MDTT, MLE, DSD1, MTR, 0, 0)
+ PMTS = DerefOf(MDRT [Local0])
}
}
/* Return(INBF) */
@@ -168,21 +168,19 @@
CreateByteField(CMBF, 12, CMDB)
CreateByteField(CMBF, 19, CMDC)
- Store(0xA0, CMDA)
- Store(0xA0, CMDB)
- Store(0xA0, CMDC)
+ CMDA = 0xA0
+ CMDB = 0xA0
+ CMDC = 0xA0
- Or(PPMM, 0x08, POMD)
+ POMD = PPMM | 0x08
- If(And(PDCR, 0x01)) {
- Or(PDMM, 0x40, DMMD)
+ If (PDCR & 0x01) {
+ DMMD = PDMM | 0x40
}
Else {
- Store(Match
- (MDTT, MLE, GTTM(PMTM),
- MTR, 0, 0), Local0)
- If(LLess(Local0, 3)) {
- Or(0x20, Local0, DMMD)
+ Local0 = Match (MDTT, MLE, GTTM(PMTM), MTR, 0, 0)
+ If (Local0 < 3) {
+ DMMD = Local0 | 0x20
}
}
Return(CMBF)
@@ -204,21 +202,19 @@
CreateByteField(CMBF, 12, CMDB)
CreateByteField(CMBF, 19, CMDC)
- Store(0xB0, CMDA)
- Store(0xB0, CMDB)
- Store(0xB0, CMDC)
+ CMDA = 0xB0
+ CMDB = 0xB0
+ CMDC = 0xB0
- Or(PPSM, 0x08, POMD)
+ POMD = PPSM | 0x08
- If(And(PDCR, 0x02)) {
- Or(PDSM, 0x40, DMMD)
+ If (PDCR & 0x02) {
+ DMMD = PDSM | 0x40
}
Else {
- Store(Match
- (MDTT, MLE, GTTM(PMTS),
- MTR, 0, 0), Local0)
- If(LLess(Local0, 3)) {
- Or(0x20, Local0, DMMD)
+ Local0 = Match (MDTT, MLE, GTTM(PMTS), MTR, 0, 0)
+ If (Local0 < 3) {
+ DMMD = Local0 | 0x20
}
}
Return(CMBF)
diff --git a/src/mainboard/amd/union_station/acpi/ide.asl b/src/mainboard/amd/union_station/acpi/ide.asl
index 663b36a..e3a1bec 100644
--- a/src/mainboard/amd/union_station/acpi/ide.asl
+++ b/src/mainboard/amd/union_station/acpi/ide.asl
@@ -50,11 +50,11 @@
Method(GTTM, 1) /* get total time*/
{
- Store(And(Arg0, 0x0F), Local0) /* Recovery Width */
- Increment(Local0)
- Store(ShiftRight(Arg0, 4), Local1) /* Command Width */
- Increment(Local1)
- Return(Multiply(30, Add(Local0, Local1)))
+ Local0 = Arg0 & 0x0F /* Recovery Width */
+ Local0++
+ Local1 = Arg0 >> 4 /* Command Width */
+ Local1++
+ Return(30 * (Local0 + Local1))
}
Device(PRID)
@@ -76,30 +76,30 @@
CreateDwordField(OTBF, 16, BFFG) /* buffer flags */
/* Just return if the channel is disabled */
- If(And(PPCR, 0x01)) { /* primary PIO control */
+ If (PPCR & 0x01) { /* primary PIO control */
Return(OTBF)
}
/* Always tell them independent timing available and IOChannelReady used on both drives */
- Or(BFFG, 0x1A, BFFG)
+ BFFG |= 0x1A
- Store(GTTM(PPTM), PSD0) /* save total time of primary PIO master timming to PIO spd0 */
- Store(GTTM(PPTS), PSD1) /* save total time of primary PIO slave Timing to PIO spd1 */
+ PSD0 = GTTM (PPTM) /* save total time of primary PIO master timing to PIO spd0 */
+ PSD1 = GTTM (PPTS) /* save total time of primary PIO slave Timing to PIO spd1 */
- If(And(PDCR, 0x01)) { /* It's under UDMA mode */
- Or(BFFG, 0x01, BFFG)
- Store(DerefOf(Index(UDTT, PDMM)), DSD0)
+ If (PDCR & 0x01) { /* It's under UDMA mode */
+ BFFG |= 0x01
+ DSD0 = DerefOf(UDTT [PDMM])
}
Else {
- Store(GTTM(PMTM), DSD0) /* Primary MWDMA Master Timing, DmaSpd0 */
+ DSD0 = GTTM (PMTM) /* Primary MWDMA Master Timing, DmaSpd0 */
}
- If(And(PDCR, 0x02)) { /* It's under UDMA mode */
- Or(BFFG, 0x04, BFFG)
- Store(DerefOf(Index(UDTT, PDSM)), DSD1)
+ If (PDCR & 0x02) { /* It's under UDMA mode */
+ BFFG |= 0x04
+ DSD1 = DerefOf(UDTT [PDSM])
}
Else {
- Store(GTTM(PMTS), DSD1) /* Primary MWDMA Slave Timing, DmaSpd0 */
+ DSD1 = GTTM (PMTS) /* Primary MWDMA Slave Timing, DmaSpd0 */
}
Return(OTBF) /* out buffer */
@@ -120,35 +120,35 @@
CreateDwordField(INBF, 12, DSD1) /* DMA spd1 */
CreateDwordField(INBF, 16, BFFG) /*buffer flag */
- Store(Match(POTT, MLE, PSD0, MTR, 0, 0), Local0)
- Divide(Local0, 5, PPMM,) /* Primary PIO master Mode */
- Store(Match(POTT, MLE, PSD1, MTR, 0, 0), Local1)
- Divide(Local1, 5, PPSM,) /* Primary PIO slave Mode */
+ Local0 = Match (POTT, MLE, PSD0, MTR, 0, 0)
+ PPMM = Local0 % 5 /* Primary PIO master Mode */
+ Local1 = Match (POTT, MLE, PSD1, MTR, 0, 0)
+ PPSM = Local1 % 5 /* Primary PIO slave Mode */
- Store(DerefOf(Index(PORT, Local0)), PPTM) /* Primary PIO Master Timing */
- Store(DerefOf(Index(PORT, Local1)), PPTS) /* Primary PIO Slave Timing */
+ PPTM = DerefOf(PORT [Local0]) /* Primary PIO Master Timing */
+ PPTS = DerefOf(PORT [Local1]) /* Primary PIO Slave Timing */
- If(And(BFFG, 0x01)) { /* Drive 0 is under UDMA mode */
- Store(Match(UDTT, MLE, DSD0, MTR, 0, 0), Local0)
- Divide(Local0, 7, PDMM,)
- Or(PDCR, 0x01, PDCR)
+ If (BFFG & 0x01) { /* Drive 0 is under UDMA mode */
+ Local0 = Match (UDTT, MLE, DSD0, MTR, 0, 0)
+ PDMM = Local0 % 7
+ PDCR |= 0x01
}
Else {
- If(LNotEqual(DSD0, 0xFFFFFFFF)) {
- Store(Match(MDTT, MLE, DSD0, MTR, 0, 0), Local0)
- Store(DerefOf(Index(MDRT, Local0)), PMTM)
+ If (DSD0 != 0xFFFFFFFF) {
+ Local0 = Match (MDTT, MLE, DSD0, MTR, 0, 0)
+ PMTM = DerefOf(MDRT [Local0])
}
}
- If(And(BFFG, 0x04)) { /* Drive 1 is under UDMA mode */
- Store(Match(UDTT, MLE, DSD1, MTR, 0, 0), Local0)
- Divide(Local0, 7, PDSM,)
- Or(PDCR, 0x02, PDCR)
+ If (BFFG & 0x04) { /* Drive 1 is under UDMA mode */
+ Local0 = Match (UDTT, MLE, DSD1, MTR, 0, 0)
+ PDSM = Local0 % 7
+ PDCR |= 0x02
}
Else {
- If(LNotEqual(DSD1, 0xFFFFFFFF)) {
- Store(Match(MDTT, MLE, DSD1, MTR, 0, 0), Local0)
- Store(DerefOf(Index(MDRT, Local0)), PMTS)
+ If (DSD1 != 0xFFFFFFFF) {
+ Local0 = Match (MDTT, MLE, DSD1, MTR, 0, 0)
+ PMTS = DerefOf(MDRT [Local0])
}
}
/* Return(INBF) */
@@ -168,21 +168,19 @@
CreateByteField(CMBF, 12, CMDB)
CreateByteField(CMBF, 19, CMDC)
- Store(0xA0, CMDA)
- Store(0xA0, CMDB)
- Store(0xA0, CMDC)
+ CMDA = 0xA0
+ CMDB = 0xA0
+ CMDC = 0xA0
- Or(PPMM, 0x08, POMD)
+ POMD = PPMM | 0x08
- If(And(PDCR, 0x01)) {
- Or(PDMM, 0x40, DMMD)
+ If (PDCR & 0x01) {
+ DMMD = PDMM | 0x40
}
Else {
- Store(Match
- (MDTT, MLE, GTTM(PMTM),
- MTR, 0, 0), Local0)
- If(LLess(Local0, 3)) {
- Or(0x20, Local0, DMMD)
+ Local0 = Match (MDTT, MLE, GTTM(PMTM), MTR, 0, 0)
+ If (Local0 < 3) {
+ DMMD = Local0 | 0x20
}
}
Return(CMBF)
@@ -204,21 +202,19 @@
CreateByteField(CMBF, 12, CMDB)
CreateByteField(CMBF, 19, CMDC)
- Store(0xB0, CMDA)
- Store(0xB0, CMDB)
- Store(0xB0, CMDC)
+ CMDA = 0xB0
+ CMDB = 0xB0
+ CMDC = 0xB0
- Or(PPSM, 0x08, POMD)
+ POMD = PPSM | 0x08
- If(And(PDCR, 0x02)) {
- Or(PDSM, 0x40, DMMD)
+ If (PDCR & 0x02) {
+ DMMD = PDSM | 0x40
}
Else {
- Store(Match
- (MDTT, MLE, GTTM(PMTS),
- MTR, 0, 0), Local0)
- If(LLess(Local0, 3)) {
- Or(0x20, Local0, DMMD)
+ Local0 = Match (MDTT, MLE, GTTM(PMTS), MTR, 0, 0)
+ If (Local0 < 3) {
+ DMMD = Local0 | 0x20
}
}
Return(CMBF)
diff --git a/src/mainboard/biostar/am1ml/acpi/ide.asl b/src/mainboard/biostar/am1ml/acpi/ide.asl
index 56f760d..766fcb3 100644
--- a/src/mainboard/biostar/am1ml/acpi/ide.asl
+++ b/src/mainboard/biostar/am1ml/acpi/ide.asl
@@ -52,11 +52,11 @@
Method(GTTM, 1) /* get total time*/
{
- Store(And(Arg0, 0x0F), Local0) /* Recovery Width */
- Increment(Local0)
- Store(ShiftRight(Arg0, 4), Local1) /* Command Width */
- Increment(Local1)
- Return(Multiply(30, Add(Local0, Local1)))
+ Local0 = Arg0 & 0x0F /* Recovery Width */
+ Local0++
+ Local1 = Arg0 >> 4 /* Command Width */
+ Local1++
+ Return(30 * (Local0 + Local1))
}
Device(PRID)
@@ -78,32 +78,32 @@
CreateDwordField(OTBF, 16, BFFG) /* buffer flags */
/* Just return if the channel is disabled */
- If(And(PPCR, 0x01)) { /* primary PIO control */
+ If (PPCR & 0x01) { /* primary PIO control */
Return(OTBF)
}
/* Always tell them independent timing available and IOChannelReady used on both drives */
- Or(BFFG, 0x1A, BFFG)
+ BFFG |= 0x1A
/* save total time of primary PIO master timing to PIO spd0 */
- Store(GTTM(PPTM), PSD0)
+ PSD0 = GTTM (PPTM)
/* save total time of primary PIO slave Timing to PIO spd1 */
- Store(GTTM(PPTS), PSD1)
+ PSD1 = GTTM (PPTS)
- If(And(PDCR, 0x01)) { /* It's under UDMA mode */
- Or(BFFG, 0x01, BFFG)
- Store(DerefOf(Index(UDTT, PDMM)), DSD0)
+ If (PDCR & 0x01) { /* It's under UDMA mode */
+ BFFG |= 0x01
+ DSD0 = DerefOf(UDTT [PDMM])
}
Else {
- Store(GTTM(PMTM), DSD0) /* Primary MWDMA Master Timing, DmaSpd0 */
+ DSD0 = GTTM (PMTM) /* Primary MWDMA Master Timing, DmaSpd0 */
}
- If(And(PDCR, 0x02)) { /* It's under UDMA mode */
- Or(BFFG, 0x04, BFFG)
- Store(DerefOf(Index(UDTT, PDSM)), DSD1)
+ If (PDCR & 0x02) { /* It's under UDMA mode */
+ BFFG |= 0x04
+ DSD1 = DerefOf(UDTT [PDSM])
}
Else {
- Store(GTTM(PMTS), DSD1) /* Primary MWDMA Slave Timing, DmaSpd0 */
+ DSD1 = GTTM (PMTS) /* Primary MWDMA Slave Timing, DmaSpd0 */
}
Return(OTBF) /* out buffer */
@@ -124,35 +124,35 @@
CreateDwordField(INBF, 12, DSD1) /* DMA spd1 */
CreateDwordField(INBF, 16, BFFG) /*buffer flag */
- Store(Match(POTT, MLE, PSD0, MTR, 0, 0), Local0)
- Divide(Local0, 5, PPMM,) /* Primary PIO master Mode */
- Store(Match(POTT, MLE, PSD1, MTR, 0, 0), Local1)
- Divide(Local1, 5, PPSM,) /* Primary PIO slave Mode */
+ Local0 = Match (POTT, MLE, PSD0, MTR, 0, 0)
+ PPMM = Local0 % 5 /* Primary PIO master Mode */
+ Local1 = Match (POTT, MLE, PSD1, MTR, 0, 0)
+ PPSM = Local1 % 5 /* Primary PIO slave Mode */
- Store(DerefOf(Index(PORT, Local0)), PPTM) /* Primary PIO Master Timing */
- Store(DerefOf(Index(PORT, Local1)), PPTS) /* Primary PIO Slave Timing */
+ PPTM = DerefOf(PORT [Local0]) /* Primary PIO Master Timing */
+ PPTS = DerefOf(PORT [Local1]) /* Primary PIO Slave Timing */
- If(And(BFFG, 0x01)) { /* Drive 0 is under UDMA mode */
- Store(Match(UDTT, MLE, DSD0, MTR, 0, 0), Local0)
- Divide(Local0, 7, PDMM,)
- Or(PDCR, 0x01, PDCR)
+ If (BFFG & 0x01) { /* Drive 0 is under UDMA mode */
+ Local0 = Match (UDTT, MLE, DSD0, MTR, 0, 0)
+ PDMM = Local0 % 7
+ PDCR |= 0x01
}
Else {
- If(LNotEqual(DSD0, 0xFFFFFFFF)) {
- Store(Match(MDTT, MLE, DSD0, MTR, 0, 0), Local0)
- Store(DerefOf(Index(MDRT, Local0)), PMTM)
+ If (DSD0 != 0xFFFFFFFF) {
+ Local0 = Match (MDTT, MLE, DSD0, MTR, 0, 0)
+ PMTM = DerefOf(MDRT [Local0])
}
}
- If(And(BFFG, 0x04)) { /* Drive 1 is under UDMA mode */
- Store(Match(UDTT, MLE, DSD1, MTR, 0, 0), Local0)
- Divide(Local0, 7, PDSM,)
- Or(PDCR, 0x02, PDCR)
+ If (BFFG & 0x04) { /* Drive 1 is under UDMA mode */
+ Local0 = Match (UDTT, MLE, DSD1, MTR, 0, 0)
+ PDSM = Local0 % 7
+ PDCR |= 0x02
}
Else {
- If(LNotEqual(DSD1, 0xFFFFFFFF)) {
- Store(Match(MDTT, MLE, DSD1, MTR, 0, 0), Local0)
- Store(DerefOf(Index(MDRT, Local0)), PMTS)
+ If (DSD1 != 0xFFFFFFFF) {
+ Local0 = Match (MDTT, MLE, DSD1, MTR, 0, 0)
+ PMTS = DerefOf(MDRT [Local0])
}
}
/* Return(INBF) */
@@ -172,21 +172,19 @@
CreateByteField(CMBF, 12, CMDB)
CreateByteField(CMBF, 19, CMDC)
- Store(0xA0, CMDA)
- Store(0xA0, CMDB)
- Store(0xA0, CMDC)
+ CMDA = 0xA0
+ CMDB = 0xA0
+ CMDC = 0xA0
- Or(PPMM, 0x08, POMD)
+ POMD = PPMM | 0x08
- If(And(PDCR, 0x01)) {
- Or(PDMM, 0x40, DMMD)
+ If (PDCR & 0x01) {
+ DMMD = PDMM | 0x40
}
Else {
- Store(Match
- (MDTT, MLE, GTTM(PMTM),
- MTR, 0, 0), Local0)
- If(LLess(Local0, 3)) {
- Or(0x20, Local0, DMMD)
+ Local0 = Match (MDTT, MLE, GTTM(PMTM), MTR, 0, 0)
+ If (Local0 < 3) {
+ DMMD = Local0 | 0x20
}
}
Return(CMBF)
@@ -208,21 +206,19 @@
CreateByteField(CMBF, 12, CMDB)
CreateByteField(CMBF, 19, CMDC)
- Store(0xB0, CMDA)
- Store(0xB0, CMDB)
- Store(0xB0, CMDC)
+ CMDA = 0xB0
+ CMDB = 0xB0
+ CMDC = 0xB0
- Or(PPSM, 0x08, POMD)
+ POMD = PPSM | 0x08
- If(And(PDCR, 0x02)) {
- Or(PDSM, 0x40, DMMD)
+ If (PDCR & 0x02) {
+ DMMD = PDSM | 0x40
}
Else {
- Store(Match
- (MDTT, MLE, GTTM(PMTS),
- MTR, 0, 0), Local0)
- If(LLess(Local0, 3)) {
- Or(0x20, Local0, DMMD)
+ Local0 = Match (MDTT, MLE, GTTM(PMTS), MTR, 0, 0)
+ If (Local0 < 3) {
+ DMMD = Local0 | 0x20
}
}
Return(CMBF)
diff --git a/src/mainboard/elmex/pcm205400/acpi/ide.asl b/src/mainboard/elmex/pcm205400/acpi/ide.asl
index 663b36a..e3a1bec 100644
--- a/src/mainboard/elmex/pcm205400/acpi/ide.asl
+++ b/src/mainboard/elmex/pcm205400/acpi/ide.asl
@@ -50,11 +50,11 @@
Method(GTTM, 1) /* get total time*/
{
- Store(And(Arg0, 0x0F), Local0) /* Recovery Width */
- Increment(Local0)
- Store(ShiftRight(Arg0, 4), Local1) /* Command Width */
- Increment(Local1)
- Return(Multiply(30, Add(Local0, Local1)))
+ Local0 = Arg0 & 0x0F /* Recovery Width */
+ Local0++
+ Local1 = Arg0 >> 4 /* Command Width */
+ Local1++
+ Return(30 * (Local0 + Local1))
}
Device(PRID)
@@ -76,30 +76,30 @@
CreateDwordField(OTBF, 16, BFFG) /* buffer flags */
/* Just return if the channel is disabled */
- If(And(PPCR, 0x01)) { /* primary PIO control */
+ If (PPCR & 0x01) { /* primary PIO control */
Return(OTBF)
}
/* Always tell them independent timing available and IOChannelReady used on both drives */
- Or(BFFG, 0x1A, BFFG)
+ BFFG |= 0x1A
- Store(GTTM(PPTM), PSD0) /* save total time of primary PIO master timming to PIO spd0 */
- Store(GTTM(PPTS), PSD1) /* save total time of primary PIO slave Timing to PIO spd1 */
+ PSD0 = GTTM (PPTM) /* save total time of primary PIO master timing to PIO spd0 */
+ PSD1 = GTTM (PPTS) /* save total time of primary PIO slave Timing to PIO spd1 */
- If(And(PDCR, 0x01)) { /* It's under UDMA mode */
- Or(BFFG, 0x01, BFFG)
- Store(DerefOf(Index(UDTT, PDMM)), DSD0)
+ If (PDCR & 0x01) { /* It's under UDMA mode */
+ BFFG |= 0x01
+ DSD0 = DerefOf(UDTT [PDMM])
}
Else {
- Store(GTTM(PMTM), DSD0) /* Primary MWDMA Master Timing, DmaSpd0 */
+ DSD0 = GTTM (PMTM) /* Primary MWDMA Master Timing, DmaSpd0 */
}
- If(And(PDCR, 0x02)) { /* It's under UDMA mode */
- Or(BFFG, 0x04, BFFG)
- Store(DerefOf(Index(UDTT, PDSM)), DSD1)
+ If (PDCR & 0x02) { /* It's under UDMA mode */
+ BFFG |= 0x04
+ DSD1 = DerefOf(UDTT [PDSM])
}
Else {
- Store(GTTM(PMTS), DSD1) /* Primary MWDMA Slave Timing, DmaSpd0 */
+ DSD1 = GTTM (PMTS) /* Primary MWDMA Slave Timing, DmaSpd0 */
}
Return(OTBF) /* out buffer */
@@ -120,35 +120,35 @@
CreateDwordField(INBF, 12, DSD1) /* DMA spd1 */
CreateDwordField(INBF, 16, BFFG) /*buffer flag */
- Store(Match(POTT, MLE, PSD0, MTR, 0, 0), Local0)
- Divide(Local0, 5, PPMM,) /* Primary PIO master Mode */
- Store(Match(POTT, MLE, PSD1, MTR, 0, 0), Local1)
- Divide(Local1, 5, PPSM,) /* Primary PIO slave Mode */
+ Local0 = Match (POTT, MLE, PSD0, MTR, 0, 0)
+ PPMM = Local0 % 5 /* Primary PIO master Mode */
+ Local1 = Match (POTT, MLE, PSD1, MTR, 0, 0)
+ PPSM = Local1 % 5 /* Primary PIO slave Mode */
- Store(DerefOf(Index(PORT, Local0)), PPTM) /* Primary PIO Master Timing */
- Store(DerefOf(Index(PORT, Local1)), PPTS) /* Primary PIO Slave Timing */
+ PPTM = DerefOf(PORT [Local0]) /* Primary PIO Master Timing */
+ PPTS = DerefOf(PORT [Local1]) /* Primary PIO Slave Timing */
- If(And(BFFG, 0x01)) { /* Drive 0 is under UDMA mode */
- Store(Match(UDTT, MLE, DSD0, MTR, 0, 0), Local0)
- Divide(Local0, 7, PDMM,)
- Or(PDCR, 0x01, PDCR)
+ If (BFFG & 0x01) { /* Drive 0 is under UDMA mode */
+ Local0 = Match (UDTT, MLE, DSD0, MTR, 0, 0)
+ PDMM = Local0 % 7
+ PDCR |= 0x01
}
Else {
- If(LNotEqual(DSD0, 0xFFFFFFFF)) {
- Store(Match(MDTT, MLE, DSD0, MTR, 0, 0), Local0)
- Store(DerefOf(Index(MDRT, Local0)), PMTM)
+ If (DSD0 != 0xFFFFFFFF) {
+ Local0 = Match (MDTT, MLE, DSD0, MTR, 0, 0)
+ PMTM = DerefOf(MDRT [Local0])
}
}
- If(And(BFFG, 0x04)) { /* Drive 1 is under UDMA mode */
- Store(Match(UDTT, MLE, DSD1, MTR, 0, 0), Local0)
- Divide(Local0, 7, PDSM,)
- Or(PDCR, 0x02, PDCR)
+ If (BFFG & 0x04) { /* Drive 1 is under UDMA mode */
+ Local0 = Match (UDTT, MLE, DSD1, MTR, 0, 0)
+ PDSM = Local0 % 7
+ PDCR |= 0x02
}
Else {
- If(LNotEqual(DSD1, 0xFFFFFFFF)) {
- Store(Match(MDTT, MLE, DSD1, MTR, 0, 0), Local0)
- Store(DerefOf(Index(MDRT, Local0)), PMTS)
+ If (DSD1 != 0xFFFFFFFF) {
+ Local0 = Match (MDTT, MLE, DSD1, MTR, 0, 0)
+ PMTS = DerefOf(MDRT [Local0])
}
}
/* Return(INBF) */
@@ -168,21 +168,19 @@
CreateByteField(CMBF, 12, CMDB)
CreateByteField(CMBF, 19, CMDC)
- Store(0xA0, CMDA)
- Store(0xA0, CMDB)
- Store(0xA0, CMDC)
+ CMDA = 0xA0
+ CMDB = 0xA0
+ CMDC = 0xA0
- Or(PPMM, 0x08, POMD)
+ POMD = PPMM | 0x08
- If(And(PDCR, 0x01)) {
- Or(PDMM, 0x40, DMMD)
+ If (PDCR & 0x01) {
+ DMMD = PDMM | 0x40
}
Else {
- Store(Match
- (MDTT, MLE, GTTM(PMTM),
- MTR, 0, 0), Local0)
- If(LLess(Local0, 3)) {
- Or(0x20, Local0, DMMD)
+ Local0 = Match (MDTT, MLE, GTTM(PMTM), MTR, 0, 0)
+ If (Local0 < 3) {
+ DMMD = Local0 | 0x20
}
}
Return(CMBF)
@@ -204,21 +202,19 @@
CreateByteField(CMBF, 12, CMDB)
CreateByteField(CMBF, 19, CMDC)
- Store(0xB0, CMDA)
- Store(0xB0, CMDB)
- Store(0xB0, CMDC)
+ CMDA = 0xB0
+ CMDB = 0xB0
+ CMDC = 0xB0
- Or(PPSM, 0x08, POMD)
+ POMD = PPSM | 0x08
- If(And(PDCR, 0x02)) {
- Or(PDSM, 0x40, DMMD)
+ If (PDCR & 0x02) {
+ DMMD = PDSM | 0x40
}
Else {
- Store(Match
- (MDTT, MLE, GTTM(PMTS),
- MTR, 0, 0), Local0)
- If(LLess(Local0, 3)) {
- Or(0x20, Local0, DMMD)
+ Local0 = Match (MDTT, MLE, GTTM(PMTS), MTR, 0, 0)
+ If (Local0 < 3) {
+ DMMD = Local0 | 0x20
}
}
Return(CMBF)
diff --git a/src/mainboard/gizmosphere/gizmo/acpi/ide.asl b/src/mainboard/gizmosphere/gizmo/acpi/ide.asl
index 60979da..ceac0e6 100644
--- a/src/mainboard/gizmosphere/gizmo/acpi/ide.asl
+++ b/src/mainboard/gizmosphere/gizmo/acpi/ide.asl
@@ -50,11 +50,11 @@
Method(GTTM, 1) /* get total time*/
{
- Store(And(Arg0, 0x0F), Local0) /* Recovery Width */
- Increment(Local0)
- Store(ShiftRight(Arg0, 4), Local1) /* Command Width */
- Increment(Local1)
- Return(Multiply(30, Add(Local0, Local1)))
+ Local0 = Arg0 & 0x0F /* Recovery Width */
+ Local0++
+ Local1 = Arg0 >> 4 /* Command Width */
+ Local1++
+ Return(30 * (Local0 + Local1))
}
Device(PRID)
@@ -76,30 +76,30 @@
CreateDwordField(OTBF, 16, BFFG) /* buffer flags */
/* Just return if the channel is disabled */
- If(And(PPCR, 0x01)) { /* primary PIO control */
+ If (PPCR & 0x01) { /* primary PIO control */
Return(OTBF)
}
/* Always tell them independent timing available and IOChannelReady used on both drives */
- Or(BFFG, 0x1A, BFFG)
+ BFFG |= 0x1A
- Store(GTTM(PPTM), PSD0) /* save total time of primary PIO master timming to PIO spd0 */
- Store(GTTM(PPTS), PSD1) /* save total time of primary PIO slave Timing to PIO spd1 */
+ PSD0 = GTTM (PPTM) /* save total time of primary PIO master timing to PIO spd0 */
+ PSD1 = GTTM (PPTS) /* save total time of primary PIO slave Timing to PIO spd1 */
- If(And(PDCR, 0x01)) { /* It's under UDMA mode */
- Or(BFFG, 0x01, BFFG)
- Store(DerefOf(Index(UDTT, PDMM)), DSD0)
+ If (PDCR & 0x01) { /* It's under UDMA mode */
+ BFFG |= 0x01
+ DSD0 = DerefOf(UDTT [PDMM])
}
Else {
- Store(GTTM(PMTM), DSD0) /* Primary MWDMA Master Timing, DmaSpd0 */
+ DSD0 = GTTM (PMTM) /* Primary MWDMA Master Timing, DmaSpd0 */
}
- If(And(PDCR, 0x02)) { /* It's under UDMA mode */
- Or(BFFG, 0x04, BFFG)
- Store(DerefOf(Index(UDTT, PDSM)), DSD1)
+ If (PDCR & 0x02) { /* It's under UDMA mode */
+ BFFG |= 0x04
+ DSD1 = DerefOf(UDTT [PDSM])
}
Else {
- Store(GTTM(PMTS), DSD1) /* Primary MWDMA Slave Timing, DmaSpd0 */
+ DSD1 = GTTM (PMTS) /* Primary MWDMA Slave Timing, DmaSpd0 */
}
Return(OTBF) /* out buffer */
@@ -120,35 +120,35 @@
CreateDwordField(INBF, 12, DSD1) /* DMA spd1 */
CreateDwordField(INBF, 16, BFFG) /*buffer flag */
- Store(Match(POTT, MLE, PSD0, MTR, 0, 0), Local0)
- Divide(Local0, 5, PPMM,) /* Primary PIO master Mode */
- Store(Match(POTT, MLE, PSD1, MTR, 0, 0), Local1)
- Divide(Local1, 5, PPSM,) /* Primary PIO slave Mode */
+ Local0 = Match (POTT, MLE, PSD0, MTR, 0, 0)
+ PPMM = Local0 % 5 /* Primary PIO master Mode */
+ Local1 = Match (POTT, MLE, PSD1, MTR, 0, 0)
+ PPSM = Local1 % 5 /* Primary PIO slave Mode */
- Store(DerefOf(Index(PORT, Local0)), PPTM) /* Primary PIO Master Timing */
- Store(DerefOf(Index(PORT, Local1)), PPTS) /* Primary PIO Slave Timing */
+ PPTM = DerefOf(PORT [Local0]) /* Primary PIO Master Timing */
+ PPTS = DerefOf(PORT [Local1]) /* Primary PIO Slave Timing */
- If(And(BFFG, 0x01)) { /* Drive 0 is under UDMA mode */
- Store(Match(UDTT, MLE, DSD0, MTR, 0, 0), Local0)
- Divide(Local0, 7, PDMM,)
- Or(PDCR, 0x01, PDCR)
+ If (BFFG & 0x01) { /* Drive 0 is under UDMA mode */
+ Local0 = Match (UDTT, MLE, DSD0, MTR, 0, 0)
+ PDMM = Local0 % 7
+ PDCR |= 0x01
}
Else {
- If(LNotEqual(DSD0, 0xFFFFFFFF)) {
- Store(Match(MDTT, MLE, DSD0, MTR, 0, 0), Local0)
- Store(DerefOf(Index(MDRT, Local0)), PMTM)
+ If (DSD0 != 0xFFFFFFFF) {
+ Local0 = Match (MDTT, MLE, DSD0, MTR, 0, 0)
+ PMTM = DerefOf(MDRT [Local0])
}
}
- If(And(BFFG, 0x04)) { /* Drive 1 is under UDMA mode */
- Store(Match(UDTT, MLE, DSD1, MTR, 0, 0), Local0)
- Divide(Local0, 7, PDSM,)
- Or(PDCR, 0x02, PDCR)
+ If (BFFG & 0x04) { /* Drive 1 is under UDMA mode */
+ Local0 = Match (UDTT, MLE, DSD1, MTR, 0, 0)
+ PDSM = Local0 % 7
+ PDCR |= 0x02
}
Else {
- If(LNotEqual(DSD1, 0xFFFFFFFF)) {
- Store(Match(MDTT, MLE, DSD1, MTR, 0, 0), Local0)
- Store(DerefOf(Index(MDRT, Local0)), PMTS)
+ If (DSD1 != 0xFFFFFFFF) {
+ Local0 = Match (MDTT, MLE, DSD1, MTR, 0, 0)
+ PMTS = DerefOf(MDRT [Local0])
}
}
/* Return(INBF) */
@@ -168,21 +168,19 @@
CreateByteField(CMBF, 12, CMDB)
CreateByteField(CMBF, 19, CMDC)
- Store(0xA0, CMDA)
- Store(0xA0, CMDB)
- Store(0xA0, CMDC)
+ CMDA = 0xA0
+ CMDB = 0xA0
+ CMDC = 0xA0
- Or(PPMM, 0x08, POMD)
+ POMD = PPMM | 0x08
- If(And(PDCR, 0x01)) {
- Or(PDMM, 0x40, DMMD)
+ If (PDCR & 0x01) {
+ DMMD = PDMM | 0x40
}
Else {
- Store(Match
- (MDTT, MLE, GTTM(PMTM),
- MTR, 0, 0), Local0)
- If(LLess(Local0, 3)) {
- Or(0x20, Local0, DMMD)
+ Local0 = Match (MDTT, MLE, GTTM(PMTM), MTR, 0, 0)
+ If (Local0 < 3) {
+ DMMD = Local0 | 0x20
}
}
Return(CMBF)
@@ -204,21 +202,19 @@
CreateByteField(CMBF, 12, CMDB)
CreateByteField(CMBF, 19, CMDC)
- Store(0xB0, CMDA)
- Store(0xB0, CMDB)
- Store(0xB0, CMDC)
+ CMDA = 0xB0
+ CMDB = 0xB0
+ CMDC = 0xB0
- Or(PPSM, 0x08, POMD)
+ POMD = PPSM | 0x08
- If(And(PDCR, 0x02)) {
- Or(PDSM, 0x40, DMMD)
+ If (PDCR & 0x02) {
+ DMMD = PDSM | 0x40
}
Else {
- Store(Match
- (MDTT, MLE, GTTM(PMTS),
- MTR, 0, 0), Local0)
- If(LLess(Local0, 3)) {
- Or(0x20, Local0, DMMD)
+ Local0 = Match (MDTT, MLE, GTTM(PMTS), MTR, 0, 0)
+ If (Local0 < 3) {
+ DMMD = Local0 | 0x20
}
}
Return(CMBF)
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I2d9fbf8a163cff4151f73ea5fb7cdd0fd6eb6e91
Gerrit-Change-Number: 46043
Gerrit-PatchSet: 1
Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr>
Gerrit-MessageType: newchange
2
3
Change in coreboot[master]: mb/*/*/acpi: Convert usb_oc.asl to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 08 Oct '20
by HAOUAS Elyes (Code Review) 08 Oct '20
08 Oct '20
HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46025 )
Change subject: mb/*/*/acpi: Convert usb_oc.asl to ASL 2.0 syntax
......................................................................
mb/*/*/acpi: Convert usb_oc.asl to ASL 2.0 syntax
Change-Id: I07f8386abb2dd0c65e1fdd79bee05326c31e66e0
Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr>
---
M src/mainboard/amd/inagua/acpi/usb_oc.asl
M src/mainboard/amd/persimmon/acpi/usb_oc.asl
M src/mainboard/amd/south_station/acpi/usb_oc.asl
M src/mainboard/amd/union_station/acpi/usb_oc.asl
M src/mainboard/asrock/e350m1/acpi/usb_oc.asl
M src/mainboard/elmex/pcm205400/acpi/usb_oc.asl
M src/mainboard/gizmosphere/gizmo/acpi/usb_oc.asl
M src/mainboard/jetway/nf81-t56n-lf/acpi/usb_oc.asl
M src/mainboard/pcengines/apu1/acpi/usb_oc.asl
9 files changed, 369 insertions(+), 369 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/46025/1
diff --git a/src/mainboard/amd/inagua/acpi/usb_oc.asl b/src/mainboard/amd/inagua/acpi/usb_oc.asl
index 4ecc52a..e4ed275 100644
--- a/src/mainboard/amd/inagua/acpi/usb_oc.asl
+++ b/src/mainboard/amd/inagua/acpi/usb_oc.asl
@@ -14,134 +14,134 @@
Method(UCOC, 0) {
Sleep(20)
- Store(0x13,CMTI)
- Store(0,GPSL)
+ CMTI = 0x13
+ GPSL = 0
}
/* USB Port 0 overcurrent uses Gpm 0 */
-If(LLessEqual(UOM0,9)) {
+If (UOM0 <= 9) {
Scope (\_GPE) {
Method (_L13) {
UCOC()
- if(LEqual(GPB0,PLC0)) {
- Not(PLC0,PLC0)
- Store(PLC0, \_SB.PT0D)
+ if (GPB0 == PLC0) {
+ PLC0 = ~PLC0
+ \_SB.PT0D = PLC0
}
}
}
}
/* USB Port 1 overcurrent uses Gpm 1 */
-If (LLessEqual(UOM1,9)) {
+If (UOM1 <= 9) {
Scope (\_GPE) {
Method (_L14) {
UCOC()
- if (LEqual(GPB1,PLC1)) {
- Not(PLC1,PLC1)
- Store(PLC1, \_SB.PT1D)
+ if (GPB1 == PLC1) {
+ PLC1 = ~PLC1
+ \_SB.PT1D = PLC1
}
}
}
}
/* USB Port 2 overcurrent uses Gpm 2 */
-If (LLessEqual(UOM2,9)) {
+If (UOM2 <= 9) {
Scope (\_GPE) {
Method (_L15) {
UCOC()
- if (LEqual(GPB2,PLC2)) {
- Not(PLC2,PLC2)
- Store(PLC2, \_SB.PT2D)
+ if (GPB2 == PLC2) {
+ PLC2 = ~PLC2
+ \_SB.PT2D = PLC2
}
}
}
}
/* USB Port 3 overcurrent uses Gpm 3 */
-If (LLessEqual(UOM3,9)) {
+If (UOM3 <= 9) {
Scope (\_GPE) {
Method (_L16) {
UCOC()
- if (LEqual(GPB3,PLC3)) {
- Not(PLC3,PLC3)
- Store(PLC3, \_SB.PT3D)
+ if (GPB3 == PLC3) {
+ PLC3 = ~PLC3
+ \_SB.PT3D = PLC3
}
}
}
}
/* USB Port 4 overcurrent uses Gpm 4 */
-If (LLessEqual(UOM4,9)) {
+If (UOM4 <= 9) {
Scope (\_GPE) {
Method (_L19) {
UCOC()
- if (LEqual(GPB4,PLC4)) {
- Not(PLC4,PLC4)
- Store(PLC4, \_SB.PT4D)
+ if (GPB4 == PLC4) {
+ PLC4 = ~PLC4
+ \_SB.PT4D = PLC4
}
}
}
}
/* USB Port 5 overcurrent uses Gpm 5 */
-If (LLessEqual(UOM5,9)) {
+If (UOM5 <= 9) {
Scope (\_GPE) {
Method (_L1A) {
UCOC()
- if (LEqual(GPB5,PLC5)) {
- Not(PLC5,PLC5)
- Store(PLC5, \_SB.PT5D)
+ if (GPB5 == PLC5) {
+ PLC5 = ~PLC5
+ \_SB.PT5D = PLC5
}
}
}
}
/* USB Port 6 overcurrent uses Gpm 6 */
-If (LLessEqual(UOM6,9)) {
+If (UOM6 <= 9) {
Scope (\_GPE) {
/* Method (_L1C) { */
Method (_L06) {
UCOC()
- if (LEqual(GPB6,PLC6)) {
- Not(PLC6,PLC6)
- Store(PLC6, \_SB.PT6D)
+ if (GPB6 == PLC6) {
+ PLC6 = ~PLC6
+ \_SB.PT6D = PLC6
}
}
}
}
/* USB Port 7 overcurrent uses Gpm 7 */
-If (LLessEqual(UOM7,9)) {
+If (UOM7 <= 9) {
Scope (\_GPE) {
/* Method (_L1D) { */
Method (_L07) {
UCOC()
- if (LEqual(GPB7,PLC7)) {
- Not(PLC7,PLC7)
- Store(PLC7, \_SB.PT7D)
+ if (GPB7 == PLC7) {
+ PLC7 = ~PLC7
+ \_SB.PT7D = PLC7
}
}
}
}
/* USB Port 8 overcurrent uses Gpm 8 */
-If (LLessEqual(UOM8,9)) {
+If (UOM8 <= 9) {
Scope (\_GPE) {
Method (_L17) {
- if (LEqual(G8IS,PLC8)) {
- Not(PLC8,PLC8)
- Store(PLC8, \_SB.PT8D)
+ if (G8IS == PLC8) {
+ PLC8 = ~PLC8
+ \_SB.PT8D = PLC8
}
}
}
}
/* USB Port 9 overcurrent uses Gpm 9 */
-If (LLessEqual(UOM9,9)) {
+If (UOM9 <= 9) {
Scope (\_GPE) {
Method (_L0E) {
- if (LEqual(G9IS,0)) {
- Store(1,\_SB.PT9D)
+ if (G9IS == 0) {
+ \_SB.PT9D = 1
}
}
}
diff --git a/src/mainboard/amd/persimmon/acpi/usb_oc.asl b/src/mainboard/amd/persimmon/acpi/usb_oc.asl
index 4ecc52a..e4ed275 100644
--- a/src/mainboard/amd/persimmon/acpi/usb_oc.asl
+++ b/src/mainboard/amd/persimmon/acpi/usb_oc.asl
@@ -14,134 +14,134 @@
Method(UCOC, 0) {
Sleep(20)
- Store(0x13,CMTI)
- Store(0,GPSL)
+ CMTI = 0x13
+ GPSL = 0
}
/* USB Port 0 overcurrent uses Gpm 0 */
-If(LLessEqual(UOM0,9)) {
+If (UOM0 <= 9) {
Scope (\_GPE) {
Method (_L13) {
UCOC()
- if(LEqual(GPB0,PLC0)) {
- Not(PLC0,PLC0)
- Store(PLC0, \_SB.PT0D)
+ if (GPB0 == PLC0) {
+ PLC0 = ~PLC0
+ \_SB.PT0D = PLC0
}
}
}
}
/* USB Port 1 overcurrent uses Gpm 1 */
-If (LLessEqual(UOM1,9)) {
+If (UOM1 <= 9) {
Scope (\_GPE) {
Method (_L14) {
UCOC()
- if (LEqual(GPB1,PLC1)) {
- Not(PLC1,PLC1)
- Store(PLC1, \_SB.PT1D)
+ if (GPB1 == PLC1) {
+ PLC1 = ~PLC1
+ \_SB.PT1D = PLC1
}
}
}
}
/* USB Port 2 overcurrent uses Gpm 2 */
-If (LLessEqual(UOM2,9)) {
+If (UOM2 <= 9) {
Scope (\_GPE) {
Method (_L15) {
UCOC()
- if (LEqual(GPB2,PLC2)) {
- Not(PLC2,PLC2)
- Store(PLC2, \_SB.PT2D)
+ if (GPB2 == PLC2) {
+ PLC2 = ~PLC2
+ \_SB.PT2D = PLC2
}
}
}
}
/* USB Port 3 overcurrent uses Gpm 3 */
-If (LLessEqual(UOM3,9)) {
+If (UOM3 <= 9) {
Scope (\_GPE) {
Method (_L16) {
UCOC()
- if (LEqual(GPB3,PLC3)) {
- Not(PLC3,PLC3)
- Store(PLC3, \_SB.PT3D)
+ if (GPB3 == PLC3) {
+ PLC3 = ~PLC3
+ \_SB.PT3D = PLC3
}
}
}
}
/* USB Port 4 overcurrent uses Gpm 4 */
-If (LLessEqual(UOM4,9)) {
+If (UOM4 <= 9) {
Scope (\_GPE) {
Method (_L19) {
UCOC()
- if (LEqual(GPB4,PLC4)) {
- Not(PLC4,PLC4)
- Store(PLC4, \_SB.PT4D)
+ if (GPB4 == PLC4) {
+ PLC4 = ~PLC4
+ \_SB.PT4D = PLC4
}
}
}
}
/* USB Port 5 overcurrent uses Gpm 5 */
-If (LLessEqual(UOM5,9)) {
+If (UOM5 <= 9) {
Scope (\_GPE) {
Method (_L1A) {
UCOC()
- if (LEqual(GPB5,PLC5)) {
- Not(PLC5,PLC5)
- Store(PLC5, \_SB.PT5D)
+ if (GPB5 == PLC5) {
+ PLC5 = ~PLC5
+ \_SB.PT5D = PLC5
}
}
}
}
/* USB Port 6 overcurrent uses Gpm 6 */
-If (LLessEqual(UOM6,9)) {
+If (UOM6 <= 9) {
Scope (\_GPE) {
/* Method (_L1C) { */
Method (_L06) {
UCOC()
- if (LEqual(GPB6,PLC6)) {
- Not(PLC6,PLC6)
- Store(PLC6, \_SB.PT6D)
+ if (GPB6 == PLC6) {
+ PLC6 = ~PLC6
+ \_SB.PT6D = PLC6
}
}
}
}
/* USB Port 7 overcurrent uses Gpm 7 */
-If (LLessEqual(UOM7,9)) {
+If (UOM7 <= 9) {
Scope (\_GPE) {
/* Method (_L1D) { */
Method (_L07) {
UCOC()
- if (LEqual(GPB7,PLC7)) {
- Not(PLC7,PLC7)
- Store(PLC7, \_SB.PT7D)
+ if (GPB7 == PLC7) {
+ PLC7 = ~PLC7
+ \_SB.PT7D = PLC7
}
}
}
}
/* USB Port 8 overcurrent uses Gpm 8 */
-If (LLessEqual(UOM8,9)) {
+If (UOM8 <= 9) {
Scope (\_GPE) {
Method (_L17) {
- if (LEqual(G8IS,PLC8)) {
- Not(PLC8,PLC8)
- Store(PLC8, \_SB.PT8D)
+ if (G8IS == PLC8) {
+ PLC8 = ~PLC8
+ \_SB.PT8D = PLC8
}
}
}
}
/* USB Port 9 overcurrent uses Gpm 9 */
-If (LLessEqual(UOM9,9)) {
+If (UOM9 <= 9) {
Scope (\_GPE) {
Method (_L0E) {
- if (LEqual(G9IS,0)) {
- Store(1,\_SB.PT9D)
+ if (G9IS == 0) {
+ \_SB.PT9D = 1
}
}
}
diff --git a/src/mainboard/amd/south_station/acpi/usb_oc.asl b/src/mainboard/amd/south_station/acpi/usb_oc.asl
index 4ecc52a..e4ed275 100644
--- a/src/mainboard/amd/south_station/acpi/usb_oc.asl
+++ b/src/mainboard/amd/south_station/acpi/usb_oc.asl
@@ -14,134 +14,134 @@
Method(UCOC, 0) {
Sleep(20)
- Store(0x13,CMTI)
- Store(0,GPSL)
+ CMTI = 0x13
+ GPSL = 0
}
/* USB Port 0 overcurrent uses Gpm 0 */
-If(LLessEqual(UOM0,9)) {
+If (UOM0 <= 9) {
Scope (\_GPE) {
Method (_L13) {
UCOC()
- if(LEqual(GPB0,PLC0)) {
- Not(PLC0,PLC0)
- Store(PLC0, \_SB.PT0D)
+ if (GPB0 == PLC0) {
+ PLC0 = ~PLC0
+ \_SB.PT0D = PLC0
}
}
}
}
/* USB Port 1 overcurrent uses Gpm 1 */
-If (LLessEqual(UOM1,9)) {
+If (UOM1 <= 9) {
Scope (\_GPE) {
Method (_L14) {
UCOC()
- if (LEqual(GPB1,PLC1)) {
- Not(PLC1,PLC1)
- Store(PLC1, \_SB.PT1D)
+ if (GPB1 == PLC1) {
+ PLC1 = ~PLC1
+ \_SB.PT1D = PLC1
}
}
}
}
/* USB Port 2 overcurrent uses Gpm 2 */
-If (LLessEqual(UOM2,9)) {
+If (UOM2 <= 9) {
Scope (\_GPE) {
Method (_L15) {
UCOC()
- if (LEqual(GPB2,PLC2)) {
- Not(PLC2,PLC2)
- Store(PLC2, \_SB.PT2D)
+ if (GPB2 == PLC2) {
+ PLC2 = ~PLC2
+ \_SB.PT2D = PLC2
}
}
}
}
/* USB Port 3 overcurrent uses Gpm 3 */
-If (LLessEqual(UOM3,9)) {
+If (UOM3 <= 9) {
Scope (\_GPE) {
Method (_L16) {
UCOC()
- if (LEqual(GPB3,PLC3)) {
- Not(PLC3,PLC3)
- Store(PLC3, \_SB.PT3D)
+ if (GPB3 == PLC3) {
+ PLC3 = ~PLC3
+ \_SB.PT3D = PLC3
}
}
}
}
/* USB Port 4 overcurrent uses Gpm 4 */
-If (LLessEqual(UOM4,9)) {
+If (UOM4 <= 9) {
Scope (\_GPE) {
Method (_L19) {
UCOC()
- if (LEqual(GPB4,PLC4)) {
- Not(PLC4,PLC4)
- Store(PLC4, \_SB.PT4D)
+ if (GPB4 == PLC4) {
+ PLC4 = ~PLC4
+ \_SB.PT4D = PLC4
}
}
}
}
/* USB Port 5 overcurrent uses Gpm 5 */
-If (LLessEqual(UOM5,9)) {
+If (UOM5 <= 9) {
Scope (\_GPE) {
Method (_L1A) {
UCOC()
- if (LEqual(GPB5,PLC5)) {
- Not(PLC5,PLC5)
- Store(PLC5, \_SB.PT5D)
+ if (GPB5 == PLC5) {
+ PLC5 = ~PLC5
+ \_SB.PT5D = PLC5
}
}
}
}
/* USB Port 6 overcurrent uses Gpm 6 */
-If (LLessEqual(UOM6,9)) {
+If (UOM6 <= 9) {
Scope (\_GPE) {
/* Method (_L1C) { */
Method (_L06) {
UCOC()
- if (LEqual(GPB6,PLC6)) {
- Not(PLC6,PLC6)
- Store(PLC6, \_SB.PT6D)
+ if (GPB6 == PLC6) {
+ PLC6 = ~PLC6
+ \_SB.PT6D = PLC6
}
}
}
}
/* USB Port 7 overcurrent uses Gpm 7 */
-If (LLessEqual(UOM7,9)) {
+If (UOM7 <= 9) {
Scope (\_GPE) {
/* Method (_L1D) { */
Method (_L07) {
UCOC()
- if (LEqual(GPB7,PLC7)) {
- Not(PLC7,PLC7)
- Store(PLC7, \_SB.PT7D)
+ if (GPB7 == PLC7) {
+ PLC7 = ~PLC7
+ \_SB.PT7D = PLC7
}
}
}
}
/* USB Port 8 overcurrent uses Gpm 8 */
-If (LLessEqual(UOM8,9)) {
+If (UOM8 <= 9) {
Scope (\_GPE) {
Method (_L17) {
- if (LEqual(G8IS,PLC8)) {
- Not(PLC8,PLC8)
- Store(PLC8, \_SB.PT8D)
+ if (G8IS == PLC8) {
+ PLC8 = ~PLC8
+ \_SB.PT8D = PLC8
}
}
}
}
/* USB Port 9 overcurrent uses Gpm 9 */
-If (LLessEqual(UOM9,9)) {
+If (UOM9 <= 9) {
Scope (\_GPE) {
Method (_L0E) {
- if (LEqual(G9IS,0)) {
- Store(1,\_SB.PT9D)
+ if (G9IS == 0) {
+ \_SB.PT9D = 1
}
}
}
diff --git a/src/mainboard/amd/union_station/acpi/usb_oc.asl b/src/mainboard/amd/union_station/acpi/usb_oc.asl
index 4ecc52a..e4ed275 100644
--- a/src/mainboard/amd/union_station/acpi/usb_oc.asl
+++ b/src/mainboard/amd/union_station/acpi/usb_oc.asl
@@ -14,134 +14,134 @@
Method(UCOC, 0) {
Sleep(20)
- Store(0x13,CMTI)
- Store(0,GPSL)
+ CMTI = 0x13
+ GPSL = 0
}
/* USB Port 0 overcurrent uses Gpm 0 */
-If(LLessEqual(UOM0,9)) {
+If (UOM0 <= 9) {
Scope (\_GPE) {
Method (_L13) {
UCOC()
- if(LEqual(GPB0,PLC0)) {
- Not(PLC0,PLC0)
- Store(PLC0, \_SB.PT0D)
+ if (GPB0 == PLC0) {
+ PLC0 = ~PLC0
+ \_SB.PT0D = PLC0
}
}
}
}
/* USB Port 1 overcurrent uses Gpm 1 */
-If (LLessEqual(UOM1,9)) {
+If (UOM1 <= 9) {
Scope (\_GPE) {
Method (_L14) {
UCOC()
- if (LEqual(GPB1,PLC1)) {
- Not(PLC1,PLC1)
- Store(PLC1, \_SB.PT1D)
+ if (GPB1 == PLC1) {
+ PLC1 = ~PLC1
+ \_SB.PT1D = PLC1
}
}
}
}
/* USB Port 2 overcurrent uses Gpm 2 */
-If (LLessEqual(UOM2,9)) {
+If (UOM2 <= 9) {
Scope (\_GPE) {
Method (_L15) {
UCOC()
- if (LEqual(GPB2,PLC2)) {
- Not(PLC2,PLC2)
- Store(PLC2, \_SB.PT2D)
+ if (GPB2 == PLC2) {
+ PLC2 = ~PLC2
+ \_SB.PT2D = PLC2
}
}
}
}
/* USB Port 3 overcurrent uses Gpm 3 */
-If (LLessEqual(UOM3,9)) {
+If (UOM3 <= 9) {
Scope (\_GPE) {
Method (_L16) {
UCOC()
- if (LEqual(GPB3,PLC3)) {
- Not(PLC3,PLC3)
- Store(PLC3, \_SB.PT3D)
+ if (GPB3 == PLC3) {
+ PLC3 = ~PLC3
+ \_SB.PT3D = PLC3
}
}
}
}
/* USB Port 4 overcurrent uses Gpm 4 */
-If (LLessEqual(UOM4,9)) {
+If (UOM4 <= 9) {
Scope (\_GPE) {
Method (_L19) {
UCOC()
- if (LEqual(GPB4,PLC4)) {
- Not(PLC4,PLC4)
- Store(PLC4, \_SB.PT4D)
+ if (GPB4 == PLC4) {
+ PLC4 = ~PLC4
+ \_SB.PT4D = PLC4
}
}
}
}
/* USB Port 5 overcurrent uses Gpm 5 */
-If (LLessEqual(UOM5,9)) {
+If (UOM5 <= 9) {
Scope (\_GPE) {
Method (_L1A) {
UCOC()
- if (LEqual(GPB5,PLC5)) {
- Not(PLC5,PLC5)
- Store(PLC5, \_SB.PT5D)
+ if (GPB5 == PLC5) {
+ PLC5 = ~PLC5
+ \_SB.PT5D = PLC5
}
}
}
}
/* USB Port 6 overcurrent uses Gpm 6 */
-If (LLessEqual(UOM6,9)) {
+If (UOM6 <= 9) {
Scope (\_GPE) {
/* Method (_L1C) { */
Method (_L06) {
UCOC()
- if (LEqual(GPB6,PLC6)) {
- Not(PLC6,PLC6)
- Store(PLC6, \_SB.PT6D)
+ if (GPB6 == PLC6) {
+ PLC6 = ~PLC6
+ \_SB.PT6D = PLC6
}
}
}
}
/* USB Port 7 overcurrent uses Gpm 7 */
-If (LLessEqual(UOM7,9)) {
+If (UOM7 <= 9) {
Scope (\_GPE) {
/* Method (_L1D) { */
Method (_L07) {
UCOC()
- if (LEqual(GPB7,PLC7)) {
- Not(PLC7,PLC7)
- Store(PLC7, \_SB.PT7D)
+ if (GPB7 == PLC7) {
+ PLC7 = ~PLC7
+ \_SB.PT7D = PLC7
}
}
}
}
/* USB Port 8 overcurrent uses Gpm 8 */
-If (LLessEqual(UOM8,9)) {
+If (UOM8 <= 9) {
Scope (\_GPE) {
Method (_L17) {
- if (LEqual(G8IS,PLC8)) {
- Not(PLC8,PLC8)
- Store(PLC8, \_SB.PT8D)
+ if (G8IS == PLC8) {
+ PLC8 = ~PLC8
+ \_SB.PT8D = PLC8
}
}
}
}
/* USB Port 9 overcurrent uses Gpm 9 */
-If (LLessEqual(UOM9,9)) {
+If (UOM9 <= 9) {
Scope (\_GPE) {
Method (_L0E) {
- if (LEqual(G9IS,0)) {
- Store(1,\_SB.PT9D)
+ if (G9IS == 0) {
+ \_SB.PT9D = 1
}
}
}
diff --git a/src/mainboard/asrock/e350m1/acpi/usb_oc.asl b/src/mainboard/asrock/e350m1/acpi/usb_oc.asl
index 4ecc52a..e4ed275 100644
--- a/src/mainboard/asrock/e350m1/acpi/usb_oc.asl
+++ b/src/mainboard/asrock/e350m1/acpi/usb_oc.asl
@@ -14,134 +14,134 @@
Method(UCOC, 0) {
Sleep(20)
- Store(0x13,CMTI)
- Store(0,GPSL)
+ CMTI = 0x13
+ GPSL = 0
}
/* USB Port 0 overcurrent uses Gpm 0 */
-If(LLessEqual(UOM0,9)) {
+If (UOM0 <= 9) {
Scope (\_GPE) {
Method (_L13) {
UCOC()
- if(LEqual(GPB0,PLC0)) {
- Not(PLC0,PLC0)
- Store(PLC0, \_SB.PT0D)
+ if (GPB0 == PLC0) {
+ PLC0 = ~PLC0
+ \_SB.PT0D = PLC0
}
}
}
}
/* USB Port 1 overcurrent uses Gpm 1 */
-If (LLessEqual(UOM1,9)) {
+If (UOM1 <= 9) {
Scope (\_GPE) {
Method (_L14) {
UCOC()
- if (LEqual(GPB1,PLC1)) {
- Not(PLC1,PLC1)
- Store(PLC1, \_SB.PT1D)
+ if (GPB1 == PLC1) {
+ PLC1 = ~PLC1
+ \_SB.PT1D = PLC1
}
}
}
}
/* USB Port 2 overcurrent uses Gpm 2 */
-If (LLessEqual(UOM2,9)) {
+If (UOM2 <= 9) {
Scope (\_GPE) {
Method (_L15) {
UCOC()
- if (LEqual(GPB2,PLC2)) {
- Not(PLC2,PLC2)
- Store(PLC2, \_SB.PT2D)
+ if (GPB2 == PLC2) {
+ PLC2 = ~PLC2
+ \_SB.PT2D = PLC2
}
}
}
}
/* USB Port 3 overcurrent uses Gpm 3 */
-If (LLessEqual(UOM3,9)) {
+If (UOM3 <= 9) {
Scope (\_GPE) {
Method (_L16) {
UCOC()
- if (LEqual(GPB3,PLC3)) {
- Not(PLC3,PLC3)
- Store(PLC3, \_SB.PT3D)
+ if (GPB3 == PLC3) {
+ PLC3 = ~PLC3
+ \_SB.PT3D = PLC3
}
}
}
}
/* USB Port 4 overcurrent uses Gpm 4 */
-If (LLessEqual(UOM4,9)) {
+If (UOM4 <= 9) {
Scope (\_GPE) {
Method (_L19) {
UCOC()
- if (LEqual(GPB4,PLC4)) {
- Not(PLC4,PLC4)
- Store(PLC4, \_SB.PT4D)
+ if (GPB4 == PLC4) {
+ PLC4 = ~PLC4
+ \_SB.PT4D = PLC4
}
}
}
}
/* USB Port 5 overcurrent uses Gpm 5 */
-If (LLessEqual(UOM5,9)) {
+If (UOM5 <= 9) {
Scope (\_GPE) {
Method (_L1A) {
UCOC()
- if (LEqual(GPB5,PLC5)) {
- Not(PLC5,PLC5)
- Store(PLC5, \_SB.PT5D)
+ if (GPB5 == PLC5) {
+ PLC5 = ~PLC5
+ \_SB.PT5D = PLC5
}
}
}
}
/* USB Port 6 overcurrent uses Gpm 6 */
-If (LLessEqual(UOM6,9)) {
+If (UOM6 <= 9) {
Scope (\_GPE) {
/* Method (_L1C) { */
Method (_L06) {
UCOC()
- if (LEqual(GPB6,PLC6)) {
- Not(PLC6,PLC6)
- Store(PLC6, \_SB.PT6D)
+ if (GPB6 == PLC6) {
+ PLC6 = ~PLC6
+ \_SB.PT6D = PLC6
}
}
}
}
/* USB Port 7 overcurrent uses Gpm 7 */
-If (LLessEqual(UOM7,9)) {
+If (UOM7 <= 9) {
Scope (\_GPE) {
/* Method (_L1D) { */
Method (_L07) {
UCOC()
- if (LEqual(GPB7,PLC7)) {
- Not(PLC7,PLC7)
- Store(PLC7, \_SB.PT7D)
+ if (GPB7 == PLC7) {
+ PLC7 = ~PLC7
+ \_SB.PT7D = PLC7
}
}
}
}
/* USB Port 8 overcurrent uses Gpm 8 */
-If (LLessEqual(UOM8,9)) {
+If (UOM8 <= 9) {
Scope (\_GPE) {
Method (_L17) {
- if (LEqual(G8IS,PLC8)) {
- Not(PLC8,PLC8)
- Store(PLC8, \_SB.PT8D)
+ if (G8IS == PLC8) {
+ PLC8 = ~PLC8
+ \_SB.PT8D = PLC8
}
}
}
}
/* USB Port 9 overcurrent uses Gpm 9 */
-If (LLessEqual(UOM9,9)) {
+If (UOM9 <= 9) {
Scope (\_GPE) {
Method (_L0E) {
- if (LEqual(G9IS,0)) {
- Store(1,\_SB.PT9D)
+ if (G9IS == 0) {
+ \_SB.PT9D = 1
}
}
}
diff --git a/src/mainboard/elmex/pcm205400/acpi/usb_oc.asl b/src/mainboard/elmex/pcm205400/acpi/usb_oc.asl
index 4ecc52a..e4ed275 100644
--- a/src/mainboard/elmex/pcm205400/acpi/usb_oc.asl
+++ b/src/mainboard/elmex/pcm205400/acpi/usb_oc.asl
@@ -14,134 +14,134 @@
Method(UCOC, 0) {
Sleep(20)
- Store(0x13,CMTI)
- Store(0,GPSL)
+ CMTI = 0x13
+ GPSL = 0
}
/* USB Port 0 overcurrent uses Gpm 0 */
-If(LLessEqual(UOM0,9)) {
+If (UOM0 <= 9) {
Scope (\_GPE) {
Method (_L13) {
UCOC()
- if(LEqual(GPB0,PLC0)) {
- Not(PLC0,PLC0)
- Store(PLC0, \_SB.PT0D)
+ if (GPB0 == PLC0) {
+ PLC0 = ~PLC0
+ \_SB.PT0D = PLC0
}
}
}
}
/* USB Port 1 overcurrent uses Gpm 1 */
-If (LLessEqual(UOM1,9)) {
+If (UOM1 <= 9) {
Scope (\_GPE) {
Method (_L14) {
UCOC()
- if (LEqual(GPB1,PLC1)) {
- Not(PLC1,PLC1)
- Store(PLC1, \_SB.PT1D)
+ if (GPB1 == PLC1) {
+ PLC1 = ~PLC1
+ \_SB.PT1D = PLC1
}
}
}
}
/* USB Port 2 overcurrent uses Gpm 2 */
-If (LLessEqual(UOM2,9)) {
+If (UOM2 <= 9) {
Scope (\_GPE) {
Method (_L15) {
UCOC()
- if (LEqual(GPB2,PLC2)) {
- Not(PLC2,PLC2)
- Store(PLC2, \_SB.PT2D)
+ if (GPB2 == PLC2) {
+ PLC2 = ~PLC2
+ \_SB.PT2D = PLC2
}
}
}
}
/* USB Port 3 overcurrent uses Gpm 3 */
-If (LLessEqual(UOM3,9)) {
+If (UOM3 <= 9) {
Scope (\_GPE) {
Method (_L16) {
UCOC()
- if (LEqual(GPB3,PLC3)) {
- Not(PLC3,PLC3)
- Store(PLC3, \_SB.PT3D)
+ if (GPB3 == PLC3) {
+ PLC3 = ~PLC3
+ \_SB.PT3D = PLC3
}
}
}
}
/* USB Port 4 overcurrent uses Gpm 4 */
-If (LLessEqual(UOM4,9)) {
+If (UOM4 <= 9) {
Scope (\_GPE) {
Method (_L19) {
UCOC()
- if (LEqual(GPB4,PLC4)) {
- Not(PLC4,PLC4)
- Store(PLC4, \_SB.PT4D)
+ if (GPB4 == PLC4) {
+ PLC4 = ~PLC4
+ \_SB.PT4D = PLC4
}
}
}
}
/* USB Port 5 overcurrent uses Gpm 5 */
-If (LLessEqual(UOM5,9)) {
+If (UOM5 <= 9) {
Scope (\_GPE) {
Method (_L1A) {
UCOC()
- if (LEqual(GPB5,PLC5)) {
- Not(PLC5,PLC5)
- Store(PLC5, \_SB.PT5D)
+ if (GPB5 == PLC5) {
+ PLC5 = ~PLC5
+ \_SB.PT5D = PLC5
}
}
}
}
/* USB Port 6 overcurrent uses Gpm 6 */
-If (LLessEqual(UOM6,9)) {
+If (UOM6 <= 9) {
Scope (\_GPE) {
/* Method (_L1C) { */
Method (_L06) {
UCOC()
- if (LEqual(GPB6,PLC6)) {
- Not(PLC6,PLC6)
- Store(PLC6, \_SB.PT6D)
+ if (GPB6 == PLC6) {
+ PLC6 = ~PLC6
+ \_SB.PT6D = PLC6
}
}
}
}
/* USB Port 7 overcurrent uses Gpm 7 */
-If (LLessEqual(UOM7,9)) {
+If (UOM7 <= 9) {
Scope (\_GPE) {
/* Method (_L1D) { */
Method (_L07) {
UCOC()
- if (LEqual(GPB7,PLC7)) {
- Not(PLC7,PLC7)
- Store(PLC7, \_SB.PT7D)
+ if (GPB7 == PLC7) {
+ PLC7 = ~PLC7
+ \_SB.PT7D = PLC7
}
}
}
}
/* USB Port 8 overcurrent uses Gpm 8 */
-If (LLessEqual(UOM8,9)) {
+If (UOM8 <= 9) {
Scope (\_GPE) {
Method (_L17) {
- if (LEqual(G8IS,PLC8)) {
- Not(PLC8,PLC8)
- Store(PLC8, \_SB.PT8D)
+ if (G8IS == PLC8) {
+ PLC8 = ~PLC8
+ \_SB.PT8D = PLC8
}
}
}
}
/* USB Port 9 overcurrent uses Gpm 9 */
-If (LLessEqual(UOM9,9)) {
+If (UOM9 <= 9) {
Scope (\_GPE) {
Method (_L0E) {
- if (LEqual(G9IS,0)) {
- Store(1,\_SB.PT9D)
+ if (G9IS == 0) {
+ \_SB.PT9D = 1
}
}
}
diff --git a/src/mainboard/gizmosphere/gizmo/acpi/usb_oc.asl b/src/mainboard/gizmosphere/gizmo/acpi/usb_oc.asl
index 4ecc52a..e4ed275 100644
--- a/src/mainboard/gizmosphere/gizmo/acpi/usb_oc.asl
+++ b/src/mainboard/gizmosphere/gizmo/acpi/usb_oc.asl
@@ -14,134 +14,134 @@
Method(UCOC, 0) {
Sleep(20)
- Store(0x13,CMTI)
- Store(0,GPSL)
+ CMTI = 0x13
+ GPSL = 0
}
/* USB Port 0 overcurrent uses Gpm 0 */
-If(LLessEqual(UOM0,9)) {
+If (UOM0 <= 9) {
Scope (\_GPE) {
Method (_L13) {
UCOC()
- if(LEqual(GPB0,PLC0)) {
- Not(PLC0,PLC0)
- Store(PLC0, \_SB.PT0D)
+ if (GPB0 == PLC0) {
+ PLC0 = ~PLC0
+ \_SB.PT0D = PLC0
}
}
}
}
/* USB Port 1 overcurrent uses Gpm 1 */
-If (LLessEqual(UOM1,9)) {
+If (UOM1 <= 9) {
Scope (\_GPE) {
Method (_L14) {
UCOC()
- if (LEqual(GPB1,PLC1)) {
- Not(PLC1,PLC1)
- Store(PLC1, \_SB.PT1D)
+ if (GPB1 == PLC1) {
+ PLC1 = ~PLC1
+ \_SB.PT1D = PLC1
}
}
}
}
/* USB Port 2 overcurrent uses Gpm 2 */
-If (LLessEqual(UOM2,9)) {
+If (UOM2 <= 9) {
Scope (\_GPE) {
Method (_L15) {
UCOC()
- if (LEqual(GPB2,PLC2)) {
- Not(PLC2,PLC2)
- Store(PLC2, \_SB.PT2D)
+ if (GPB2 == PLC2) {
+ PLC2 = ~PLC2
+ \_SB.PT2D = PLC2
}
}
}
}
/* USB Port 3 overcurrent uses Gpm 3 */
-If (LLessEqual(UOM3,9)) {
+If (UOM3 <= 9) {
Scope (\_GPE) {
Method (_L16) {
UCOC()
- if (LEqual(GPB3,PLC3)) {
- Not(PLC3,PLC3)
- Store(PLC3, \_SB.PT3D)
+ if (GPB3 == PLC3) {
+ PLC3 = ~PLC3
+ \_SB.PT3D = PLC3
}
}
}
}
/* USB Port 4 overcurrent uses Gpm 4 */
-If (LLessEqual(UOM4,9)) {
+If (UOM4 <= 9) {
Scope (\_GPE) {
Method (_L19) {
UCOC()
- if (LEqual(GPB4,PLC4)) {
- Not(PLC4,PLC4)
- Store(PLC4, \_SB.PT4D)
+ if (GPB4 == PLC4) {
+ PLC4 = ~PLC4
+ \_SB.PT4D = PLC4
}
}
}
}
/* USB Port 5 overcurrent uses Gpm 5 */
-If (LLessEqual(UOM5,9)) {
+If (UOM5 <= 9) {
Scope (\_GPE) {
Method (_L1A) {
UCOC()
- if (LEqual(GPB5,PLC5)) {
- Not(PLC5,PLC5)
- Store(PLC5, \_SB.PT5D)
+ if (GPB5 == PLC5) {
+ PLC5 = ~PLC5
+ \_SB.PT5D = PLC5
}
}
}
}
/* USB Port 6 overcurrent uses Gpm 6 */
-If (LLessEqual(UOM6,9)) {
+If (UOM6 <= 9) {
Scope (\_GPE) {
/* Method (_L1C) { */
Method (_L06) {
UCOC()
- if (LEqual(GPB6,PLC6)) {
- Not(PLC6,PLC6)
- Store(PLC6, \_SB.PT6D)
+ if (GPB6 == PLC6) {
+ PLC6 = ~PLC6
+ \_SB.PT6D = PLC6
}
}
}
}
/* USB Port 7 overcurrent uses Gpm 7 */
-If (LLessEqual(UOM7,9)) {
+If (UOM7 <= 9) {
Scope (\_GPE) {
/* Method (_L1D) { */
Method (_L07) {
UCOC()
- if (LEqual(GPB7,PLC7)) {
- Not(PLC7,PLC7)
- Store(PLC7, \_SB.PT7D)
+ if (GPB7 == PLC7) {
+ PLC7 = ~PLC7
+ \_SB.PT7D = PLC7
}
}
}
}
/* USB Port 8 overcurrent uses Gpm 8 */
-If (LLessEqual(UOM8,9)) {
+If (UOM8 <= 9) {
Scope (\_GPE) {
Method (_L17) {
- if (LEqual(G8IS,PLC8)) {
- Not(PLC8,PLC8)
- Store(PLC8, \_SB.PT8D)
+ if (G8IS == PLC8) {
+ PLC8 = ~PLC8
+ \_SB.PT8D = PLC8
}
}
}
}
/* USB Port 9 overcurrent uses Gpm 9 */
-If (LLessEqual(UOM9,9)) {
+If (UOM9 <= 9) {
Scope (\_GPE) {
Method (_L0E) {
- if (LEqual(G9IS,0)) {
- Store(1,\_SB.PT9D)
+ if (G9IS == 0) {
+ \_SB.PT9D = 1
}
}
}
diff --git a/src/mainboard/jetway/nf81-t56n-lf/acpi/usb_oc.asl b/src/mainboard/jetway/nf81-t56n-lf/acpi/usb_oc.asl
index 4ecc52a..e4ed275 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/acpi/usb_oc.asl
+++ b/src/mainboard/jetway/nf81-t56n-lf/acpi/usb_oc.asl
@@ -14,134 +14,134 @@
Method(UCOC, 0) {
Sleep(20)
- Store(0x13,CMTI)
- Store(0,GPSL)
+ CMTI = 0x13
+ GPSL = 0
}
/* USB Port 0 overcurrent uses Gpm 0 */
-If(LLessEqual(UOM0,9)) {
+If (UOM0 <= 9) {
Scope (\_GPE) {
Method (_L13) {
UCOC()
- if(LEqual(GPB0,PLC0)) {
- Not(PLC0,PLC0)
- Store(PLC0, \_SB.PT0D)
+ if (GPB0 == PLC0) {
+ PLC0 = ~PLC0
+ \_SB.PT0D = PLC0
}
}
}
}
/* USB Port 1 overcurrent uses Gpm 1 */
-If (LLessEqual(UOM1,9)) {
+If (UOM1 <= 9) {
Scope (\_GPE) {
Method (_L14) {
UCOC()
- if (LEqual(GPB1,PLC1)) {
- Not(PLC1,PLC1)
- Store(PLC1, \_SB.PT1D)
+ if (GPB1 == PLC1) {
+ PLC1 = ~PLC1
+ \_SB.PT1D = PLC1
}
}
}
}
/* USB Port 2 overcurrent uses Gpm 2 */
-If (LLessEqual(UOM2,9)) {
+If (UOM2 <= 9) {
Scope (\_GPE) {
Method (_L15) {
UCOC()
- if (LEqual(GPB2,PLC2)) {
- Not(PLC2,PLC2)
- Store(PLC2, \_SB.PT2D)
+ if (GPB2 == PLC2) {
+ PLC2 = ~PLC2
+ \_SB.PT2D = PLC2
}
}
}
}
/* USB Port 3 overcurrent uses Gpm 3 */
-If (LLessEqual(UOM3,9)) {
+If (UOM3 <= 9) {
Scope (\_GPE) {
Method (_L16) {
UCOC()
- if (LEqual(GPB3,PLC3)) {
- Not(PLC3,PLC3)
- Store(PLC3, \_SB.PT3D)
+ if (GPB3 == PLC3) {
+ PLC3 = ~PLC3
+ \_SB.PT3D = PLC3
}
}
}
}
/* USB Port 4 overcurrent uses Gpm 4 */
-If (LLessEqual(UOM4,9)) {
+If (UOM4 <= 9) {
Scope (\_GPE) {
Method (_L19) {
UCOC()
- if (LEqual(GPB4,PLC4)) {
- Not(PLC4,PLC4)
- Store(PLC4, \_SB.PT4D)
+ if (GPB4 == PLC4) {
+ PLC4 = ~PLC4
+ \_SB.PT4D = PLC4
}
}
}
}
/* USB Port 5 overcurrent uses Gpm 5 */
-If (LLessEqual(UOM5,9)) {
+If (UOM5 <= 9) {
Scope (\_GPE) {
Method (_L1A) {
UCOC()
- if (LEqual(GPB5,PLC5)) {
- Not(PLC5,PLC5)
- Store(PLC5, \_SB.PT5D)
+ if (GPB5 == PLC5) {
+ PLC5 = ~PLC5
+ \_SB.PT5D = PLC5
}
}
}
}
/* USB Port 6 overcurrent uses Gpm 6 */
-If (LLessEqual(UOM6,9)) {
+If (UOM6 <= 9) {
Scope (\_GPE) {
/* Method (_L1C) { */
Method (_L06) {
UCOC()
- if (LEqual(GPB6,PLC6)) {
- Not(PLC6,PLC6)
- Store(PLC6, \_SB.PT6D)
+ if (GPB6 == PLC6) {
+ PLC6 = ~PLC6
+ \_SB.PT6D = PLC6
}
}
}
}
/* USB Port 7 overcurrent uses Gpm 7 */
-If (LLessEqual(UOM7,9)) {
+If (UOM7 <= 9) {
Scope (\_GPE) {
/* Method (_L1D) { */
Method (_L07) {
UCOC()
- if (LEqual(GPB7,PLC7)) {
- Not(PLC7,PLC7)
- Store(PLC7, \_SB.PT7D)
+ if (GPB7 == PLC7) {
+ PLC7 = ~PLC7
+ \_SB.PT7D = PLC7
}
}
}
}
/* USB Port 8 overcurrent uses Gpm 8 */
-If (LLessEqual(UOM8,9)) {
+If (UOM8 <= 9) {
Scope (\_GPE) {
Method (_L17) {
- if (LEqual(G8IS,PLC8)) {
- Not(PLC8,PLC8)
- Store(PLC8, \_SB.PT8D)
+ if (G8IS == PLC8) {
+ PLC8 = ~PLC8
+ \_SB.PT8D = PLC8
}
}
}
}
/* USB Port 9 overcurrent uses Gpm 9 */
-If (LLessEqual(UOM9,9)) {
+If (UOM9 <= 9) {
Scope (\_GPE) {
Method (_L0E) {
- if (LEqual(G9IS,0)) {
- Store(1,\_SB.PT9D)
+ if (G9IS == 0) {
+ \_SB.PT9D = 1
}
}
}
diff --git a/src/mainboard/pcengines/apu1/acpi/usb_oc.asl b/src/mainboard/pcengines/apu1/acpi/usb_oc.asl
index 4ecc52a..e4ed275 100644
--- a/src/mainboard/pcengines/apu1/acpi/usb_oc.asl
+++ b/src/mainboard/pcengines/apu1/acpi/usb_oc.asl
@@ -14,134 +14,134 @@
Method(UCOC, 0) {
Sleep(20)
- Store(0x13,CMTI)
- Store(0,GPSL)
+ CMTI = 0x13
+ GPSL = 0
}
/* USB Port 0 overcurrent uses Gpm 0 */
-If(LLessEqual(UOM0,9)) {
+If (UOM0 <= 9) {
Scope (\_GPE) {
Method (_L13) {
UCOC()
- if(LEqual(GPB0,PLC0)) {
- Not(PLC0,PLC0)
- Store(PLC0, \_SB.PT0D)
+ if (GPB0 == PLC0) {
+ PLC0 = ~PLC0
+ \_SB.PT0D = PLC0
}
}
}
}
/* USB Port 1 overcurrent uses Gpm 1 */
-If (LLessEqual(UOM1,9)) {
+If (UOM1 <= 9) {
Scope (\_GPE) {
Method (_L14) {
UCOC()
- if (LEqual(GPB1,PLC1)) {
- Not(PLC1,PLC1)
- Store(PLC1, \_SB.PT1D)
+ if (GPB1 == PLC1) {
+ PLC1 = ~PLC1
+ \_SB.PT1D = PLC1
}
}
}
}
/* USB Port 2 overcurrent uses Gpm 2 */
-If (LLessEqual(UOM2,9)) {
+If (UOM2 <= 9) {
Scope (\_GPE) {
Method (_L15) {
UCOC()
- if (LEqual(GPB2,PLC2)) {
- Not(PLC2,PLC2)
- Store(PLC2, \_SB.PT2D)
+ if (GPB2 == PLC2) {
+ PLC2 = ~PLC2
+ \_SB.PT2D = PLC2
}
}
}
}
/* USB Port 3 overcurrent uses Gpm 3 */
-If (LLessEqual(UOM3,9)) {
+If (UOM3 <= 9) {
Scope (\_GPE) {
Method (_L16) {
UCOC()
- if (LEqual(GPB3,PLC3)) {
- Not(PLC3,PLC3)
- Store(PLC3, \_SB.PT3D)
+ if (GPB3 == PLC3) {
+ PLC3 = ~PLC3
+ \_SB.PT3D = PLC3
}
}
}
}
/* USB Port 4 overcurrent uses Gpm 4 */
-If (LLessEqual(UOM4,9)) {
+If (UOM4 <= 9) {
Scope (\_GPE) {
Method (_L19) {
UCOC()
- if (LEqual(GPB4,PLC4)) {
- Not(PLC4,PLC4)
- Store(PLC4, \_SB.PT4D)
+ if (GPB4 == PLC4) {
+ PLC4 = ~PLC4
+ \_SB.PT4D = PLC4
}
}
}
}
/* USB Port 5 overcurrent uses Gpm 5 */
-If (LLessEqual(UOM5,9)) {
+If (UOM5 <= 9) {
Scope (\_GPE) {
Method (_L1A) {
UCOC()
- if (LEqual(GPB5,PLC5)) {
- Not(PLC5,PLC5)
- Store(PLC5, \_SB.PT5D)
+ if (GPB5 == PLC5) {
+ PLC5 = ~PLC5
+ \_SB.PT5D = PLC5
}
}
}
}
/* USB Port 6 overcurrent uses Gpm 6 */
-If (LLessEqual(UOM6,9)) {
+If (UOM6 <= 9) {
Scope (\_GPE) {
/* Method (_L1C) { */
Method (_L06) {
UCOC()
- if (LEqual(GPB6,PLC6)) {
- Not(PLC6,PLC6)
- Store(PLC6, \_SB.PT6D)
+ if (GPB6 == PLC6) {
+ PLC6 = ~PLC6
+ \_SB.PT6D = PLC6
}
}
}
}
/* USB Port 7 overcurrent uses Gpm 7 */
-If (LLessEqual(UOM7,9)) {
+If (UOM7 <= 9) {
Scope (\_GPE) {
/* Method (_L1D) { */
Method (_L07) {
UCOC()
- if (LEqual(GPB7,PLC7)) {
- Not(PLC7,PLC7)
- Store(PLC7, \_SB.PT7D)
+ if (GPB7 == PLC7) {
+ PLC7 = ~PLC7
+ \_SB.PT7D = PLC7
}
}
}
}
/* USB Port 8 overcurrent uses Gpm 8 */
-If (LLessEqual(UOM8,9)) {
+If (UOM8 <= 9) {
Scope (\_GPE) {
Method (_L17) {
- if (LEqual(G8IS,PLC8)) {
- Not(PLC8,PLC8)
- Store(PLC8, \_SB.PT8D)
+ if (G8IS == PLC8) {
+ PLC8 = ~PLC8
+ \_SB.PT8D = PLC8
}
}
}
}
/* USB Port 9 overcurrent uses Gpm 9 */
-If (LLessEqual(UOM9,9)) {
+If (UOM9 <= 9) {
Scope (\_GPE) {
Method (_L0E) {
- if (LEqual(G9IS,0)) {
- Store(1,\_SB.PT9D)
+ if (G9IS == 0) {
+ \_SB.PT9D = 1
}
}
}
--
To view, visit https://review.coreboot.org/c/coreboot/+/46025
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I07f8386abb2dd0c65e1fdd79bee05326c31e66e0
Gerrit-Change-Number: 46025
Gerrit-PatchSet: 1
Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr>
Gerrit-MessageType: newchange
2
2
Change in coreboot[master]: mb/*/*/acpi: Convert sata.asl to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 08 Oct '20
by HAOUAS Elyes (Code Review) 08 Oct '20
08 Oct '20
HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46024 )
Change subject: mb/*/*/acpi: Convert sata.asl to ASL 2.0 syntax
......................................................................
mb/*/*/acpi: Convert sata.asl to ASL 2.0 syntax
Change-Id: Id12c2cd955a778101b3aee7f37103adeb4173bb3
Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr>
---
M src/mainboard/amd/inagua/acpi/sata.asl
M src/mainboard/amd/persimmon/acpi/sata.asl
M src/mainboard/amd/south_station/acpi/sata.asl
M src/mainboard/amd/union_station/acpi/sata.asl
M src/mainboard/asrock/e350m1/acpi/sata.asl
M src/mainboard/asus/am1i-a/acpi/sata.asl
M src/mainboard/biostar/am1ml/acpi/sata.asl
M src/mainboard/elmex/pcm205400/acpi/sata.asl
M src/mainboard/gizmosphere/gizmo/acpi/sata.asl
M src/mainboard/jetway/nf81-t56n-lf/acpi/sata.asl
M src/mainboard/pcengines/apu1/acpi/sata.asl
11 files changed, 132 insertions(+), 132 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/46024/1
diff --git a/src/mainboard/amd/inagua/acpi/sata.asl b/src/mainboard/amd/inagua/acpi/sata.asl
index 9344ff1..e924b57 100644
--- a/src/mainboard/amd/inagua/acpi/sata.asl
+++ b/src/mainboard/amd/inagua/acpi/sata.asl
@@ -35,7 +35,7 @@
Device(PMST) {
Name(_ADR, 0)
Method(_STA,0) {
- if (LGreater(P0IS,0)) {
+ if (P0IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -48,7 +48,7 @@
{
Name(_ADR, 1)
Method(_STA,0) {
- if (LGreater(P1IS,0)) {
+ if (P1IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -70,7 +70,7 @@
{
Name(_ADR, 0)
Method(_STA,0) {
- if (LGreater(P2IS,0)) {
+ if (P2IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -83,7 +83,7 @@
{
Name(_ADR, 1)
Method(_STA,0) {
- if (LGreater(P3IS,0)) {
+ if (P3IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -97,35 +97,35 @@
Scope(\_GPE) {
Method(_L1F,0x0,NotSerialized) {
if (\_SB.P0PR) {
- if (LGreater(\_SB.P0IS,0)) {
+ if (\_SB.P0IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.PMRY.PMST, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P0PR)
+ \_SB.P0PR = 1
}
if (\_SB.P1PR) {
- if (LGreater(\_SB.P1IS,0)) {
+ if (\_SB.P1IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.PMRY.PSLA, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P1PR)
+ \_SB.P1PR = 1
}
if (\_SB.P2PR) {
- if (LGreater(\_SB.P2IS,0)) {
+ if (\_SB.P2IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.SEDY.SMST, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P2PR)
+ \_SB.P2PR = 1
}
if (\_SB.P3PR) {
- if (LGreater(\_SB.P3IS,0)) {
+ if (\_SB.P3IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.SEDY.SSLA, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P3PR)
+ \_SB.P3PR = 1
}
}
}
diff --git a/src/mainboard/amd/persimmon/acpi/sata.asl b/src/mainboard/amd/persimmon/acpi/sata.asl
index 9344ff1..e924b57 100644
--- a/src/mainboard/amd/persimmon/acpi/sata.asl
+++ b/src/mainboard/amd/persimmon/acpi/sata.asl
@@ -35,7 +35,7 @@
Device(PMST) {
Name(_ADR, 0)
Method(_STA,0) {
- if (LGreater(P0IS,0)) {
+ if (P0IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -48,7 +48,7 @@
{
Name(_ADR, 1)
Method(_STA,0) {
- if (LGreater(P1IS,0)) {
+ if (P1IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -70,7 +70,7 @@
{
Name(_ADR, 0)
Method(_STA,0) {
- if (LGreater(P2IS,0)) {
+ if (P2IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -83,7 +83,7 @@
{
Name(_ADR, 1)
Method(_STA,0) {
- if (LGreater(P3IS,0)) {
+ if (P3IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -97,35 +97,35 @@
Scope(\_GPE) {
Method(_L1F,0x0,NotSerialized) {
if (\_SB.P0PR) {
- if (LGreater(\_SB.P0IS,0)) {
+ if (\_SB.P0IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.PMRY.PMST, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P0PR)
+ \_SB.P0PR = 1
}
if (\_SB.P1PR) {
- if (LGreater(\_SB.P1IS,0)) {
+ if (\_SB.P1IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.PMRY.PSLA, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P1PR)
+ \_SB.P1PR = 1
}
if (\_SB.P2PR) {
- if (LGreater(\_SB.P2IS,0)) {
+ if (\_SB.P2IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.SEDY.SMST, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P2PR)
+ \_SB.P2PR = 1
}
if (\_SB.P3PR) {
- if (LGreater(\_SB.P3IS,0)) {
+ if (\_SB.P3IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.SEDY.SSLA, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P3PR)
+ \_SB.P3PR = 1
}
}
}
diff --git a/src/mainboard/amd/south_station/acpi/sata.asl b/src/mainboard/amd/south_station/acpi/sata.asl
index 9344ff1..e924b57 100644
--- a/src/mainboard/amd/south_station/acpi/sata.asl
+++ b/src/mainboard/amd/south_station/acpi/sata.asl
@@ -35,7 +35,7 @@
Device(PMST) {
Name(_ADR, 0)
Method(_STA,0) {
- if (LGreater(P0IS,0)) {
+ if (P0IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -48,7 +48,7 @@
{
Name(_ADR, 1)
Method(_STA,0) {
- if (LGreater(P1IS,0)) {
+ if (P1IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -70,7 +70,7 @@
{
Name(_ADR, 0)
Method(_STA,0) {
- if (LGreater(P2IS,0)) {
+ if (P2IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -83,7 +83,7 @@
{
Name(_ADR, 1)
Method(_STA,0) {
- if (LGreater(P3IS,0)) {
+ if (P3IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -97,35 +97,35 @@
Scope(\_GPE) {
Method(_L1F,0x0,NotSerialized) {
if (\_SB.P0PR) {
- if (LGreater(\_SB.P0IS,0)) {
+ if (\_SB.P0IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.PMRY.PMST, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P0PR)
+ \_SB.P0PR = 1
}
if (\_SB.P1PR) {
- if (LGreater(\_SB.P1IS,0)) {
+ if (\_SB.P1IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.PMRY.PSLA, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P1PR)
+ \_SB.P1PR = 1
}
if (\_SB.P2PR) {
- if (LGreater(\_SB.P2IS,0)) {
+ if (\_SB.P2IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.SEDY.SMST, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P2PR)
+ \_SB.P2PR = 1
}
if (\_SB.P3PR) {
- if (LGreater(\_SB.P3IS,0)) {
+ if (\_SB.P3IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.SEDY.SSLA, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P3PR)
+ \_SB.P3PR = 1
}
}
}
diff --git a/src/mainboard/amd/union_station/acpi/sata.asl b/src/mainboard/amd/union_station/acpi/sata.asl
index 9344ff1..e924b57 100644
--- a/src/mainboard/amd/union_station/acpi/sata.asl
+++ b/src/mainboard/amd/union_station/acpi/sata.asl
@@ -35,7 +35,7 @@
Device(PMST) {
Name(_ADR, 0)
Method(_STA,0) {
- if (LGreater(P0IS,0)) {
+ if (P0IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -48,7 +48,7 @@
{
Name(_ADR, 1)
Method(_STA,0) {
- if (LGreater(P1IS,0)) {
+ if (P1IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -70,7 +70,7 @@
{
Name(_ADR, 0)
Method(_STA,0) {
- if (LGreater(P2IS,0)) {
+ if (P2IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -83,7 +83,7 @@
{
Name(_ADR, 1)
Method(_STA,0) {
- if (LGreater(P3IS,0)) {
+ if (P3IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -97,35 +97,35 @@
Scope(\_GPE) {
Method(_L1F,0x0,NotSerialized) {
if (\_SB.P0PR) {
- if (LGreater(\_SB.P0IS,0)) {
+ if (\_SB.P0IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.PMRY.PMST, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P0PR)
+ \_SB.P0PR = 1
}
if (\_SB.P1PR) {
- if (LGreater(\_SB.P1IS,0)) {
+ if (\_SB.P1IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.PMRY.PSLA, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P1PR)
+ \_SB.P1PR = 1
}
if (\_SB.P2PR) {
- if (LGreater(\_SB.P2IS,0)) {
+ if (\_SB.P2IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.SEDY.SMST, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P2PR)
+ \_SB.P2PR = 1
}
if (\_SB.P3PR) {
- if (LGreater(\_SB.P3IS,0)) {
+ if (\_SB.P3IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.SEDY.SSLA, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P3PR)
+ \_SB.P3PR = 1
}
}
}
diff --git a/src/mainboard/asrock/e350m1/acpi/sata.asl b/src/mainboard/asrock/e350m1/acpi/sata.asl
index 7f305fb..6d9ff03 100644
--- a/src/mainboard/asrock/e350m1/acpi/sata.asl
+++ b/src/mainboard/asrock/e350m1/acpi/sata.asl
@@ -35,7 +35,7 @@
Device(PMST) {
Name(_ADR, 0)
Method(_STA,0) {
- if (LGreater(P0IS,0)) {
+ if (P0IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -48,7 +48,7 @@
{
Name(_ADR, 1)
Method(_STA,0) {
- if (LGreater(P1IS,0)) {
+ if (P1IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -71,7 +71,7 @@
{
Name(_ADR, 0)
Method(_STA,0) {
- if (LGreater(P2IS,0)) {
+ if (P2IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -84,7 +84,7 @@
{
Name(_ADR, 1)
Method(_STA,0) {
- if (LGreater(P3IS,0)) {
+ if (P3IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -98,35 +98,35 @@
Scope(\_GPE) {
Method(_L1F,0x0,NotSerialized) {
if (\_SB.P0PR) {
- if (LGreater(\_SB.P0IS,0)) {
+ if (\_SB.P0IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.PMRY.PMST, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P0PR)
+ \_SB.P0PR = 1
}
if (\_SB.P1PR) {
- if (LGreater(\_SB.P1IS,0)) {
+ if (\_SB.P1IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.PMRY.PSLA, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P1PR)
+ \_SB.P1PR = 1
}
if (\_SB.P2PR) {
- if (LGreater(\_SB.P2IS,0)) {
+ if (\_SB.P2IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.SEDY.SMST, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P2PR)
+ \_SB.P2PR = 1
}
if (\_SB.P3PR) {
- if (LGreater(\_SB.P3IS,0)) {
+ if (\_SB.P3IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.SEDY.SSLA, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P3PR)
+ \_SB.P3PR = 1
}
}
}
diff --git a/src/mainboard/asus/am1i-a/acpi/sata.asl b/src/mainboard/asus/am1i-a/acpi/sata.asl
index 84cc348..27e5222 100644
--- a/src/mainboard/asus/am1i-a/acpi/sata.asl
+++ b/src/mainboard/asus/am1i-a/acpi/sata.asl
@@ -22,7 +22,7 @@
Device(PMST) {
Name(_ADR, 0)
Method(_STA,0) {
- if (LGreater(P0IS,0)) {
+ if (P0IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -35,7 +35,7 @@
{
Name(_ADR, 1)
Method(_STA,0) {
- if (LGreater(P1IS,0)) {
+ if (P1IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -57,7 +57,7 @@
{
Name(_ADR, 0)
Method(_STA,0) {
- if (LGreater(P2IS,0)) {
+ if (P2IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -70,7 +70,7 @@
{
Name(_ADR, 1)
Method(_STA,0) {
- if (LGreater(P3IS,0)) {
+ if (P3IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -84,35 +84,35 @@
Scope(\_GPE) {
Method(_L1F,0x0,NotSerialized) {
if (\_SB.P0PR) {
- if (LGreater(\_SB.P0IS,0)) {
+ if (\_SB.P0IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.PMRY.PMST, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P0PR)
+ \_SB.P0PR = 1
}
if (\_SB.P1PR) {
- if (LGreater(\_SB.P1IS,0)) {
+ if (\_SB.P1IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.PMRY.PSLA, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P1PR)
+ \_SB.P1PR = 1
}
if (\_SB.P2PR) {
- if (LGreater(\_SB.P2IS,0)) {
+ if (\_SB.P2IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.SEDY.SMST, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P2PR)
+ \_SB.P2PR = 1
}
if (\_SB.P3PR) {
- if (LGreater(\_SB.P3IS,0)) {
+ if (\_SB.P3IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.SEDY.SSLA, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P3PR)
+ \_SB.P3PR = 1
}
}
}
diff --git a/src/mainboard/biostar/am1ml/acpi/sata.asl b/src/mainboard/biostar/am1ml/acpi/sata.asl
index d1a4ee7..31b9374 100644
--- a/src/mainboard/biostar/am1ml/acpi/sata.asl
+++ b/src/mainboard/biostar/am1ml/acpi/sata.asl
@@ -33,7 +33,7 @@
Device(PMST) {
Name(_ADR, 0)
Method(_STA,0) {
- if (LGreater(P0IS,0)) {
+ if (P0IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -46,7 +46,7 @@
{
Name(_ADR, 1)
Method(_STA,0) {
- if (LGreater(P1IS,0)) {
+ if (P1IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -68,7 +68,7 @@
{
Name(_ADR, 0)
Method(_STA,0) {
- if (LGreater(P2IS,0)) {
+ if (P2IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -81,7 +81,7 @@
{
Name(_ADR, 1)
Method(_STA,0) {
- if (LGreater(P3IS,0)) {
+ if (P3IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -95,35 +95,35 @@
Scope(\_GPE) {
Method(_L1F,0x0,NotSerialized) {
if (\_SB.P0PR) {
- if (LGreater(\_SB.P0IS,0)) {
+ if (\_SB.P0IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.PMRY.PMST, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P0PR)
+ \_SB.P0PR = 1
}
if (\_SB.P1PR) {
- if (LGreater(\_SB.P1IS,0)) {
+ if (\_SB.P1IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.PMRY.PSLA, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P1PR)
+ \_SB.P1PR = 1
}
if (\_SB.P2PR) {
- if (LGreater(\_SB.P2IS,0)) {
+ if (\_SB.P2IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.SEDY.SMST, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P2PR)
+ \_SB.P2PR = 1
}
if (\_SB.P3PR) {
- if (LGreater(\_SB.P3IS,0)) {
+ if (\_SB.P3IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.SEDY.SSLA, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P3PR)
+ \_SB.P3PR = 1
}
}
}
diff --git a/src/mainboard/elmex/pcm205400/acpi/sata.asl b/src/mainboard/elmex/pcm205400/acpi/sata.asl
index 7f305fb..6d9ff03 100644
--- a/src/mainboard/elmex/pcm205400/acpi/sata.asl
+++ b/src/mainboard/elmex/pcm205400/acpi/sata.asl
@@ -35,7 +35,7 @@
Device(PMST) {
Name(_ADR, 0)
Method(_STA,0) {
- if (LGreater(P0IS,0)) {
+ if (P0IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -48,7 +48,7 @@
{
Name(_ADR, 1)
Method(_STA,0) {
- if (LGreater(P1IS,0)) {
+ if (P1IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -71,7 +71,7 @@
{
Name(_ADR, 0)
Method(_STA,0) {
- if (LGreater(P2IS,0)) {
+ if (P2IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -84,7 +84,7 @@
{
Name(_ADR, 1)
Method(_STA,0) {
- if (LGreater(P3IS,0)) {
+ if (P3IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -98,35 +98,35 @@
Scope(\_GPE) {
Method(_L1F,0x0,NotSerialized) {
if (\_SB.P0PR) {
- if (LGreater(\_SB.P0IS,0)) {
+ if (\_SB.P0IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.PMRY.PMST, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P0PR)
+ \_SB.P0PR = 1
}
if (\_SB.P1PR) {
- if (LGreater(\_SB.P1IS,0)) {
+ if (\_SB.P1IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.PMRY.PSLA, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P1PR)
+ \_SB.P1PR = 1
}
if (\_SB.P2PR) {
- if (LGreater(\_SB.P2IS,0)) {
+ if (\_SB.P2IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.SEDY.SMST, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P2PR)
+ \_SB.P2PR = 1
}
if (\_SB.P3PR) {
- if (LGreater(\_SB.P3IS,0)) {
+ if (\_SB.P3IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.SEDY.SSLA, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P3PR)
+ \_SB.P3PR = 1
}
}
}
diff --git a/src/mainboard/gizmosphere/gizmo/acpi/sata.asl b/src/mainboard/gizmosphere/gizmo/acpi/sata.asl
index 7f305fb..6d9ff03 100644
--- a/src/mainboard/gizmosphere/gizmo/acpi/sata.asl
+++ b/src/mainboard/gizmosphere/gizmo/acpi/sata.asl
@@ -35,7 +35,7 @@
Device(PMST) {
Name(_ADR, 0)
Method(_STA,0) {
- if (LGreater(P0IS,0)) {
+ if (P0IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -48,7 +48,7 @@
{
Name(_ADR, 1)
Method(_STA,0) {
- if (LGreater(P1IS,0)) {
+ if (P1IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -71,7 +71,7 @@
{
Name(_ADR, 0)
Method(_STA,0) {
- if (LGreater(P2IS,0)) {
+ if (P2IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -84,7 +84,7 @@
{
Name(_ADR, 1)
Method(_STA,0) {
- if (LGreater(P3IS,0)) {
+ if (P3IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -98,35 +98,35 @@
Scope(\_GPE) {
Method(_L1F,0x0,NotSerialized) {
if (\_SB.P0PR) {
- if (LGreater(\_SB.P0IS,0)) {
+ if (\_SB.P0IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.PMRY.PMST, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P0PR)
+ \_SB.P0PR = 1
}
if (\_SB.P1PR) {
- if (LGreater(\_SB.P1IS,0)) {
+ if (\_SB.P1IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.PMRY.PSLA, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P1PR)
+ \_SB.P1PR = 1
}
if (\_SB.P2PR) {
- if (LGreater(\_SB.P2IS,0)) {
+ if (\_SB.P2IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.SEDY.SMST, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P2PR)
+ \_SB.P2PR = 1
}
if (\_SB.P3PR) {
- if (LGreater(\_SB.P3IS,0)) {
+ if (\_SB.P3IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.SEDY.SSLA, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P3PR)
+ \_SB.P3PR = 1
}
}
}
diff --git a/src/mainboard/jetway/nf81-t56n-lf/acpi/sata.asl b/src/mainboard/jetway/nf81-t56n-lf/acpi/sata.asl
index 7f305fb..6d9ff03 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/acpi/sata.asl
+++ b/src/mainboard/jetway/nf81-t56n-lf/acpi/sata.asl
@@ -35,7 +35,7 @@
Device(PMST) {
Name(_ADR, 0)
Method(_STA,0) {
- if (LGreater(P0IS,0)) {
+ if (P0IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -48,7 +48,7 @@
{
Name(_ADR, 1)
Method(_STA,0) {
- if (LGreater(P1IS,0)) {
+ if (P1IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -71,7 +71,7 @@
{
Name(_ADR, 0)
Method(_STA,0) {
- if (LGreater(P2IS,0)) {
+ if (P2IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -84,7 +84,7 @@
{
Name(_ADR, 1)
Method(_STA,0) {
- if (LGreater(P3IS,0)) {
+ if (P3IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -98,35 +98,35 @@
Scope(\_GPE) {
Method(_L1F,0x0,NotSerialized) {
if (\_SB.P0PR) {
- if (LGreater(\_SB.P0IS,0)) {
+ if (\_SB.P0IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.PMRY.PMST, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P0PR)
+ \_SB.P0PR = 1
}
if (\_SB.P1PR) {
- if (LGreater(\_SB.P1IS,0)) {
+ if (\_SB.P1IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.PMRY.PSLA, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P1PR)
+ \_SB.P1PR = 1
}
if (\_SB.P2PR) {
- if (LGreater(\_SB.P2IS,0)) {
+ if (\_SB.P2IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.SEDY.SMST, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P2PR)
+ \_SB.P2PR = 1
}
if (\_SB.P3PR) {
- if (LGreater(\_SB.P3IS,0)) {
+ if (\_SB.P3IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.SEDY.SSLA, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P3PR)
+ \_SB.P3PR = 1
}
}
}
diff --git a/src/mainboard/pcengines/apu1/acpi/sata.asl b/src/mainboard/pcengines/apu1/acpi/sata.asl
index 7f305fb..6d9ff03 100644
--- a/src/mainboard/pcengines/apu1/acpi/sata.asl
+++ b/src/mainboard/pcengines/apu1/acpi/sata.asl
@@ -35,7 +35,7 @@
Device(PMST) {
Name(_ADR, 0)
Method(_STA,0) {
- if (LGreater(P0IS,0)) {
+ if (P0IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -48,7 +48,7 @@
{
Name(_ADR, 1)
Method(_STA,0) {
- if (LGreater(P1IS,0)) {
+ if (P1IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -71,7 +71,7 @@
{
Name(_ADR, 0)
Method(_STA,0) {
- if (LGreater(P2IS,0)) {
+ if (P2IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -84,7 +84,7 @@
{
Name(_ADR, 1)
Method(_STA,0) {
- if (LGreater(P3IS,0)) {
+ if (P3IS > 0) {
return (0x0F) /* sata is visible */
}
else {
@@ -98,35 +98,35 @@
Scope(\_GPE) {
Method(_L1F,0x0,NotSerialized) {
if (\_SB.P0PR) {
- if (LGreater(\_SB.P0IS,0)) {
+ if (\_SB.P0IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.PMRY.PMST, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P0PR)
+ \_SB.P0PR = 1
}
if (\_SB.P1PR) {
- if (LGreater(\_SB.P1IS,0)) {
+ if (\_SB.P1IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.PMRY.PSLA, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P1PR)
+ \_SB.P1PR = 1
}
if (\_SB.P2PR) {
- if (LGreater(\_SB.P2IS,0)) {
+ if (\_SB.P2IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.SEDY.SMST, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P2PR)
+ \_SB.P2PR = 1
}
if (\_SB.P3PR) {
- if (LGreater(\_SB.P3IS,0)) {
+ if (\_SB.P3IS > 0) {
sleep(32)
}
Notify(\_SB.PCI0.STCR.SEDY.SSLA, 0x01) /* NOTIFY_DEVICE_CHECK */
- store(one, \_SB.P3PR)
+ \_SB.P3PR = 1
}
}
}
--
To view, visit https://review.coreboot.org/c/coreboot/+/46024
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Id12c2cd955a778101b3aee7f37103adeb4173bb3
Gerrit-Change-Number: 46024
Gerrit-PatchSet: 1
Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr>
Gerrit-MessageType: newchange
2
2
Change in coreboot[master]: mb/*/acpi: Convert sleep.asl to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 08 Oct '20
by HAOUAS Elyes (Code Review) 08 Oct '20
08 Oct '20
HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46023 )
Change subject: mb/*/acpi: Convert sleep.asl to ASL 2.0 syntax
......................................................................
mb/*/acpi: Convert sleep.asl to ASL 2.0 syntax
Change-Id: I6b6459bc619e9d2ae0f8c57594897fd784b12ed6
Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr>
---
M src/mainboard/amd/gardenia/acpi/sleep.asl
M src/mainboard/amd/inagua/acpi/sleep.asl
M src/mainboard/amd/olivehill/acpi/sleep.asl
M src/mainboard/amd/padmelon/acpi/sleep.asl
M src/mainboard/amd/parmer/acpi/sleep.asl
M src/mainboard/amd/persimmon/acpi/sleep.asl
M src/mainboard/amd/south_station/acpi/sleep.asl
M src/mainboard/amd/thatcher/acpi/sleep.asl
M src/mainboard/amd/union_station/acpi/sleep.asl
M src/mainboard/asrock/e350m1/acpi/sleep.asl
M src/mainboard/asrock/imb-a180/acpi/sleep.asl
M src/mainboard/asus/a88xm-e/acpi/sleep.asl
M src/mainboard/asus/am1i-a/acpi/sleep.asl
M src/mainboard/asus/f2a85-m/acpi/sleep.asl
M src/mainboard/bap/ode_e20XX/acpi/sleep.asl
M src/mainboard/biostar/a68n_5200/acpi/sleep.asl
M src/mainboard/biostar/am1ml/acpi/sleep.asl
M src/mainboard/elmex/pcm205400/acpi/sleep.asl
M src/mainboard/gizmosphere/gizmo/acpi/sleep.asl
M src/mainboard/gizmosphere/gizmo2/acpi/sleep.asl
M src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/sleep.asl
M src/mainboard/hp/abm/acpi/sleep.asl
M src/mainboard/hp/pavilion_m6_1035dx/acpi/sleep.asl
M src/mainboard/jetway/nf81-t56n-lf/acpi/sleep.asl
M src/mainboard/lenovo/g505s/acpi/sleep.asl
M src/mainboard/msi/ms7721/acpi/sleep.asl
M src/mainboard/pcengines/apu1/acpi/sleep.asl
M src/mainboard/pcengines/apu2/acpi/sleep.asl
28 files changed, 241 insertions(+), 241 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/46023/1
diff --git a/src/mainboard/amd/gardenia/acpi/sleep.asl b/src/mainboard/amd/gardenia/acpi/sleep.asl
index 89c6fa1..0cbf8e3 100644
--- a/src/mainboard/amd/gardenia/acpi/sleep.asl
+++ b/src/mainboard/amd/gardenia/acpi/sleep.asl
@@ -26,10 +26,10 @@
/* DBGO("\n") */
/* Clear wake status structure. */
- Store(0, PEWD)
- Store(0, Index(WKST,0))
- Store(0, Index(WKST,1))
- Store(7, UPWS)
+ PEWD = 0
+ WKST [0] = 0
+ WKST [1] = 0
+ UPWS = 7
} /* End Method(\_PTS) */
/*
diff --git a/src/mainboard/amd/inagua/acpi/sleep.asl b/src/mainboard/amd/inagua/acpi/sleep.asl
index 76b5f9e..3b6fd02 100644
--- a/src/mainboard/amd/inagua/acpi/sleep.asl
+++ b/src/mainboard/amd/inagua/acpi/sleep.asl
@@ -26,23 +26,23 @@
/* DBGO("\n") */
/* Don't allow PCIRST# to reset USB */
- if (LEqual(Arg0,3)){
- Store(0,URRE)
+ if (Arg0 == 3){
+ URRE = 0
}
/* Clear sleep SMI status flag and enable sleep SMI trap. */
- /*Store(One, CSSM)
- Store(One, SSEN)*/
+ /*CSSM = 1
+ SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */
- /*if (LLessEqual(\_SB.SBRI, 0x13)) {
- * Store(0,\_SB.PWDE)
+ /*if (\_SB.SBRI <= 0x13) {
+ * \_SB.PWDE = 0
*}
*/
/* Clear wake status structure. */
- Store(0, Index(WKST,0))
- Store(0, Index(WKST,1))
+ WKST [0] = 0
+ WKST [1] = 0
} /* End Method(\_PTS) */
/*
@@ -67,21 +67,21 @@
/* DBGO(" to S0\n") */
/* Re-enable HPET */
- Store(1,HPDE)
+ HPDE = 1
/* Restore PCIRST# so it resets USB */
- if (LEqual(Arg0,3)){
- Store(1,URRE)
+ if (Arg0 == 3){
+ URRE = 1
}
/* Arbitrarily clear PciExpWakeStatus */
- Store(PWST, Local1)
- Store(Local1, PWST)
+ Local1 = PWST
+ PWST = Local1
- /* if (DeRefOf(Index(WKST,0))) {
- * Store(0, Index(WKST,1))
+ /* if (DeRefOf(WKST [0])) {
+ * WKST [1] = 0
* } else {
- * Store(Arg0, Index(WKST,1))
+ * WKST [1] = Arg0
* }
*/
Return(WKST)
diff --git a/src/mainboard/amd/olivehill/acpi/sleep.asl b/src/mainboard/amd/olivehill/acpi/sleep.asl
index 47dd146..fc26c30 100644
--- a/src/mainboard/amd/olivehill/acpi/sleep.asl
+++ b/src/mainboard/amd/olivehill/acpi/sleep.asl
@@ -30,9 +30,9 @@
/* DBGO("\n") */
/* Clear wake status structure. */
- Store(0, Index(WKST,0))
- Store(0, Index(WKST,1))
- Store(7, UPWS)
+ WKST [0] = 0
+ WKST [1] = 0
+ UPWS = 7
\_SB.APTS(Arg0)
} /* End Method(\_PTS) */
@@ -56,7 +56,7 @@
/* DBGO("From S") */
/* DBGO(Arg0) */
/* DBGO(" to S0\n") */
- Store(1,USBS)
+ USBS = 1
\_SB.AWAK(Arg0)
diff --git a/src/mainboard/amd/padmelon/acpi/sleep.asl b/src/mainboard/amd/padmelon/acpi/sleep.asl
index 89c6fa1..0cbf8e3 100644
--- a/src/mainboard/amd/padmelon/acpi/sleep.asl
+++ b/src/mainboard/amd/padmelon/acpi/sleep.asl
@@ -26,10 +26,10 @@
/* DBGO("\n") */
/* Clear wake status structure. */
- Store(0, PEWD)
- Store(0, Index(WKST,0))
- Store(0, Index(WKST,1))
- Store(7, UPWS)
+ PEWD = 0
+ WKST [0] = 0
+ WKST [1] = 0
+ UPWS = 7
} /* End Method(\_PTS) */
/*
diff --git a/src/mainboard/amd/parmer/acpi/sleep.asl b/src/mainboard/amd/parmer/acpi/sleep.asl
index dde9c37..cd714ce 100644
--- a/src/mainboard/amd/parmer/acpi/sleep.asl
+++ b/src/mainboard/amd/parmer/acpi/sleep.asl
@@ -26,20 +26,20 @@
/* DBGO("\n") */
/* Clear sleep SMI status flag and enable sleep SMI trap. */
- /*Store(One, CSSM)
- Store(One, SSEN)*/
+ /*CSSM = 1
+ SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */
- /*if (LLessEqual(\_SB.SBRI, 0x13)) {
- * Store(0,\_SB.PWDE)
+ /*if (\_SB.SBRI <= 0x13) {
+ * \_SB.PWDE = 0
*}
*/
/* Clear wake status structure. */
- Store(0, Index(WKST,0))
- Store(0, Index(WKST,1))
+ WKST [0] = 0
+ WKST [1] = 0
- Store (0x07, UPWS)
+ UPWS = 0x07
} /* End Method(\_PTS) */
/*
@@ -64,7 +64,7 @@
/* DBGO(" to S0\n") */
/* Re-enable HPET */
- Store(1,USBS)
+ USBS = 1
Return(WKST)
} /* End Method(\_WAK) */
diff --git a/src/mainboard/amd/persimmon/acpi/sleep.asl b/src/mainboard/amd/persimmon/acpi/sleep.asl
index 76b5f9e..3b6fd02 100644
--- a/src/mainboard/amd/persimmon/acpi/sleep.asl
+++ b/src/mainboard/amd/persimmon/acpi/sleep.asl
@@ -26,23 +26,23 @@
/* DBGO("\n") */
/* Don't allow PCIRST# to reset USB */
- if (LEqual(Arg0,3)){
- Store(0,URRE)
+ if (Arg0 == 3){
+ URRE = 0
}
/* Clear sleep SMI status flag and enable sleep SMI trap. */
- /*Store(One, CSSM)
- Store(One, SSEN)*/
+ /*CSSM = 1
+ SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */
- /*if (LLessEqual(\_SB.SBRI, 0x13)) {
- * Store(0,\_SB.PWDE)
+ /*if (\_SB.SBRI <= 0x13) {
+ * \_SB.PWDE = 0
*}
*/
/* Clear wake status structure. */
- Store(0, Index(WKST,0))
- Store(0, Index(WKST,1))
+ WKST [0] = 0
+ WKST [1] = 0
} /* End Method(\_PTS) */
/*
@@ -67,21 +67,21 @@
/* DBGO(" to S0\n") */
/* Re-enable HPET */
- Store(1,HPDE)
+ HPDE = 1
/* Restore PCIRST# so it resets USB */
- if (LEqual(Arg0,3)){
- Store(1,URRE)
+ if (Arg0 == 3){
+ URRE = 1
}
/* Arbitrarily clear PciExpWakeStatus */
- Store(PWST, Local1)
- Store(Local1, PWST)
+ Local1 = PWST
+ PWST = Local1
- /* if (DeRefOf(Index(WKST,0))) {
- * Store(0, Index(WKST,1))
+ /* if (DeRefOf(WKST [0])) {
+ * WKST [1] = 0
* } else {
- * Store(Arg0, Index(WKST,1))
+ * WKST [1] = Arg0
* }
*/
Return(WKST)
diff --git a/src/mainboard/amd/south_station/acpi/sleep.asl b/src/mainboard/amd/south_station/acpi/sleep.asl
index 76b5f9e..3b6fd02 100644
--- a/src/mainboard/amd/south_station/acpi/sleep.asl
+++ b/src/mainboard/amd/south_station/acpi/sleep.asl
@@ -26,23 +26,23 @@
/* DBGO("\n") */
/* Don't allow PCIRST# to reset USB */
- if (LEqual(Arg0,3)){
- Store(0,URRE)
+ if (Arg0 == 3){
+ URRE = 0
}
/* Clear sleep SMI status flag and enable sleep SMI trap. */
- /*Store(One, CSSM)
- Store(One, SSEN)*/
+ /*CSSM = 1
+ SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */
- /*if (LLessEqual(\_SB.SBRI, 0x13)) {
- * Store(0,\_SB.PWDE)
+ /*if (\_SB.SBRI <= 0x13) {
+ * \_SB.PWDE = 0
*}
*/
/* Clear wake status structure. */
- Store(0, Index(WKST,0))
- Store(0, Index(WKST,1))
+ WKST [0] = 0
+ WKST [1] = 0
} /* End Method(\_PTS) */
/*
@@ -67,21 +67,21 @@
/* DBGO(" to S0\n") */
/* Re-enable HPET */
- Store(1,HPDE)
+ HPDE = 1
/* Restore PCIRST# so it resets USB */
- if (LEqual(Arg0,3)){
- Store(1,URRE)
+ if (Arg0 == 3){
+ URRE = 1
}
/* Arbitrarily clear PciExpWakeStatus */
- Store(PWST, Local1)
- Store(Local1, PWST)
+ Local1 = PWST
+ PWST = Local1
- /* if (DeRefOf(Index(WKST,0))) {
- * Store(0, Index(WKST,1))
+ /* if (DeRefOf(WKST [0])) {
+ * WKST [1] = 0
* } else {
- * Store(Arg0, Index(WKST,1))
+ * WKST [1] = Arg0
* }
*/
Return(WKST)
diff --git a/src/mainboard/amd/thatcher/acpi/sleep.asl b/src/mainboard/amd/thatcher/acpi/sleep.asl
index af87ce6..e09a638 100644
--- a/src/mainboard/amd/thatcher/acpi/sleep.asl
+++ b/src/mainboard/amd/thatcher/acpi/sleep.asl
@@ -26,20 +26,20 @@
/* DBGO("\n") */
/* Clear sleep SMI status flag and enable sleep SMI trap. */
- /*Store(One, CSSM)
- Store(One, SSEN)*/
+ /*CSSM = 1
+ SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */
- /*if (LLessEqual(\_SB.SBRI, 0x13)) {
- * Store(0,\_SB.PWDE)
+ /*if (\_SB.SBRI <= 0x13) {
+ * \_SB.PWDE = 0
*}
*/
/* Clear wake status structure. */
- Store(0, Index(WKST,0))
- Store(0, Index(WKST,1))
+ WKST [0] = 0
+ WKST [1] = 0
- Store (0x07, UPWS)
+ UPWS = 0x07
} /* End Method(\_PTS) */
/*
@@ -64,6 +64,6 @@
/* DBGO(" to S0\n") */
/* clear USB wake up signal */
- Store(1, USBS)
+ USBS = 1
Return(WKST)
} /* End Method(\_WAK) */
diff --git a/src/mainboard/amd/union_station/acpi/sleep.asl b/src/mainboard/amd/union_station/acpi/sleep.asl
index 76b5f9e..3b6fd02 100644
--- a/src/mainboard/amd/union_station/acpi/sleep.asl
+++ b/src/mainboard/amd/union_station/acpi/sleep.asl
@@ -26,23 +26,23 @@
/* DBGO("\n") */
/* Don't allow PCIRST# to reset USB */
- if (LEqual(Arg0,3)){
- Store(0,URRE)
+ if (Arg0 == 3){
+ URRE = 0
}
/* Clear sleep SMI status flag and enable sleep SMI trap. */
- /*Store(One, CSSM)
- Store(One, SSEN)*/
+ /*CSSM = 1
+ SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */
- /*if (LLessEqual(\_SB.SBRI, 0x13)) {
- * Store(0,\_SB.PWDE)
+ /*if (\_SB.SBRI <= 0x13) {
+ * \_SB.PWDE = 0
*}
*/
/* Clear wake status structure. */
- Store(0, Index(WKST,0))
- Store(0, Index(WKST,1))
+ WKST [0] = 0
+ WKST [1] = 0
} /* End Method(\_PTS) */
/*
@@ -67,21 +67,21 @@
/* DBGO(" to S0\n") */
/* Re-enable HPET */
- Store(1,HPDE)
+ HPDE = 1
/* Restore PCIRST# so it resets USB */
- if (LEqual(Arg0,3)){
- Store(1,URRE)
+ if (Arg0 == 3){
+ URRE = 1
}
/* Arbitrarily clear PciExpWakeStatus */
- Store(PWST, Local1)
- Store(Local1, PWST)
+ Local1 = PWST
+ PWST = Local1
- /* if (DeRefOf(Index(WKST,0))) {
- * Store(0, Index(WKST,1))
+ /* if (DeRefOf(WKST [0])) {
+ * WKST [1] = 0
* } else {
- * Store(Arg0, Index(WKST,1))
+ * WKST [1] = Arg0
* }
*/
Return(WKST)
diff --git a/src/mainboard/asrock/e350m1/acpi/sleep.asl b/src/mainboard/asrock/e350m1/acpi/sleep.asl
index 76b5f9e..3b6fd02 100644
--- a/src/mainboard/asrock/e350m1/acpi/sleep.asl
+++ b/src/mainboard/asrock/e350m1/acpi/sleep.asl
@@ -26,23 +26,23 @@
/* DBGO("\n") */
/* Don't allow PCIRST# to reset USB */
- if (LEqual(Arg0,3)){
- Store(0,URRE)
+ if (Arg0 == 3){
+ URRE = 0
}
/* Clear sleep SMI status flag and enable sleep SMI trap. */
- /*Store(One, CSSM)
- Store(One, SSEN)*/
+ /*CSSM = 1
+ SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */
- /*if (LLessEqual(\_SB.SBRI, 0x13)) {
- * Store(0,\_SB.PWDE)
+ /*if (\_SB.SBRI <= 0x13) {
+ * \_SB.PWDE = 0
*}
*/
/* Clear wake status structure. */
- Store(0, Index(WKST,0))
- Store(0, Index(WKST,1))
+ WKST [0] = 0
+ WKST [1] = 0
} /* End Method(\_PTS) */
/*
@@ -67,21 +67,21 @@
/* DBGO(" to S0\n") */
/* Re-enable HPET */
- Store(1,HPDE)
+ HPDE = 1
/* Restore PCIRST# so it resets USB */
- if (LEqual(Arg0,3)){
- Store(1,URRE)
+ if (Arg0 == 3){
+ URRE = 1
}
/* Arbitrarily clear PciExpWakeStatus */
- Store(PWST, Local1)
- Store(Local1, PWST)
+ Local1 = PWST
+ PWST = Local1
- /* if (DeRefOf(Index(WKST,0))) {
- * Store(0, Index(WKST,1))
+ /* if (DeRefOf(WKST [0])) {
+ * WKST [1] = 0
* } else {
- * Store(Arg0, Index(WKST,1))
+ * WKST [1] = Arg0
* }
*/
Return(WKST)
diff --git a/src/mainboard/asrock/imb-a180/acpi/sleep.asl b/src/mainboard/asrock/imb-a180/acpi/sleep.asl
index 47dd146..fc26c30 100644
--- a/src/mainboard/asrock/imb-a180/acpi/sleep.asl
+++ b/src/mainboard/asrock/imb-a180/acpi/sleep.asl
@@ -30,9 +30,9 @@
/* DBGO("\n") */
/* Clear wake status structure. */
- Store(0, Index(WKST,0))
- Store(0, Index(WKST,1))
- Store(7, UPWS)
+ WKST [0] = 0
+ WKST [1] = 0
+ UPWS = 7
\_SB.APTS(Arg0)
} /* End Method(\_PTS) */
@@ -56,7 +56,7 @@
/* DBGO("From S") */
/* DBGO(Arg0) */
/* DBGO(" to S0\n") */
- Store(1,USBS)
+ USBS = 1
\_SB.AWAK(Arg0)
diff --git a/src/mainboard/asus/a88xm-e/acpi/sleep.asl b/src/mainboard/asus/a88xm-e/acpi/sleep.asl
index 8777337..46f37f3 100644
--- a/src/mainboard/asus/a88xm-e/acpi/sleep.asl
+++ b/src/mainboard/asus/a88xm-e/acpi/sleep.asl
@@ -22,10 +22,10 @@
Method(\_PTS, 1) {
/* Clear wake status structure. */
- Store(0, Index(WKST,0))
- Store(0, Index(WKST,1))
+ WKST [0] = 0
+ WKST [1] = 0
- Store (0x07, UPWS)
+ UPWS = 0x07
} /* End Method(\_PTS) */
/*
diff --git a/src/mainboard/asus/am1i-a/acpi/sleep.asl b/src/mainboard/asus/am1i-a/acpi/sleep.asl
index 47dd146..fc26c30 100644
--- a/src/mainboard/asus/am1i-a/acpi/sleep.asl
+++ b/src/mainboard/asus/am1i-a/acpi/sleep.asl
@@ -30,9 +30,9 @@
/* DBGO("\n") */
/* Clear wake status structure. */
- Store(0, Index(WKST,0))
- Store(0, Index(WKST,1))
- Store(7, UPWS)
+ WKST [0] = 0
+ WKST [1] = 0
+ UPWS = 7
\_SB.APTS(Arg0)
} /* End Method(\_PTS) */
@@ -56,7 +56,7 @@
/* DBGO("From S") */
/* DBGO(Arg0) */
/* DBGO(" to S0\n") */
- Store(1,USBS)
+ USBS = 1
\_SB.AWAK(Arg0)
diff --git a/src/mainboard/asus/f2a85-m/acpi/sleep.asl b/src/mainboard/asus/f2a85-m/acpi/sleep.asl
index e08accd..07f6419 100644
--- a/src/mainboard/asus/f2a85-m/acpi/sleep.asl
+++ b/src/mainboard/asus/f2a85-m/acpi/sleep.asl
@@ -26,20 +26,20 @@
/* DBGO("\n") */
/* Clear sleep SMI status flag and enable sleep SMI trap. */
- /*Store(One, CSSM)
- Store(One, SSEN)*/
+ /*CSSM = 1
+ SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */
- /*if (LLessEqual(\_SB.SBRI, 0x13)) {
- * Store(0,\_SB.PWDE)
+ /*if (\_SB.SBRI <= 0x13) {
+ * \_SB.PWDE = 0
*}
*/
/* Clear wake status structure. */
- Store(0, Index(WKST,0))
- Store(0, Index(WKST,1))
+ WKST [0] = 0
+ WKST [1] = 0
- Store (0x07, UPWS)
+ UPWS = 0x07
} /* End Method(\_PTS) */
/*
diff --git a/src/mainboard/bap/ode_e20XX/acpi/sleep.asl b/src/mainboard/bap/ode_e20XX/acpi/sleep.asl
index 47dd146..fc26c30 100644
--- a/src/mainboard/bap/ode_e20XX/acpi/sleep.asl
+++ b/src/mainboard/bap/ode_e20XX/acpi/sleep.asl
@@ -30,9 +30,9 @@
/* DBGO("\n") */
/* Clear wake status structure. */
- Store(0, Index(WKST,0))
- Store(0, Index(WKST,1))
- Store(7, UPWS)
+ WKST [0] = 0
+ WKST [1] = 0
+ UPWS = 7
\_SB.APTS(Arg0)
} /* End Method(\_PTS) */
@@ -56,7 +56,7 @@
/* DBGO("From S") */
/* DBGO(Arg0) */
/* DBGO(" to S0\n") */
- Store(1,USBS)
+ USBS = 1
\_SB.AWAK(Arg0)
diff --git a/src/mainboard/biostar/a68n_5200/acpi/sleep.asl b/src/mainboard/biostar/a68n_5200/acpi/sleep.asl
index 47dd146..fc26c30 100644
--- a/src/mainboard/biostar/a68n_5200/acpi/sleep.asl
+++ b/src/mainboard/biostar/a68n_5200/acpi/sleep.asl
@@ -30,9 +30,9 @@
/* DBGO("\n") */
/* Clear wake status structure. */
- Store(0, Index(WKST,0))
- Store(0, Index(WKST,1))
- Store(7, UPWS)
+ WKST [0] = 0
+ WKST [1] = 0
+ UPWS = 7
\_SB.APTS(Arg0)
} /* End Method(\_PTS) */
@@ -56,7 +56,7 @@
/* DBGO("From S") */
/* DBGO(Arg0) */
/* DBGO(" to S0\n") */
- Store(1,USBS)
+ USBS = 1
\_SB.AWAK(Arg0)
diff --git a/src/mainboard/biostar/am1ml/acpi/sleep.asl b/src/mainboard/biostar/am1ml/acpi/sleep.asl
index 47dd146..fc26c30 100644
--- a/src/mainboard/biostar/am1ml/acpi/sleep.asl
+++ b/src/mainboard/biostar/am1ml/acpi/sleep.asl
@@ -30,9 +30,9 @@
/* DBGO("\n") */
/* Clear wake status structure. */
- Store(0, Index(WKST,0))
- Store(0, Index(WKST,1))
- Store(7, UPWS)
+ WKST [0] = 0
+ WKST [1] = 0
+ UPWS = 7
\_SB.APTS(Arg0)
} /* End Method(\_PTS) */
@@ -56,7 +56,7 @@
/* DBGO("From S") */
/* DBGO(Arg0) */
/* DBGO(" to S0\n") */
- Store(1,USBS)
+ USBS = 1
\_SB.AWAK(Arg0)
diff --git a/src/mainboard/elmex/pcm205400/acpi/sleep.asl b/src/mainboard/elmex/pcm205400/acpi/sleep.asl
index 76b5f9e..3b6fd02 100644
--- a/src/mainboard/elmex/pcm205400/acpi/sleep.asl
+++ b/src/mainboard/elmex/pcm205400/acpi/sleep.asl
@@ -26,23 +26,23 @@
/* DBGO("\n") */
/* Don't allow PCIRST# to reset USB */
- if (LEqual(Arg0,3)){
- Store(0,URRE)
+ if (Arg0 == 3){
+ URRE = 0
}
/* Clear sleep SMI status flag and enable sleep SMI trap. */
- /*Store(One, CSSM)
- Store(One, SSEN)*/
+ /*CSSM = 1
+ SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */
- /*if (LLessEqual(\_SB.SBRI, 0x13)) {
- * Store(0,\_SB.PWDE)
+ /*if (\_SB.SBRI <= 0x13) {
+ * \_SB.PWDE = 0
*}
*/
/* Clear wake status structure. */
- Store(0, Index(WKST,0))
- Store(0, Index(WKST,1))
+ WKST [0] = 0
+ WKST [1] = 0
} /* End Method(\_PTS) */
/*
@@ -67,21 +67,21 @@
/* DBGO(" to S0\n") */
/* Re-enable HPET */
- Store(1,HPDE)
+ HPDE = 1
/* Restore PCIRST# so it resets USB */
- if (LEqual(Arg0,3)){
- Store(1,URRE)
+ if (Arg0 == 3){
+ URRE = 1
}
/* Arbitrarily clear PciExpWakeStatus */
- Store(PWST, Local1)
- Store(Local1, PWST)
+ Local1 = PWST
+ PWST = Local1
- /* if (DeRefOf(Index(WKST,0))) {
- * Store(0, Index(WKST,1))
+ /* if (DeRefOf(WKST [0])) {
+ * WKST [1] = 0
* } else {
- * Store(Arg0, Index(WKST,1))
+ * WKST [1] = Arg0
* }
*/
Return(WKST)
diff --git a/src/mainboard/gizmosphere/gizmo/acpi/sleep.asl b/src/mainboard/gizmosphere/gizmo/acpi/sleep.asl
index 76b5f9e..3b6fd02 100644
--- a/src/mainboard/gizmosphere/gizmo/acpi/sleep.asl
+++ b/src/mainboard/gizmosphere/gizmo/acpi/sleep.asl
@@ -26,23 +26,23 @@
/* DBGO("\n") */
/* Don't allow PCIRST# to reset USB */
- if (LEqual(Arg0,3)){
- Store(0,URRE)
+ if (Arg0 == 3){
+ URRE = 0
}
/* Clear sleep SMI status flag and enable sleep SMI trap. */
- /*Store(One, CSSM)
- Store(One, SSEN)*/
+ /*CSSM = 1
+ SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */
- /*if (LLessEqual(\_SB.SBRI, 0x13)) {
- * Store(0,\_SB.PWDE)
+ /*if (\_SB.SBRI <= 0x13) {
+ * \_SB.PWDE = 0
*}
*/
/* Clear wake status structure. */
- Store(0, Index(WKST,0))
- Store(0, Index(WKST,1))
+ WKST [0] = 0
+ WKST [1] = 0
} /* End Method(\_PTS) */
/*
@@ -67,21 +67,21 @@
/* DBGO(" to S0\n") */
/* Re-enable HPET */
- Store(1,HPDE)
+ HPDE = 1
/* Restore PCIRST# so it resets USB */
- if (LEqual(Arg0,3)){
- Store(1,URRE)
+ if (Arg0 == 3){
+ URRE = 1
}
/* Arbitrarily clear PciExpWakeStatus */
- Store(PWST, Local1)
- Store(Local1, PWST)
+ Local1 = PWST
+ PWST = Local1
- /* if (DeRefOf(Index(WKST,0))) {
- * Store(0, Index(WKST,1))
+ /* if (DeRefOf(WKST [0])) {
+ * WKST [1] = 0
* } else {
- * Store(Arg0, Index(WKST,1))
+ * WKST [1] = Arg0
* }
*/
Return(WKST)
diff --git a/src/mainboard/gizmosphere/gizmo2/acpi/sleep.asl b/src/mainboard/gizmosphere/gizmo2/acpi/sleep.asl
index 47dd146..fc26c30 100644
--- a/src/mainboard/gizmosphere/gizmo2/acpi/sleep.asl
+++ b/src/mainboard/gizmosphere/gizmo2/acpi/sleep.asl
@@ -30,9 +30,9 @@
/* DBGO("\n") */
/* Clear wake status structure. */
- Store(0, Index(WKST,0))
- Store(0, Index(WKST,1))
- Store(7, UPWS)
+ WKST [0] = 0
+ WKST [1] = 0
+ UPWS = 7
\_SB.APTS(Arg0)
} /* End Method(\_PTS) */
@@ -56,7 +56,7 @@
/* DBGO("From S") */
/* DBGO(Arg0) */
/* DBGO(" to S0\n") */
- Store(1,USBS)
+ USBS = 1
\_SB.AWAK(Arg0)
diff --git a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/sleep.asl b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/sleep.asl
index d151e1d..ced2e2d 100644
--- a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/sleep.asl
+++ b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/sleep.asl
@@ -29,10 +29,10 @@
\_SB.PCI0.FPTS ()
/* Clear wake status structure. */
- Store (0, PEWD)
- Store (0, Index(WKST,0))
- Store (0, Index(WKST,1))
- Store (7, UPWS)
+ PEWD = 0
+ WKST [0] = 0
+ WKST [1] = 0
+ UPWS = 7
}
/*
diff --git a/src/mainboard/hp/abm/acpi/sleep.asl b/src/mainboard/hp/abm/acpi/sleep.asl
index 47dd146..fc26c30 100644
--- a/src/mainboard/hp/abm/acpi/sleep.asl
+++ b/src/mainboard/hp/abm/acpi/sleep.asl
@@ -30,9 +30,9 @@
/* DBGO("\n") */
/* Clear wake status structure. */
- Store(0, Index(WKST,0))
- Store(0, Index(WKST,1))
- Store(7, UPWS)
+ WKST [0] = 0
+ WKST [1] = 0
+ UPWS = 7
\_SB.APTS(Arg0)
} /* End Method(\_PTS) */
@@ -56,7 +56,7 @@
/* DBGO("From S") */
/* DBGO(Arg0) */
/* DBGO(" to S0\n") */
- Store(1,USBS)
+ USBS = 1
\_SB.AWAK(Arg0)
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/acpi/sleep.asl b/src/mainboard/hp/pavilion_m6_1035dx/acpi/sleep.asl
index dde9c37..cd714ce 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/acpi/sleep.asl
+++ b/src/mainboard/hp/pavilion_m6_1035dx/acpi/sleep.asl
@@ -26,20 +26,20 @@
/* DBGO("\n") */
/* Clear sleep SMI status flag and enable sleep SMI trap. */
- /*Store(One, CSSM)
- Store(One, SSEN)*/
+ /*CSSM = 1
+ SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */
- /*if (LLessEqual(\_SB.SBRI, 0x13)) {
- * Store(0,\_SB.PWDE)
+ /*if (\_SB.SBRI <= 0x13) {
+ * \_SB.PWDE = 0
*}
*/
/* Clear wake status structure. */
- Store(0, Index(WKST,0))
- Store(0, Index(WKST,1))
+ WKST [0] = 0
+ WKST [1] = 0
- Store (0x07, UPWS)
+ UPWS = 0x07
} /* End Method(\_PTS) */
/*
@@ -64,7 +64,7 @@
/* DBGO(" to S0\n") */
/* Re-enable HPET */
- Store(1,USBS)
+ USBS = 1
Return(WKST)
} /* End Method(\_WAK) */
diff --git a/src/mainboard/jetway/nf81-t56n-lf/acpi/sleep.asl b/src/mainboard/jetway/nf81-t56n-lf/acpi/sleep.asl
index 76b5f9e..3b6fd02 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/acpi/sleep.asl
+++ b/src/mainboard/jetway/nf81-t56n-lf/acpi/sleep.asl
@@ -26,23 +26,23 @@
/* DBGO("\n") */
/* Don't allow PCIRST# to reset USB */
- if (LEqual(Arg0,3)){
- Store(0,URRE)
+ if (Arg0 == 3){
+ URRE = 0
}
/* Clear sleep SMI status flag and enable sleep SMI trap. */
- /*Store(One, CSSM)
- Store(One, SSEN)*/
+ /*CSSM = 1
+ SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */
- /*if (LLessEqual(\_SB.SBRI, 0x13)) {
- * Store(0,\_SB.PWDE)
+ /*if (\_SB.SBRI <= 0x13) {
+ * \_SB.PWDE = 0
*}
*/
/* Clear wake status structure. */
- Store(0, Index(WKST,0))
- Store(0, Index(WKST,1))
+ WKST [0] = 0
+ WKST [1] = 0
} /* End Method(\_PTS) */
/*
@@ -67,21 +67,21 @@
/* DBGO(" to S0\n") */
/* Re-enable HPET */
- Store(1,HPDE)
+ HPDE = 1
/* Restore PCIRST# so it resets USB */
- if (LEqual(Arg0,3)){
- Store(1,URRE)
+ if (Arg0 == 3){
+ URRE = 1
}
/* Arbitrarily clear PciExpWakeStatus */
- Store(PWST, Local1)
- Store(Local1, PWST)
+ Local1 = PWST
+ PWST = Local1
- /* if (DeRefOf(Index(WKST,0))) {
- * Store(0, Index(WKST,1))
+ /* if (DeRefOf(WKST [0])) {
+ * WKST [1] = 0
* } else {
- * Store(Arg0, Index(WKST,1))
+ * WKST [1] = Arg0
* }
*/
Return(WKST)
diff --git a/src/mainboard/lenovo/g505s/acpi/sleep.asl b/src/mainboard/lenovo/g505s/acpi/sleep.asl
index dde9c37..cd714ce 100644
--- a/src/mainboard/lenovo/g505s/acpi/sleep.asl
+++ b/src/mainboard/lenovo/g505s/acpi/sleep.asl
@@ -26,20 +26,20 @@
/* DBGO("\n") */
/* Clear sleep SMI status flag and enable sleep SMI trap. */
- /*Store(One, CSSM)
- Store(One, SSEN)*/
+ /*CSSM = 1
+ SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */
- /*if (LLessEqual(\_SB.SBRI, 0x13)) {
- * Store(0,\_SB.PWDE)
+ /*if (\_SB.SBRI <= 0x13) {
+ * \_SB.PWDE = 0
*}
*/
/* Clear wake status structure. */
- Store(0, Index(WKST,0))
- Store(0, Index(WKST,1))
+ WKST [0] = 0
+ WKST [1] = 0
- Store (0x07, UPWS)
+ UPWS = 0x07
} /* End Method(\_PTS) */
/*
@@ -64,7 +64,7 @@
/* DBGO(" to S0\n") */
/* Re-enable HPET */
- Store(1,USBS)
+ USBS = 1
Return(WKST)
} /* End Method(\_WAK) */
diff --git a/src/mainboard/msi/ms7721/acpi/sleep.asl b/src/mainboard/msi/ms7721/acpi/sleep.asl
index e08accd..07f6419 100644
--- a/src/mainboard/msi/ms7721/acpi/sleep.asl
+++ b/src/mainboard/msi/ms7721/acpi/sleep.asl
@@ -26,20 +26,20 @@
/* DBGO("\n") */
/* Clear sleep SMI status flag and enable sleep SMI trap. */
- /*Store(One, CSSM)
- Store(One, SSEN)*/
+ /*CSSM = 1
+ SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */
- /*if (LLessEqual(\_SB.SBRI, 0x13)) {
- * Store(0,\_SB.PWDE)
+ /*if (\_SB.SBRI <= 0x13) {
+ * \_SB.PWDE = 0
*}
*/
/* Clear wake status structure. */
- Store(0, Index(WKST,0))
- Store(0, Index(WKST,1))
+ WKST [0] = 0
+ WKST [1] = 0
- Store (0x07, UPWS)
+ UPWS = 0x07
} /* End Method(\_PTS) */
/*
diff --git a/src/mainboard/pcengines/apu1/acpi/sleep.asl b/src/mainboard/pcengines/apu1/acpi/sleep.asl
index 76b5f9e..3b6fd02 100644
--- a/src/mainboard/pcengines/apu1/acpi/sleep.asl
+++ b/src/mainboard/pcengines/apu1/acpi/sleep.asl
@@ -26,23 +26,23 @@
/* DBGO("\n") */
/* Don't allow PCIRST# to reset USB */
- if (LEqual(Arg0,3)){
- Store(0,URRE)
+ if (Arg0 == 3){
+ URRE = 0
}
/* Clear sleep SMI status flag and enable sleep SMI trap. */
- /*Store(One, CSSM)
- Store(One, SSEN)*/
+ /*CSSM = 1
+ SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */
- /*if (LLessEqual(\_SB.SBRI, 0x13)) {
- * Store(0,\_SB.PWDE)
+ /*if (\_SB.SBRI <= 0x13) {
+ * \_SB.PWDE = 0
*}
*/
/* Clear wake status structure. */
- Store(0, Index(WKST,0))
- Store(0, Index(WKST,1))
+ WKST [0] = 0
+ WKST [1] = 0
} /* End Method(\_PTS) */
/*
@@ -67,21 +67,21 @@
/* DBGO(" to S0\n") */
/* Re-enable HPET */
- Store(1,HPDE)
+ HPDE = 1
/* Restore PCIRST# so it resets USB */
- if (LEqual(Arg0,3)){
- Store(1,URRE)
+ if (Arg0 == 3){
+ URRE = 1
}
/* Arbitrarily clear PciExpWakeStatus */
- Store(PWST, Local1)
- Store(Local1, PWST)
+ Local1 = PWST
+ PWST = Local1
- /* if (DeRefOf(Index(WKST,0))) {
- * Store(0, Index(WKST,1))
+ /* if (DeRefOf(WKST [0])) {
+ * WKST [1] = 0
* } else {
- * Store(Arg0, Index(WKST,1))
+ * WKST [1] = Arg0
* }
*/
Return(WKST)
diff --git a/src/mainboard/pcengines/apu2/acpi/sleep.asl b/src/mainboard/pcengines/apu2/acpi/sleep.asl
index 39fe610..377f0de 100644
--- a/src/mainboard/pcengines/apu2/acpi/sleep.asl
+++ b/src/mainboard/pcengines/apu2/acpi/sleep.asl
@@ -30,9 +30,9 @@
/* DBGO("\n") */
/* Clear wake status structure. */
- Store(0, Index(WKST,0))
- Store(0, Index(WKST,1))
- Store(7, UPWS)
+ WKST [0] = 0
+ WKST [1] = 0
+ UPWS = 7
\_SB.APTS(Arg0)
} /* End Method(\_PTS) */
@@ -58,7 +58,7 @@
/* DBGO(" to S0\n") */
/* clear USB wake up signal */
- Store(1, USBS)
+ USBS = 1
\_SB.AWAK(Arg0)
--
To view, visit https://review.coreboot.org/c/coreboot/+/46023
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I6b6459bc619e9d2ae0f8c57594897fd784b12ed6
Gerrit-Change-Number: 46023
Gerrit-PatchSet: 1
Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr>
Gerrit-MessageType: newchange
2
2
Change in coreboot[master]: mb/*/*/acpi: Convert 'thermal.asl' to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 08 Oct '20
by HAOUAS Elyes (Code Review) 08 Oct '20
08 Oct '20
HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46047 )
Change subject: mb/*/*/acpi: Convert 'thermal.asl' to ASL 2.0 syntax
......................................................................
mb/*/*/acpi: Convert 'thermal.asl' to ASL 2.0 syntax
Change-Id: Ic46d6d99f02e14edb9a3d83e91f894c826fa01a8
Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr>
---
M src/mainboard/getac/p470/acpi/thermal.asl
M src/mainboard/gigabyte/ga-b75m-d3h/acpi/thermal.asl
M src/mainboard/gigabyte/ga-h61m-series/acpi/thermal.asl
M src/mainboard/google/auron/acpi/thermal.asl
M src/mainboard/google/beltino/acpi/thermal.asl
M src/mainboard/google/butterfly/acpi/thermal.asl
M src/mainboard/google/cyan/variants/terra/include/variant/acpi/thermal.asl
M src/mainboard/google/jecht/variants/guado/include/variant/acpi/thermal.asl
M src/mainboard/google/jecht/variants/jecht/include/variant/acpi/thermal.asl
M src/mainboard/google/jecht/variants/rikku/include/variant/acpi/thermal.asl
M src/mainboard/google/jecht/variants/tidus/include/variant/acpi/thermal.asl
M src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/thermal.asl
M src/mainboard/google/link/acpi/thermal.asl
M src/mainboard/google/parrot/acpi/thermal.asl
M src/mainboard/google/slippy/acpi/thermal.asl
M src/mainboard/google/stout/acpi/thermal.asl
M src/mainboard/google/zork/variants/baseboard/include/baseboard/acpi/thermal.asl
M src/mainboard/intel/baskingridge/acpi/thermal.asl
M src/mainboard/intel/emeraldlake2/acpi/thermal.asl
M src/mainboard/intel/wtm2/acpi/thermal.asl
M src/mainboard/kontron/ktqm77/acpi/thermal.asl
M src/mainboard/packardbell/ms2290/acpi/thermal.asl
M src/mainboard/roda/rk9/acpi/thermal.asl
M src/mainboard/roda/rv11/acpi/thermal.asl
M src/mainboard/samsung/lumpy/acpi/thermal.asl
M src/mainboard/samsung/stumpy/acpi/thermal.asl
26 files changed, 629 insertions(+), 679 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/46047/1
diff --git a/src/mainboard/getac/p470/acpi/thermal.asl b/src/mainboard/getac/p470/acpi/thermal.asl
index 6e3dc22..4e31ef3 100644
--- a/src/mainboard/getac/p470/acpi/thermal.asl
+++ b/src/mainboard/getac/p470/acpi/thermal.asl
@@ -17,11 +17,11 @@
// Convert from °C to 1/10 Kelvin
Method(DEGR, 1, NotSerialized)
{
- Store(Arg0, Local0)
+ Local0 = Arg0
// 10ths of degrees
- Multiply(Local0, 10, Local0)
+ Local0 *= 10
// 0°C is 273.15 K, we need to round it.
- Add(Local0, 2732, Local0)
+ Local0 += 2732
Return(Local0)
}
@@ -35,24 +35,24 @@
// Critical shutdown temperature
Method (_CRT, 0, Serialized)
{
- Store(\_SB.PCI0.LPCB.EC0.CRTT, Local0)
- Store(DEGR(Local0), Local0)
+ Local0 = \_SB.PCI0.LPCB.EC0.CRTT
+ Local0 = DEGR (Local0)
Return(Local0)
}
// CPU throttling start temperature
Method (_PSV, 0, Serialized)
{
- Store(\_SB.PCI0.LPCB.EC0.CTRO, Local0)
- Store(DEGR(Local0), Local0)
+ Local0 = \_SB.PCI0.LPCB.EC0.CTRO
+ Local0 = DEGR (Local0)
Return(Local0)
}
// Get DTS Temperature
Method (_TMP, 0, Serialized)
{
- Store(\_SB.PCI0.LPCB.EC0.CTMP, Local0)
- Store(DEGR(Local0), Local0)
+ Local0 = \_SB.PCI0.LPCB.EC0.CTMP
+ Local0 = DEGR (Local0)
Return(Local0)
}
diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/acpi/thermal.asl b/src/mainboard/gigabyte/ga-b75m-d3h/acpi/thermal.asl
index 2544617..ae4ef30 100644
--- a/src/mainboard/gigabyte/ga-b75m-d3h/acpi/thermal.asl
+++ b/src/mainboard/gigabyte/ga-b75m-d3h/acpi/thermal.asl
@@ -21,10 +21,10 @@
Method (CTOK, 1)
{
// 10th of Degrees C
- Multiply (Arg0, 10, Local0)
+ Local0 = Arg0 * 10
// Convert to Kelvin
- Add (Local0, 2732, Local0)
+ Local0 += 2732
Return (Local0)
}
diff --git a/src/mainboard/gigabyte/ga-h61m-series/acpi/thermal.asl b/src/mainboard/gigabyte/ga-h61m-series/acpi/thermal.asl
index 2544617..ae4ef30 100644
--- a/src/mainboard/gigabyte/ga-h61m-series/acpi/thermal.asl
+++ b/src/mainboard/gigabyte/ga-h61m-series/acpi/thermal.asl
@@ -21,10 +21,10 @@
Method (CTOK, 1)
{
// 10th of Degrees C
- Multiply (Arg0, 10, Local0)
+ Local0 = Arg0 * 10
// Convert to Kelvin
- Add (Local0, 2732, Local0)
+ Local0 += 2732
Return (Local0)
}
diff --git a/src/mainboard/google/auron/acpi/thermal.asl b/src/mainboard/google/auron/acpi/thermal.asl
index 4be4fe5..fd05e73 100644
--- a/src/mainboard/google/auron/acpi/thermal.asl
+++ b/src/mainboard/google/auron/acpi/thermal.asl
@@ -24,10 +24,10 @@
// Convert from Degrees C to 1/10 Kelvin for ACPI
Method (CTOK, 1) {
// 10th of Degrees C
- Multiply (Arg0, 10, Local0)
+ Local0 = Arg0 * 10
// Convert to Kelvin
- Add (Local0, 2732, Local0)
+ Local0 += 2732
Return (Local0)
}
@@ -53,56 +53,56 @@
Method (TCHK, 0, Serialized)
{
// Get Temperature from TIN# set in NVS
- Store (\_SB.PCI0.LPCB.EC0.TINS (TMPS), Local0)
+ Local0 = \_SB.PCI0.LPCB.EC0.TINS (TMPS)
// Check for sensor not calibrated
- If (LEqual (Local0, \_SB.PCI0.LPCB.EC0.TNCA)) {
+ If (Local0 == \_SB.PCI0.LPCB.EC0.TNCA) {
Return (CTOK(0))
}
// Check for sensor not present
- If (LEqual (Local0, \_SB.PCI0.LPCB.EC0.TNPR)) {
+ If (Local0 == \_SB.PCI0.LPCB.EC0.TNPR) {
Return (CTOK(0))
}
// Check for sensor not powered
- If (LEqual (Local0, \_SB.PCI0.LPCB.EC0.TNOP)) {
+ If (Local0 == \_SB.PCI0.LPCB.EC0.TNOP) {
Return (CTOK(0))
}
// Check for sensor bad reading
- If (LEqual (Local0, \_SB.PCI0.LPCB.EC0.TBAD)) {
+ If (Local0 == \_SB.PCI0.LPCB.EC0.TBAD) {
Return (CTOK(0))
}
// Adjust by offset to get Kelvin
- Add (\_SB.PCI0.LPCB.EC0.TOFS, Local0, Local0)
+ Local0 += \_SB.PCI0.LPCB.EC0.TOFS
// Convert to 1/10 Kelvin
- Multiply (Local0, 10, Local0)
+ Local0 *= 10
Return (Local0)
}
Method (_TMP, 0, Serialized)
{
// Get temperature from EC in deci-kelvin
- Store (TCHK (), Local0)
+ Local0 = TCHK ()
// Critical temperature in deci-kelvin
- Store (CTOK (\TCRT), Local1)
+ Local1 = CTOK (\TCRT)
- If (LGreaterEqual (Local0, Local1)) {
- Store ("CRITICAL TEMPERATURE", Debug)
- Store (Local0, Debug)
+ If (Local0 >= Local1) {
+ Debug = "CRITICAL TEMPERATURE"
+ Debug = Local0
// Wait 1 second for EC to re-poll
Sleep (1000)
// Re-read temperature from EC
- Store (TCHK (), Local0)
+ Local0 = TCHK ()
- Store ("RE-READ TEMPERATURE", Debug)
- Store (Local0, Debug)
+ Debug = "RE-READ TEMPERATURE"
+ Debug = Local0
}
Return (Local0)
@@ -110,7 +110,7 @@
/* CTDP Down */
Method (_AC0) {
- If (LLessEqual (\FLVL, 0)) {
+ If (\FLVL <= 0) {
Return (CTOK (CTL_TDP_THRESHOLD_OFF))
} Else {
Return (CTOK (CTL_TDP_THRESHOLD_ON))
@@ -119,7 +119,7 @@
/* CTDP Nominal */
Method (_AC1) {
- If (LLessEqual (\FLVL, 1)) {
+ If (\FLVL <= 1) {
Return (CTOK (CTL_TDP_THRESHILD_NORMAL))
} Else {
Return (CTOK (CTL_TDP_THRESHILD_NORMAL))
@@ -132,14 +132,14 @@
PowerResource (TNP0, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 0)) {
+ If (\FLVL <= 0) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- Store (0, \FLVL)
+ \FLVL = 0
/* Enable Power Limit */
\_SB.PCI0.MCHC.CTLE (CTL_TDP_POWER_LIMIT)
@@ -147,7 +147,7 @@
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
- Store (1, \FLVL)
+ \FLVL = 1
/* Disable Power Limit */
\_SB.PCI0.MCHC.CTLD ()
@@ -159,18 +159,18 @@
PowerResource (TNP1, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 1)) {
+ If (\FLVL <= 1) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- Store (1, \FLVL)
+ \FLVL = 1
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
- Store (1, \FLVL)
+ \FLVL = 1
Notify (\_TZ.THRM, 0x81)
}
}
diff --git a/src/mainboard/google/beltino/acpi/thermal.asl b/src/mainboard/google/beltino/acpi/thermal.asl
index 1292af4..96acaeb 100644
--- a/src/mainboard/google/beltino/acpi/thermal.asl
+++ b/src/mainboard/google/beltino/acpi/thermal.asl
@@ -23,10 +23,10 @@
// Convert from Degrees C to 1/10 Kelvin for ACPI
Method (CTOK, 1) {
// 10th of Degrees C
- Multiply (Arg0, 10, Local0)
+ Local0 = Arg0 * 10
// Convert to Kelvin
- Add (Local0, 2732, Local0)
+ Local0 += 2732
Return (Local0)
}
@@ -52,66 +52,66 @@
// Start fan at state 4 = lowest temp state
Method (_INI)
{
- Store (4, \FLVL)
- Store (FAN4_PWM, \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ \FLVL = 4
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN4_PWM
Notify (\_TZ.THRM, 0x81)
}
Method (TCHK, 0, Serialized)
{
// Get CPU Temperature from PECI via SuperIO TMPIN3
- Store (\_SB.PCI0.LPCB.SIO.ENVC.TIN3, Local0)
+ Local0 = \_SB.PCI0.LPCB.SIO.ENVC.TIN3
// Check for "no reading available"
- If (LEqual (Local0, 0x80)) {
+ If (Local0 == 0x80) {
Return (CTOK (FAN0_THRESHOLD_ON))
}
// Check for invalid readings
- If (LOr (LEqual (Local0, 255), LEqual (Local0, 0))) {
+ If ((Local0 == 255) || (Local0 == 0)) {
Return (CTOK (FAN0_THRESHOLD_ON))
}
// PECI raw value is an offset from Tj_max
- Subtract (255, Local0, Local1)
+ Local1 = 255 - Local0
// Handle values greater than Tj_max
- If (LGreaterEqual (Local1, \TMAX)) {
+ If (Local1 >= \TMAX) {
Return (CTOK (\TMAX))
}
// Subtract from Tj_max to get temperature
- Subtract (\TMAX, Local1, Local0)
+ Local0 = \TMAX - Local1
Return (CTOK (Local0))
}
Method (_TMP, 0, Serialized)
{
// Get temperature from SuperIO in deci-kelvin
- Store (TCHK (), Local0)
+ Local0 = TCHK ()
// Critical temperature in deci-kelvin
- Store (CTOK (\TMAX), Local1)
+ Local1 = CTOK (\TMAX)
- If (LGreaterEqual (Local0, Local1)) {
- Store ("CRITICAL TEMPERATURE", Debug)
- Store (Local0, Debug)
+ If (Local0 >= Local1) {
+ Debug = "CRITICAL TEMPERATURE"
+ Debug = Local0
// Wait 1 second for SuperIO to re-poll
Sleep (1000)
// Re-read temperature from SuperIO
- Store (TCHK (), Local0)
+ Local0 = TCHK ()
- Store ("RE-READ TEMPERATURE", Debug)
- Store (Local0, Debug)
+ Debug = "RE-READ TEMPERATURE"
+ Debug = Local0
}
Return (Local0)
}
Method (_AC0) {
- If (LLessEqual (\FLVL, 0)) {
+ If (\FLVL <= 0) {
Return (CTOK (FAN0_THRESHOLD_OFF))
} Else {
Return (CTOK (FAN0_THRESHOLD_ON))
@@ -119,7 +119,7 @@
}
Method (_AC1) {
- If (LLessEqual (\FLVL, 1)) {
+ If (\FLVL <= 1) {
Return (CTOK (FAN1_THRESHOLD_OFF))
} Else {
Return (CTOK (FAN1_THRESHOLD_ON))
@@ -127,7 +127,7 @@
}
Method (_AC2) {
- If (LLessEqual (\FLVL, 2)) {
+ If (\FLVL <= 2) {
Return (CTOK (FAN2_THRESHOLD_OFF))
} Else {
Return (CTOK (FAN2_THRESHOLD_ON))
@@ -135,7 +135,7 @@
}
Method (_AC3) {
- If (LLessEqual (\FLVL, 3)) {
+ If (\FLVL <= 3) {
Return (CTOK (FAN3_THRESHOLD_OFF))
} Else {
Return (CTOK (FAN3_THRESHOLD_ON))
@@ -143,7 +143,7 @@
}
Method (_AC4) {
- If (LLessEqual (\FLVL, 4)) {
+ If (\FLVL <= 4) {
Return (CTOK (FAN4_THRESHOLD_OFF))
} Else {
Return (CTOK (FAN4_THRESHOLD_ON))
@@ -159,25 +159,23 @@
PowerResource (FNP0, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 0)) {
+ If (\FLVL <= 0) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- If (LNot (_STA ())) {
- Store (0, \FLVL)
- Store (FAN0_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ If (!_STA ()) {
+ \FLVL = 0
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN0_PWM
Notify (\_TZ.THRM, 0x81)
}
}
Method (_OFF) {
If (_STA ()) {
- Store (1, \FLVL)
- Store (FAN1_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ \FLVL = 1
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN1_PWM
Notify (\_TZ.THRM, 0x81)
}
}
@@ -186,25 +184,23 @@
PowerResource (FNP1, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 1)) {
+ If (\FLVL <= 1) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- If (LNot (_STA ())) {
- Store (1, \FLVL)
- Store (FAN1_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ If (!_STA ()) {
+ \FLVL = 1
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN1_PWM
Notify (\_TZ.THRM, 0x81)
}
}
Method (_OFF) {
If (_STA ()) {
- Store (2, \FLVL)
- Store (FAN2_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ \FLVL = 2
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN2_PWM
Notify (\_TZ.THRM, 0x81)
}
}
@@ -213,25 +209,23 @@
PowerResource (FNP2, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 2)) {
+ If (\FLVL <= 2) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- If (LNot (_STA ())) {
- Store (2, \FLVL)
- Store (FAN2_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ If (!_STA ()) {
+ \FLVL = 2
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN2_PWM
Notify (\_TZ.THRM, 0x81)
}
}
Method (_OFF) {
If (_STA ()) {
- Store (3, \FLVL)
- Store (FAN3_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ \FLVL = 3
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN3_PWM
Notify (\_TZ.THRM, 0x81)
}
}
@@ -240,25 +234,23 @@
PowerResource (FNP3, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 3)) {
+ If (\FLVL <= 3) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- If (LNot (_STA ())) {
- Store (3, \FLVL)
- Store (FAN3_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ If (!_STA ()) {
+ \FLVL = 3
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN3_PWM
Notify (\_TZ.THRM, 0x81)
}
}
Method (_OFF) {
If (_STA ()) {
- Store (4, \FLVL)
- Store (FAN4_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ \FLVL = 4
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN4_PWM
Notify (\_TZ.THRM, 0x81)
}
}
@@ -267,25 +259,23 @@
PowerResource (FNP4, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 4)) {
+ If (\FLVL <= 4) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- If (LNot (_STA ())) {
- Store (4, \FLVL)
- Store (FAN4_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ If (!_STA ()) {
+ \FLVL = 4
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN4_PWM
Notify (\_TZ.THRM, 0x81)
}
}
Method (_OFF) {
If (_STA ()) {
- Store (4, \FLVL)
- Store (FAN4_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ \FLVL = 4
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN4_PWM
Notify (\_TZ.THRM, 0x81)
}
}
diff --git a/src/mainboard/google/butterfly/acpi/thermal.asl b/src/mainboard/google/butterfly/acpi/thermal.asl
index 4c6f6d9..ed381cd 100644
--- a/src/mainboard/google/butterfly/acpi/thermal.asl
+++ b/src/mainboard/google/butterfly/acpi/thermal.asl
@@ -21,10 +21,10 @@
// Convert from Degrees C to 1/10 Kelvin for ACPI
Method (CTOK, 1) {
// 10th of Degrees C
- Multiply (Arg0, 10, Local0)
+ Local0 = Arg0 * 10
// Convert to Kelvin
- Add (Local0, 2732, Local0)
+ Local0 += 2732
Return (Local0)
}
@@ -50,13 +50,13 @@
Method (_TMP, 0, Serialized)
{
// Get CPU Temperature from EC
- Store (\_SB.PCI0.LPCB.EC0.CTMP, Local0)
+ Local0 = \_SB.PCI0.LPCB.EC0.CTMP
// Convert to 1/10 Kelvin
- Multiply (Local0, 10, Local0)
+ Local0 *= 10
// Adjust by offset to get Kelvin
- Add (Local0, 2732, Local0)
+ Local0 += 2732
Return (Local0)
}
diff --git a/src/mainboard/google/cyan/variants/terra/include/variant/acpi/thermal.asl b/src/mainboard/google/cyan/variants/terra/include/variant/acpi/thermal.asl
index 1e2d286..94c80da 100644
--- a/src/mainboard/google/cyan/variants/terra/include/variant/acpi/thermal.asl
+++ b/src/mainboard/google/cyan/variants/terra/include/variant/acpi/thermal.asl
@@ -6,20 +6,20 @@
#if CONFIG(EC_SUPPORTS_DPTF_TEVT)
Method (TEVT, 1, NotSerialized)
{
- Store (ToInteger (Arg0), Local0)
+ Local0 = ToInteger (Arg0)
#ifdef DPTF_TSR0_SENSOR_ID
- If (LEqual (Local0, DPTF_TSR0_SENSOR_ID)) {
+ If (Local0 == DPTF_TSR0_SENSOR_ID) {
Notify (^TSR0, 0x90)
}
#endif
#ifdef DPTF_TSR1_SENSOR_ID
- If (LEqual (Local0, DPTF_TSR1_SENSOR_ID)) {
+ If (Local0 == DPTF_TSR1_SENSOR_ID) {
Notify (^TSR1, 0x90)
}
#endif
#ifdef DPTF_TSR2_SENSOR_ID
- If (LEqual (Local0, DPTF_TSR2_SENSOR_ID)) {
+ If (Local0 == DPTF_TSR2_SENSOR_ID) {
Notify (^TSR2, 0x90)
}
#endif
@@ -52,7 +52,7 @@
Method (_STA)
{
- If (LEqual (\DPTE, One)) {
+ If (\DPTE == 1) {
Return (0xF)
} Else {
Return (0x0)
@@ -67,7 +67,7 @@
/* Return passive thermal point defined by Terra2 or Terra3 mainboard */
Method (_PSV)
{
- If (LEqual (\_SB.GPID, TERRA2_PROJECT_ID))
+ If (\_SB.GPID == TERRA2_PROJECT_ID)
{
Return (CTOK (DPTF_TERRA2_TSR0_PASSIVE))
} Else {
@@ -78,7 +78,7 @@
/* Return critical thermal point defined by Terra2 or Terra3 mainboard */
Method (_CRT)
{
- If (LEqual (\_SB.GPID, TERRA2_PROJECT_ID))
+ If (\_SB.GPID == TERRA2_PROJECT_ID)
{
Return (CTOK (DPTF_TERRA2_TSR0_CRITICAL))
} Else {
@@ -120,7 +120,7 @@
Method (_STA)
{
- If (LEqual (\DPTE, One)) {
+ If (\DPTE == 1) {
Return (0xF)
} Else {
Return (0x0)
@@ -135,7 +135,7 @@
/* Return passive thermal point defined by Terra2 or Terra3 mainboard */
Method (_PSV)
{
- If (LEqual (\_SB.GPID, TERRA2_PROJECT_ID))
+ If (\_SB.GPID == TERRA2_PROJECT_ID)
{
Return (CTOK (DPTF_TERRA2_TSR1_PASSIVE))
} Else {
@@ -146,7 +146,7 @@
/* Return critical thermal point defined by Terra2 or Terra3 mainboard */
Method (_CRT)
{
- If (LEqual (\_SB.GPID, TERRA2_PROJECT_ID))
+ If (\_SB.GPID == TERRA2_PROJECT_ID)
{
Return (CTOK (DPTF_TERRA2_TSR1_CRITICAL))
} Else {
@@ -188,7 +188,7 @@
Method (_STA)
{
- If (LEqual (\DPTE, One)) {
+ If (\DPTE == 1) {
Return (0xF)
} Else {
Return (0x0)
@@ -203,7 +203,7 @@
/* Return passive thermal point defined by Terra2 or Terra3 mainboard */
Method (_PSV)
{
- If (LEqual (\_SB.GPID, TERRA2_PROJECT_ID))
+ If (\_SB.GPID == TERRA2_PROJECT_ID)
{
Return (CTOK (DPTF_TERRA2_TSR2_PASSIVE))
} Else {
@@ -214,7 +214,7 @@
/* Return critical thermal point defined by Terra2 or Terra3 mainboard */
Method (_CRT)
{
- If (LEqual (\_SB.GPID, TERRA2_PROJECT_ID))
+ If (\_SB.GPID == TERRA2_PROJECT_ID)
{
Return (CTOK (DPTF_TERRA2_TSR2_CRITICAL))
} Else {
diff --git a/src/mainboard/google/jecht/variants/guado/include/variant/acpi/thermal.asl b/src/mainboard/google/jecht/variants/guado/include/variant/acpi/thermal.asl
index 2a16352..1ea32a6 100644
--- a/src/mainboard/google/jecht/variants/guado/include/variant/acpi/thermal.asl
+++ b/src/mainboard/google/jecht/variants/guado/include/variant/acpi/thermal.asl
@@ -24,10 +24,10 @@
// Convert from Degrees C to 1/10 Kelvin for ACPI
Method (CTOK, 1) {
// 10th of Degrees C
- Multiply (Arg0, 10, Local0)
+ Local0 = Arg0 * 10
// Convert to Kelvin
- Add (Local0, 2732, Local0)
+ Local0 += 2732
Return (Local0)
}
@@ -53,66 +53,66 @@
// Start fan at state 4 = lowest temp state
Method (_INI)
{
- Store (4, \FLVL)
- Store (FAN4_PWM, \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ \FLVL = 4
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN4_PWM
Notify (\_TZ.THRM, 0x81)
}
Method (TCHK, 0, Serialized)
{
// Get CPU Temperature from PECI via SuperIO TMPIN3
- Store (\_SB.PCI0.LPCB.SIO.ENVC.TIN3, Local0)
+ Local0 = \_SB.PCI0.LPCB.SIO.ENVC.TIN3
// Check for "no reading available
- If (LEqual (Local0, 0x80)) {
+ If (Local0 == 0x80) {
Return (CTOK (FAN0_THRESHOLD_ON))
}
// Check for invalid readings
- If (LOr (LEqual (Local0, 255), LEqual (Local0, 0))) {
+ If ((Local0 == 255) || (Local0 == 0)) {
Return (CTOK (FAN0_THRESHOLD_ON))
}
// PECI raw value is an offset from Tj_max
- Subtract (255, Local0, Local1)
+ Local1 = 255 - Local0
// Handle values greater than Tj_max
- If (LGreaterEqual (Local1, \TMAX)) {
+ If (Local1 >= \TMAX) {
Return (CTOK (\TMAX))
}
// Subtract from Tj_max to get temperature
- Subtract (\TMAX, Local1, Local0)
+ Local0 = \TMAX - Local1
Return (CTOK (Local0))
}
Method (_TMP, 0, Serialized)
{
// Get temperature from SuperIO in deci-kelvin
- Store (TCHK (), Local0)
+ Local0 = TCHK ()
// Critical temperature in deci-kelvin
- Store (CTOK (\TMAX), Local1)
+ Local1 = CTOK (\TMAX)
- If (LGreaterEqual (Local0, Local1)) {
- Store ("CRITICAL TEMPERATURE", Debug)
- Store (Local0, Debug)
+ If (Local0 >= Local1) {
+ Debug = "CRITICAL TEMPERATURE"
+ Debug = Local0
// Wait 1 second for SuperIO to re-poll
Sleep (1000)
// Re-read temperature from SuperIO
- Store (TCHK (), Local0)
+ Local0 = TCHK ()
- Store ("RE-READ TEMPERATURE", Debug)
- Store (Local0, Debug)
+ Debug = "RE-READ TEMPERATURE"
+ Debug = Local0
}
Return (Local0)
}
Method (_AC0) {
- If (LLessEqual (\FLVL, 0)) {
+ If (\FLVL <= 0) {
Return (CTOK (FAN0_THRESHOLD_OFF))
} Else {
Return (CTOK (FAN0_THRESHOLD_ON))
@@ -120,7 +120,7 @@
}
Method (_AC1) {
- If (LLessEqual (\FLVL, 1)) {
+ If (\FLVL <= 1) {
Return (CTOK (FAN1_THRESHOLD_OFF))
} Else {
Return (CTOK (FAN1_THRESHOLD_ON))
@@ -128,7 +128,7 @@
}
Method (_AC2) {
- If (LLessEqual (\FLVL, 2)) {
+ If (\FLVL <= 2) {
Return (CTOK (FAN2_THRESHOLD_OFF))
} Else {
Return (CTOK (FAN2_THRESHOLD_ON))
@@ -136,7 +136,7 @@
}
Method (_AC3) {
- If (LLessEqual (\FLVL, 3)) {
+ If (\FLVL <= 3) {
Return (CTOK (FAN3_THRESHOLD_OFF))
} Else {
Return (CTOK (FAN3_THRESHOLD_ON))
@@ -144,7 +144,7 @@
}
Method (_AC4) {
- If (LLessEqual (\FLVL, 4)) {
+ If (\FLVL <= 4) {
Return (CTOK (0))
} Else {
Return (CTOK (0))
@@ -160,25 +160,23 @@
PowerResource (FNP0, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 0)) {
+ If (\FLVL <= 0) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- If (LNot (_STA ())) {
- Store (0, \FLVL)
- Store (FAN0_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ If (!_STA ()) {
+ \FLVL = 0
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN0_PWM
Notify (\_TZ.THRM, 0x81)
}
}
Method (_OFF) {
If (_STA ()) {
- Store (1, \FLVL)
- Store (FAN1_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ \FLVL = 1
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN1_PWM
Notify (\_TZ.THRM, 0x81)
}
}
@@ -187,25 +185,23 @@
PowerResource (FNP1, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 1)) {
+ If (\FLVL <= 1) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- If (LNot (_STA ())) {
- Store (1, \FLVL)
- Store (FAN1_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ If (!_STA ()) {
+ \FLVL = 1
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN1_PWM
Notify (\_TZ.THRM, 0x81)
}
}
Method (_OFF) {
If (_STA ()) {
- Store (2, \FLVL)
- Store (FAN2_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ \FLVL = 2
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN2_PWM
Notify (\_TZ.THRM, 0x81)
}
}
@@ -214,25 +210,23 @@
PowerResource (FNP2, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 2)) {
+ If (\FLVL <= 2) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- If (LNot (_STA ())) {
- Store (2, \FLVL)
- Store (FAN2_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ If (!_STA ()) {
+ \FLVL = 2
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN2_PWM
Notify (\_TZ.THRM, 0x81)
}
}
Method (_OFF) {
If (_STA ()) {
- Store (3, \FLVL)
- Store (FAN3_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ \FLVL = 3
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN3_PWM
Notify (\_TZ.THRM, 0x81)
}
}
@@ -241,25 +235,23 @@
PowerResource (FNP3, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 3)) {
+ If (\FLVL <= 3) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- If (LNot (_STA ())) {
- Store (3, \FLVL)
- Store (FAN3_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ If (!_STA ()) {
+ \FLVL = 3
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN3_PWM
Notify (\_TZ.THRM, 0x81)
}
}
Method (_OFF) {
If (_STA ()) {
- Store (4, \FLVL)
- Store (FAN4_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ \FLVL = 4
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN4_PWM
Notify (\_TZ.THRM, 0x81)
}
}
@@ -268,25 +260,23 @@
PowerResource (FNP4, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 4)) {
+ If (\FLVL <= 4) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- If (LNot (_STA ())) {
- Store (4, \FLVL)
- Store (FAN4_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ If (!_STA ()) {
+ \FLVL = 4
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN4_PWM
Notify (\_TZ.THRM, 0x81)
}
}
Method (_OFF) {
If (_STA ()) {
- Store (4, \FLVL)
- Store (FAN4_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ \FLVL = 4
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN4_PWM
Notify (\_TZ.THRM, 0x81)
}
}
diff --git a/src/mainboard/google/jecht/variants/jecht/include/variant/acpi/thermal.asl b/src/mainboard/google/jecht/variants/jecht/include/variant/acpi/thermal.asl
index 2a16352..1ea32a6 100644
--- a/src/mainboard/google/jecht/variants/jecht/include/variant/acpi/thermal.asl
+++ b/src/mainboard/google/jecht/variants/jecht/include/variant/acpi/thermal.asl
@@ -24,10 +24,10 @@
// Convert from Degrees C to 1/10 Kelvin for ACPI
Method (CTOK, 1) {
// 10th of Degrees C
- Multiply (Arg0, 10, Local0)
+ Local0 = Arg0 * 10
// Convert to Kelvin
- Add (Local0, 2732, Local0)
+ Local0 += 2732
Return (Local0)
}
@@ -53,66 +53,66 @@
// Start fan at state 4 = lowest temp state
Method (_INI)
{
- Store (4, \FLVL)
- Store (FAN4_PWM, \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ \FLVL = 4
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN4_PWM
Notify (\_TZ.THRM, 0x81)
}
Method (TCHK, 0, Serialized)
{
// Get CPU Temperature from PECI via SuperIO TMPIN3
- Store (\_SB.PCI0.LPCB.SIO.ENVC.TIN3, Local0)
+ Local0 = \_SB.PCI0.LPCB.SIO.ENVC.TIN3
// Check for "no reading available
- If (LEqual (Local0, 0x80)) {
+ If (Local0 == 0x80) {
Return (CTOK (FAN0_THRESHOLD_ON))
}
// Check for invalid readings
- If (LOr (LEqual (Local0, 255), LEqual (Local0, 0))) {
+ If ((Local0 == 255) || (Local0 == 0)) {
Return (CTOK (FAN0_THRESHOLD_ON))
}
// PECI raw value is an offset from Tj_max
- Subtract (255, Local0, Local1)
+ Local1 = 255 - Local0
// Handle values greater than Tj_max
- If (LGreaterEqual (Local1, \TMAX)) {
+ If (Local1 >= \TMAX) {
Return (CTOK (\TMAX))
}
// Subtract from Tj_max to get temperature
- Subtract (\TMAX, Local1, Local0)
+ Local0 = \TMAX - Local1
Return (CTOK (Local0))
}
Method (_TMP, 0, Serialized)
{
// Get temperature from SuperIO in deci-kelvin
- Store (TCHK (), Local0)
+ Local0 = TCHK ()
// Critical temperature in deci-kelvin
- Store (CTOK (\TMAX), Local1)
+ Local1 = CTOK (\TMAX)
- If (LGreaterEqual (Local0, Local1)) {
- Store ("CRITICAL TEMPERATURE", Debug)
- Store (Local0, Debug)
+ If (Local0 >= Local1) {
+ Debug = "CRITICAL TEMPERATURE"
+ Debug = Local0
// Wait 1 second for SuperIO to re-poll
Sleep (1000)
// Re-read temperature from SuperIO
- Store (TCHK (), Local0)
+ Local0 = TCHK ()
- Store ("RE-READ TEMPERATURE", Debug)
- Store (Local0, Debug)
+ Debug = "RE-READ TEMPERATURE"
+ Debug = Local0
}
Return (Local0)
}
Method (_AC0) {
- If (LLessEqual (\FLVL, 0)) {
+ If (\FLVL <= 0) {
Return (CTOK (FAN0_THRESHOLD_OFF))
} Else {
Return (CTOK (FAN0_THRESHOLD_ON))
@@ -120,7 +120,7 @@
}
Method (_AC1) {
- If (LLessEqual (\FLVL, 1)) {
+ If (\FLVL <= 1) {
Return (CTOK (FAN1_THRESHOLD_OFF))
} Else {
Return (CTOK (FAN1_THRESHOLD_ON))
@@ -128,7 +128,7 @@
}
Method (_AC2) {
- If (LLessEqual (\FLVL, 2)) {
+ If (\FLVL <= 2) {
Return (CTOK (FAN2_THRESHOLD_OFF))
} Else {
Return (CTOK (FAN2_THRESHOLD_ON))
@@ -136,7 +136,7 @@
}
Method (_AC3) {
- If (LLessEqual (\FLVL, 3)) {
+ If (\FLVL <= 3) {
Return (CTOK (FAN3_THRESHOLD_OFF))
} Else {
Return (CTOK (FAN3_THRESHOLD_ON))
@@ -144,7 +144,7 @@
}
Method (_AC4) {
- If (LLessEqual (\FLVL, 4)) {
+ If (\FLVL <= 4) {
Return (CTOK (0))
} Else {
Return (CTOK (0))
@@ -160,25 +160,23 @@
PowerResource (FNP0, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 0)) {
+ If (\FLVL <= 0) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- If (LNot (_STA ())) {
- Store (0, \FLVL)
- Store (FAN0_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ If (!_STA ()) {
+ \FLVL = 0
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN0_PWM
Notify (\_TZ.THRM, 0x81)
}
}
Method (_OFF) {
If (_STA ()) {
- Store (1, \FLVL)
- Store (FAN1_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ \FLVL = 1
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN1_PWM
Notify (\_TZ.THRM, 0x81)
}
}
@@ -187,25 +185,23 @@
PowerResource (FNP1, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 1)) {
+ If (\FLVL <= 1) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- If (LNot (_STA ())) {
- Store (1, \FLVL)
- Store (FAN1_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ If (!_STA ()) {
+ \FLVL = 1
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN1_PWM
Notify (\_TZ.THRM, 0x81)
}
}
Method (_OFF) {
If (_STA ()) {
- Store (2, \FLVL)
- Store (FAN2_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ \FLVL = 2
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN2_PWM
Notify (\_TZ.THRM, 0x81)
}
}
@@ -214,25 +210,23 @@
PowerResource (FNP2, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 2)) {
+ If (\FLVL <= 2) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- If (LNot (_STA ())) {
- Store (2, \FLVL)
- Store (FAN2_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ If (!_STA ()) {
+ \FLVL = 2
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN2_PWM
Notify (\_TZ.THRM, 0x81)
}
}
Method (_OFF) {
If (_STA ()) {
- Store (3, \FLVL)
- Store (FAN3_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ \FLVL = 3
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN3_PWM
Notify (\_TZ.THRM, 0x81)
}
}
@@ -241,25 +235,23 @@
PowerResource (FNP3, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 3)) {
+ If (\FLVL <= 3) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- If (LNot (_STA ())) {
- Store (3, \FLVL)
- Store (FAN3_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ If (!_STA ()) {
+ \FLVL = 3
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN3_PWM
Notify (\_TZ.THRM, 0x81)
}
}
Method (_OFF) {
If (_STA ()) {
- Store (4, \FLVL)
- Store (FAN4_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ \FLVL = 4
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN4_PWM
Notify (\_TZ.THRM, 0x81)
}
}
@@ -268,25 +260,23 @@
PowerResource (FNP4, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 4)) {
+ If (\FLVL <= 4) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- If (LNot (_STA ())) {
- Store (4, \FLVL)
- Store (FAN4_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ If (!_STA ()) {
+ \FLVL = 4
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN4_PWM
Notify (\_TZ.THRM, 0x81)
}
}
Method (_OFF) {
If (_STA ()) {
- Store (4, \FLVL)
- Store (FAN4_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ \FLVL = 4
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN4_PWM
Notify (\_TZ.THRM, 0x81)
}
}
diff --git a/src/mainboard/google/jecht/variants/rikku/include/variant/acpi/thermal.asl b/src/mainboard/google/jecht/variants/rikku/include/variant/acpi/thermal.asl
index 2a16352..1ea32a6 100644
--- a/src/mainboard/google/jecht/variants/rikku/include/variant/acpi/thermal.asl
+++ b/src/mainboard/google/jecht/variants/rikku/include/variant/acpi/thermal.asl
@@ -24,10 +24,10 @@
// Convert from Degrees C to 1/10 Kelvin for ACPI
Method (CTOK, 1) {
// 10th of Degrees C
- Multiply (Arg0, 10, Local0)
+ Local0 = Arg0 * 10
// Convert to Kelvin
- Add (Local0, 2732, Local0)
+ Local0 += 2732
Return (Local0)
}
@@ -53,66 +53,66 @@
// Start fan at state 4 = lowest temp state
Method (_INI)
{
- Store (4, \FLVL)
- Store (FAN4_PWM, \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ \FLVL = 4
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN4_PWM
Notify (\_TZ.THRM, 0x81)
}
Method (TCHK, 0, Serialized)
{
// Get CPU Temperature from PECI via SuperIO TMPIN3
- Store (\_SB.PCI0.LPCB.SIO.ENVC.TIN3, Local0)
+ Local0 = \_SB.PCI0.LPCB.SIO.ENVC.TIN3
// Check for "no reading available
- If (LEqual (Local0, 0x80)) {
+ If (Local0 == 0x80) {
Return (CTOK (FAN0_THRESHOLD_ON))
}
// Check for invalid readings
- If (LOr (LEqual (Local0, 255), LEqual (Local0, 0))) {
+ If ((Local0 == 255) || (Local0 == 0)) {
Return (CTOK (FAN0_THRESHOLD_ON))
}
// PECI raw value is an offset from Tj_max
- Subtract (255, Local0, Local1)
+ Local1 = 255 - Local0
// Handle values greater than Tj_max
- If (LGreaterEqual (Local1, \TMAX)) {
+ If (Local1 >= \TMAX) {
Return (CTOK (\TMAX))
}
// Subtract from Tj_max to get temperature
- Subtract (\TMAX, Local1, Local0)
+ Local0 = \TMAX - Local1
Return (CTOK (Local0))
}
Method (_TMP, 0, Serialized)
{
// Get temperature from SuperIO in deci-kelvin
- Store (TCHK (), Local0)
+ Local0 = TCHK ()
// Critical temperature in deci-kelvin
- Store (CTOK (\TMAX), Local1)
+ Local1 = CTOK (\TMAX)
- If (LGreaterEqual (Local0, Local1)) {
- Store ("CRITICAL TEMPERATURE", Debug)
- Store (Local0, Debug)
+ If (Local0 >= Local1) {
+ Debug = "CRITICAL TEMPERATURE"
+ Debug = Local0
// Wait 1 second for SuperIO to re-poll
Sleep (1000)
// Re-read temperature from SuperIO
- Store (TCHK (), Local0)
+ Local0 = TCHK ()
- Store ("RE-READ TEMPERATURE", Debug)
- Store (Local0, Debug)
+ Debug = "RE-READ TEMPERATURE"
+ Debug = Local0
}
Return (Local0)
}
Method (_AC0) {
- If (LLessEqual (\FLVL, 0)) {
+ If (\FLVL <= 0) {
Return (CTOK (FAN0_THRESHOLD_OFF))
} Else {
Return (CTOK (FAN0_THRESHOLD_ON))
@@ -120,7 +120,7 @@
}
Method (_AC1) {
- If (LLessEqual (\FLVL, 1)) {
+ If (\FLVL <= 1) {
Return (CTOK (FAN1_THRESHOLD_OFF))
} Else {
Return (CTOK (FAN1_THRESHOLD_ON))
@@ -128,7 +128,7 @@
}
Method (_AC2) {
- If (LLessEqual (\FLVL, 2)) {
+ If (\FLVL <= 2) {
Return (CTOK (FAN2_THRESHOLD_OFF))
} Else {
Return (CTOK (FAN2_THRESHOLD_ON))
@@ -136,7 +136,7 @@
}
Method (_AC3) {
- If (LLessEqual (\FLVL, 3)) {
+ If (\FLVL <= 3) {
Return (CTOK (FAN3_THRESHOLD_OFF))
} Else {
Return (CTOK (FAN3_THRESHOLD_ON))
@@ -144,7 +144,7 @@
}
Method (_AC4) {
- If (LLessEqual (\FLVL, 4)) {
+ If (\FLVL <= 4) {
Return (CTOK (0))
} Else {
Return (CTOK (0))
@@ -160,25 +160,23 @@
PowerResource (FNP0, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 0)) {
+ If (\FLVL <= 0) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- If (LNot (_STA ())) {
- Store (0, \FLVL)
- Store (FAN0_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ If (!_STA ()) {
+ \FLVL = 0
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN0_PWM
Notify (\_TZ.THRM, 0x81)
}
}
Method (_OFF) {
If (_STA ()) {
- Store (1, \FLVL)
- Store (FAN1_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ \FLVL = 1
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN1_PWM
Notify (\_TZ.THRM, 0x81)
}
}
@@ -187,25 +185,23 @@
PowerResource (FNP1, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 1)) {
+ If (\FLVL <= 1) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- If (LNot (_STA ())) {
- Store (1, \FLVL)
- Store (FAN1_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ If (!_STA ()) {
+ \FLVL = 1
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN1_PWM
Notify (\_TZ.THRM, 0x81)
}
}
Method (_OFF) {
If (_STA ()) {
- Store (2, \FLVL)
- Store (FAN2_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ \FLVL = 2
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN2_PWM
Notify (\_TZ.THRM, 0x81)
}
}
@@ -214,25 +210,23 @@
PowerResource (FNP2, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 2)) {
+ If (\FLVL <= 2) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- If (LNot (_STA ())) {
- Store (2, \FLVL)
- Store (FAN2_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ If (!_STA ()) {
+ \FLVL = 2
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN2_PWM
Notify (\_TZ.THRM, 0x81)
}
}
Method (_OFF) {
If (_STA ()) {
- Store (3, \FLVL)
- Store (FAN3_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ \FLVL = 3
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN3_PWM
Notify (\_TZ.THRM, 0x81)
}
}
@@ -241,25 +235,23 @@
PowerResource (FNP3, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 3)) {
+ If (\FLVL <= 3) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- If (LNot (_STA ())) {
- Store (3, \FLVL)
- Store (FAN3_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ If (!_STA ()) {
+ \FLVL = 3
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN3_PWM
Notify (\_TZ.THRM, 0x81)
}
}
Method (_OFF) {
If (_STA ()) {
- Store (4, \FLVL)
- Store (FAN4_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ \FLVL = 4
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN4_PWM
Notify (\_TZ.THRM, 0x81)
}
}
@@ -268,25 +260,23 @@
PowerResource (FNP4, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 4)) {
+ If (\FLVL <= 4) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- If (LNot (_STA ())) {
- Store (4, \FLVL)
- Store (FAN4_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ If (!_STA ()) {
+ \FLVL = 4
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN4_PWM
Notify (\_TZ.THRM, 0x81)
}
}
Method (_OFF) {
If (_STA ()) {
- Store (4, \FLVL)
- Store (FAN4_PWM,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ \FLVL = 4
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN4_PWM
Notify (\_TZ.THRM, 0x81)
}
}
diff --git a/src/mainboard/google/jecht/variants/tidus/include/variant/acpi/thermal.asl b/src/mainboard/google/jecht/variants/tidus/include/variant/acpi/thermal.asl
index e2f2675..f3b341e 100644
--- a/src/mainboard/google/jecht/variants/tidus/include/variant/acpi/thermal.asl
+++ b/src/mainboard/google/jecht/variants/tidus/include/variant/acpi/thermal.asl
@@ -39,99 +39,99 @@
// Convert from Degrees C to 1/10 Kelvin for ACPI
Method (CTOK, 1) {
// 10th of Degrees C
- Multiply (Arg0, 10, Local0)
+ Local0 = Arg0 * 10
// Convert to Kelvin
- Add (Local0, 2732, Local0)
+ Local0 += 2732
Return (Local0)
}
// Thermal Table 0
Method (TTB0, 0) {
- Store (FAN0_0_THRESHOLD_ON, F0ON)
- Store (FAN0_0_THRESHOLD_OFF, F0OF)
- Store (FAN0_0_PWM, F0PW)
- Store (FAN1_0_THRESHOLD_ON, F1ON)
- Store (FAN1_0_THRESHOLD_OFF, F1OF)
- Store (FAN1_0_PWM, F1PW)
- Store (FAN2_0_THRESHOLD_ON, F2ON)
- Store (FAN2_0_THRESHOLD_OFF, F2OF)
- Store (FAN2_0_PWM, F2PW)
- Store (FAN3_0_THRESHOLD_ON, F3ON)
- Store (FAN3_0_THRESHOLD_OFF, F3OF)
- Store (FAN3_0_PWM, F3PW)
- Store (FAN4_0_PWM, F4PW)
- Store (0, THTB)
+ F0ON = AN0_0_THRESHOLD_ON
+ F0OF = FAN0_0_THRESHOLD_OFF
+ F0PW = FAN0_0_PWM
+ F1ON = FAN1_0_THRESHOLD_ON
+ F1OF = FAN1_0_THRESHOLD_OFF
+ F1PW = FAN1_0_PWM
+ F2ON = FAN2_0_THRESHOLD_ON
+ F2OF = FAN2_0_THRESHOLD_OFF
+ F2PW = FAN2_0_PWM
+ F3ON = FAN3_0_THRESHOLD_ON
+ F3OF = FAN3_0_THRESHOLD_OFF
+ F3PW = FAN3_0_PWM
+ F4PW = FAN4_0_PWM
+ THTB = 0
}
// Thermal Table 1
Method (TTB1, 0) {
- Store (FAN0_1_THRESHOLD_ON, F0ON)
- Store (FAN0_1_THRESHOLD_OFF, F0OF)
- Store (FAN0_1_PWM, F0PW)
- Store (FAN1_1_THRESHOLD_ON, F1ON)
- Store (FAN1_1_THRESHOLD_OFF, F1OF)
- Store (FAN1_1_PWM, F1PW)
- Store (FAN2_1_THRESHOLD_ON, F2ON)
- Store (FAN2_1_THRESHOLD_OFF, F2OF)
- Store (FAN2_1_PWM, F2PW)
- Store (FAN3_1_THRESHOLD_ON, F3ON)
- Store (FAN3_1_THRESHOLD_OFF, F3OF)
- Store (FAN3_1_PWM, F3PW)
- Store (FAN4_1_PWM, F4PW)
- Store (1, THTB)
+ F0ON = FAN0_1_THRESHOLD_ON
+ F0OF = FAN0_1_THRESHOLD_OFF
+ F0PW = FAN0_1_PWM
+ F1ON = FAN1_1_THRESHOLD_ON
+ F1OF = FAN1_1_THRESHOLD_OFF
+ F1PW = FAN1_1_PWM
+ F2ON = FAN2_1_THRESHOLD_ON
+ F2OF = FAN2_1_THRESHOLD_OFF
+ F2PW = FAN2_1_PWM
+ F3ON = FAN3_1_THRESHOLD_ON
+ F3OF = FAN3_1_THRESHOLD_OFF
+ F3PW = FAN3_1_PWM
+ F4PW = FAN4_1_PWM
+ THTB = 1
}
// Thermal Table 2
Method (TTB2, 0) {
- Store (FAN0_2_THRESHOLD_ON, F0ON)
- Store (FAN0_2_THRESHOLD_OFF, F0OF)
- Store (FAN0_2_PWM, F0PW)
- Store (FAN1_2_THRESHOLD_ON, F1ON)
- Store (FAN1_2_THRESHOLD_OFF, F1OF)
- Store (FAN1_2_PWM, F1PW)
- Store (FAN2_2_THRESHOLD_ON, F2ON)
- Store (FAN2_2_THRESHOLD_OFF, F2OF)
- Store (FAN2_2_PWM, F2PW)
- Store (FAN3_2_THRESHOLD_ON, F3ON)
- Store (FAN3_2_THRESHOLD_OFF, F3OF)
- Store (FAN3_2_PWM, F3PW)
- Store (FAN4_2_PWM, F4PW)
- Store (2, THTB)
+ F0ON = FAN0_2_THRESHOLD_ON
+ F0OF = FAN0_2_THRESHOLD_OFF
+ F0PW = FAN0_2_PWM
+ F1ON = FAN1_2_THRESHOLD_ON
+ F1OF = FAN1_2_THRESHOLD_OFF
+ F1PW = FAN1_2_PWM
+ F2ON = FAN2_2_THRESHOLD_ON
+ F2OF = FAN2_2_THRESHOLD_OFF
+ F2PW = FAN2_2_PWM
+ F3ON = FAN3_2_THRESHOLD_ON
+ F3OF = FAN3_2_THRESHOLD_OFF
+ F3PW = FAN3_2_PWM
+ F4PW = FAN4_2_PWM
+ THTB = 2
}
// Update Thermal Table
Method (UPTB, 0) {
// Get System Temperature via SuperIO TMPIN2
- Store (\_SB.PCI0.LPCB.SIO.ENVC.TIN2, Local0)
+ Local0 = \_SB.PCI0.LPCB.SIO.ENVC.TIN2
// Check for "no reading available
- If (LEqual (Local0, 0x80)) {
- Store (THERMAL_POLICY_0_THRESHOLD_ON, Local0)
+ If (Local0 == 0x80) {
+ Local0 = THERMAL_POLICY_0_THRESHOLD_ON
}
// Check for invalid readings
- If (LOr (LEqual (Local0, 255), LEqual (Local0, 0))) {
- Store (THERMAL_POLICY_0_THRESHOLD_ON, Local0)
+ If ((Local0 == 255) || (Local0 == 0)) {
+ Local0 = THERMAL_POLICY_0_THRESHOLD_ON
}
- If (LEqual (THTB, 2)) {
- If (LGreaterEqual (Local0, THERMAL_POLICY_0_THRESHOLD_ON)) {
+ If (THTB == 2) {
+ If (Local0 >= THERMAL_POLICY_0_THRESHOLD_ON) {
TTB0 ()
- } ElseIf (LGreaterEqual (Local0, THERMAL_POLICY_1_THRESHOLD_ON)) {
+ } ElseIf (Local0 >= THERMAL_POLICY_1_THRESHOLD_ON) {
TTB1 ()
}
- } ElseIf (LEqual (THTB, 1)) {
- If (LGreaterEqual (Local0, THERMAL_POLICY_0_THRESHOLD_ON)) {
+ } ElseIf (THTB == 1) {
+ If (Local0 >= THERMAL_POLICY_0_THRESHOLD_ON) {
TTB0 ()
- } ElseIf (LLessEqual (Local0, THERMAL_POLICY_1_THRESHOLD_OFF)) {
+ } ElseIf (Local0 <= THERMAL_POLICY_1_THRESHOLD_OFF) {
TTB2 ()
}
} Else {
- If (LLess (Local0, THERMAL_POLICY_1_THRESHOLD_OFF)) {
+ If (Local0 < THERMAL_POLICY_1_THRESHOLD_OFF) {
TTB2 ()
- } ElseIf (LLessEqual (Local0, THERMAL_POLICY_0_THRESHOLD_OFF)) {
+ } ElseIf (Local0 <= THERMAL_POLICY_0_THRESHOLD_OFF) {
TTB1 ()
}
}
@@ -158,8 +158,8 @@
// Start fan at state 4 = lowest temp state
Method (_INI)
{
- Store (4, \FLVL)
- Store (FAN4_2_PWM, \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ \FLVL = 4
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = FAN4_2_PWM
Notify (\_TZ.THRM, 0x81)
}
@@ -169,58 +169,58 @@
UPTB ()
// Get CPU Temperature from PECI via SuperIO TMPIN3
- Store (\_SB.PCI0.LPCB.SIO.ENVC.TIN3, Local0)
+ Local0 = \_SB.PCI0.LPCB.SIO.ENVC.TIN3
// Check for "no reading available
- If (LEqual (Local0, 0x80)) {
+ If (Local0 == 0x80) {
Return (CTOK (FAN0_0_THRESHOLD_ON))
}
// Check for invalid readings
- If (LOr (LEqual (Local0, 255), LEqual (Local0, 0))) {
+ If ((Local0 == 255) || (Local0 == 0)) {
Return (CTOK (FAN0_0_THRESHOLD_ON))
}
// PECI raw value is an offset from Tj_max
- Subtract (255, Local0, Local1)
+ Local1 = 255 - Local0
// Handle values greater than Tj_max
- If (LGreaterEqual (Local1, \TMAX)) {
+ If (Local1 >= \TMAX) {
Return (CTOK (\TMAX))
}
// Subtract from Tj_max to get temperature
- Subtract (\TMAX, Local1, Local0)
+ Local0 = \TMAX - Local1
Return (CTOK (Local0))
}
Method (_TMP, 0, Serialized)
{
// Get temperature from SuperIO in deci-kelvin
- Store (TCHK (), Local0)
+ Local0 = TCHK ()
// Critical temperature in deci-kelvin
- Store (CTOK (\TMAX), Local1)
+ Local1 = CTOK (\TMAX)
- If (LGreaterEqual (Local0, Local1)) {
- Store ("CRITICAL TEMPERATURE", Debug)
- Store (Local0, Debug)
+ If (Local0 >= Local1) {
+ Debug = "CRITICAL TEMPERATURE"
+ Debug = Local0
// Wait 1 second for SuperIO to re-poll
Sleep (1000)
// Re-read temperature from SuperIO
- Store (TCHK (), Local0)
+ Local0 = TCHK ()
- Store ("RE-READ TEMPERATURE", Debug)
- Store (Local0, Debug)
+ Debug = "RE-READ TEMPERATURE"
+ Debug = Local0
}
Return (Local0)
}
Method (_AC0) {
- If (LLessEqual (\FLVL, 0)) {
+ If (\FLVL <= 0) {
Return (CTOK (F0OF))
} Else {
Return (CTOK (F0ON))
@@ -228,7 +228,7 @@
}
Method (_AC1) {
- If (LLessEqual (\FLVL, 1)) {
+ If (\FLVL <= 1) {
Return (CTOK (F1OF))
} Else {
Return (CTOK (F1ON))
@@ -236,7 +236,7 @@
}
Method (_AC2) {
- If (LLessEqual (\FLVL, 2)) {
+ If (\FLVL <= 2) {
Return (CTOK (F2OF))
} Else {
Return (CTOK (F2ON))
@@ -244,7 +244,7 @@
}
Method (_AC3) {
- If (LLessEqual (\FLVL, 3)) {
+ If (\FLVL <= 3) {
Return (CTOK (F3OF))
} Else {
Return (CTOK (F3ON))
@@ -252,7 +252,7 @@
}
Method (_AC4) {
- If (LLessEqual (\FLVL, 4)) {
+ If (\FLVL <= 4) {
Return (CTOK (0))
} Else {
Return (CTOK (0))
@@ -268,25 +268,23 @@
PowerResource (FNP0, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 0)) {
+ If (\FLVL <= 0) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- If (LNot (_STA ())) {
- Store (0, \FLVL)
- Store (F0PW,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ If (!_STA ()) {
+ \FLVL = 0
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = F0PW
Notify (\_TZ.THRM, 0x81)
}
}
Method (_OFF) {
If (_STA ()) {
- Store (1, \FLVL)
- Store (F1PW,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ \FLVL = 1
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = F1PW
Notify (\_TZ.THRM, 0x81)
}
}
@@ -295,25 +293,23 @@
PowerResource (FNP1, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 1)) {
+ If (\FLVL <= 1) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- If (LNot (_STA ())) {
- Store (1, \FLVL)
- Store (F1PW,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ If (!_STA ()) {
+ \FLVL = 1
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = F1PW
Notify (\_TZ.THRM, 0x81)
}
}
Method (_OFF) {
If (_STA ()) {
- Store (2, \FLVL)
- Store (F2PW,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ \FLVL = 2
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = F2PW
Notify (\_TZ.THRM, 0x81)
}
}
@@ -322,25 +318,23 @@
PowerResource (FNP2, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 2)) {
+ If (\FLVL <= 2) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- If (LNot (_STA ())) {
- Store (2, \FLVL)
- Store (F2PW,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ If (!_STA ()) {
+ \FLVL = 2
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = F2PW
Notify (\_TZ.THRM, 0x81)
}
}
Method (_OFF) {
If (_STA ()) {
- Store (3, \FLVL)
- Store (F3PW,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ \FLVL = 3
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = F3PW
Notify (\_TZ.THRM, 0x81)
}
}
@@ -349,25 +343,23 @@
PowerResource (FNP3, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 3)) {
+ If (\FLVL <= 3) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- If (LNot (_STA ())) {
- Store (3, \FLVL)
- Store (F3PW,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ If (!_STA ()) {
+ \FLVL = 3
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = F3PW
Notify (\_TZ.THRM, 0x81)
}
}
Method (_OFF) {
If (_STA ()) {
- Store (4, \FLVL)
- Store (F4PW,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ \FLVL = 4
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = F4PW
Notify (\_TZ.THRM, 0x81)
}
}
@@ -376,25 +368,23 @@
PowerResource (FNP4, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 4)) {
+ If (\FLVL <= 4) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- If (LNot (_STA ())) {
- Store (4, \FLVL)
- Store (F4PW,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ If (!_STA ()) {
+ \FLVL = 4
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = F4PW
Notify (\_TZ.THRM, 0x81)
}
}
Method (_OFF) {
If (_STA ()) {
- Store (4, \FLVL)
- Store (F4PW,
- \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
+ \FLVL = 4
+ \_SB.PCI0.LPCB.SIO.ENVC.F2PS = F4PW
Notify (\_TZ.THRM, 0x81)
}
}
diff --git a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/thermal.asl b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/thermal.asl
index 32a6549..73499b0 100644
--- a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/thermal.asl
+++ b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/thermal.asl
@@ -21,10 +21,10 @@
/* Convert from Degrees C to 1/10 Kelvin for ACPI */
Method (CTOK, 1) {
/* 10th of Degrees C */
- Multiply (Arg0, 10, Local0)
+ Local0 = Arg0 * 10
/* Convert to Kelvin */
- Add (Local0, 2732, Local0)
+ Local0 += 2732
Return (Local0)
}
@@ -50,23 +50,23 @@
Method (_TMP, 0, Serialized)
{
/* Get temperature from EC in deci-kelvin */
- Store (\_SB.PCI0.LPCB.EC0.TSRD (TMPS), Local0)
+ Local0 =\_SB.PCI0.LPCB.EC0.TSRD (TMPS)
/* Critical temperature in deci-kelvin */
- Store (CTOK (\TCRT), Local1)
+ Local1 = CTOK (\TCRT)
- If (LGreaterEqual (Local0, Local1)) {
- Store ("CRITICAL TEMPERATURE", Debug)
- Store (Local0, Debug)
+ If (Local0 >= Local1) {
+ Debug = "CRITICAL TEMPERATURE"
+ Debug = Local0
/* Wait 1 second for EC to re-poll */
Sleep (1000)
/* Re-read temperature from EC */
- Store (\_SB.PCI0.LPCB.EC0.TSRD (TMPS), Local0)
+ Local0 =\_SB.PCI0.LPCB.EC0.TSRD (TMPS)
- Store ("RE-READ TEMPERATURE", Debug)
- Store (Local0, Debug)
+ Debug = "RE-READ TEMPERATURE"
+ Debug = Local0
}
Return (Local0)
diff --git a/src/mainboard/google/link/acpi/thermal.asl b/src/mainboard/google/link/acpi/thermal.asl
index 28fa490..7ea38ae 100644
--- a/src/mainboard/google/link/acpi/thermal.asl
+++ b/src/mainboard/google/link/acpi/thermal.asl
@@ -15,10 +15,10 @@
// Convert from Degrees C to 1/10 Kelvin for ACPI
Method (CTOK, 1) {
// 10th of Degrees C
- Multiply (Arg0, 10, Local0)
+ Local0 = Arg0 * 10
// Convert to Kelvin
- Add (Local0, 2732, Local0)
+ Local0 += 2732
Return (Local0)
}
@@ -32,33 +32,33 @@
Method (_TMP, 0, Serialized)
{
// Get CPU Temperature from TIN9/PECI via EC
- Store (\_SB.PCI0.LPCB.EC0.TIN9, Local0)
+ Local0 = \_SB.PCI0.LPCB.EC0.TIN9
// Check for sensor not calibrated
- If (LEqual (Local0, \_SB.PCI0.LPCB.EC0.TNCA)) {
+ If (Local0 == \_SB.PCI0.LPCB.EC0.TNCA) {
Return (CTOK(0))
}
// Check for sensor not present
- If (LEqual (Local0, \_SB.PCI0.LPCB.EC0.TNPR)) {
+ If (Local0 == \_SB.PCI0.LPCB.EC0.TNPR) {
Return (CTOK(0))
}
// Check for sensor not powered
- If (LEqual (Local0, \_SB.PCI0.LPCB.EC0.TNOP)) {
+ If (Local0 == \_SB.PCI0.LPCB.EC0.TNOP) {
Return (CTOK(0))
}
// Check for sensor bad reading
- If (LEqual (Local0, \_SB.PCI0.LPCB.EC0.TBAD)) {
+ If (Local0 == \_SB.PCI0.LPCB.EC0.TBAD) {
Return (CTOK(0))
}
// Adjust by offset to get Kelvin
- Add (\_SB.PCI0.LPCB.EC0.TOFS, Local0, Local0)
+ Local0 += \_SB.PCI0.LPCB.EC0.TOFS
// Convert to 1/10 Kelvin
- Multiply (Local0, 10, Local0)
+ Local0 *= 10
Return (Local0)
}
}
@@ -77,10 +77,10 @@
// Convert from Degrees C to 1/10 Kelvin for ACPI
Method (CTOK, 1) {
// 10th of Degrees C
- Multiply (Arg0, 10, Local0)
+ Local0 = Arg0 * 10
// Convert to Kelvin
- Add (Local0, 2732, Local0)
+ Local0 += 2732
Return (Local0)
}
@@ -106,34 +106,34 @@
Method (_TMP, 0, Serialized)
{
// Get Temperature from TIN# set in NVS
- Store (\_SB.PCI0.LPCB.EC0.TINS (TMPS), Local0)
+ Local0 = \_SB.PCI0.LPCB.EC0.TINS (TMPS)
// Check for sensor not present
- If (LEqual (Local0, \_SB.PCI0.LPCB.EC0.TNPR)) {
+ If (Local0 == \_SB.PCI0.LPCB.EC0.TNPR) {
Return (CTOK(0))
}
// Check for sensor not powered
- If (LEqual (Local0, \_SB.PCI0.LPCB.EC0.TNOP)) {
+ If (Local0 == \_SB.PCI0.LPCB.EC0.TNOP) {
Return (CTOK(0))
}
// Check for sensor bad reading
- If (LEqual (Local0, \_SB.PCI0.LPCB.EC0.TBAD)) {
+ If (Local0 == \_SB.PCI0.LPCB.EC0.TBAD) {
Return (CTOK(0))
}
// Adjust by offset to get Kelvin
- Add (\_SB.PCI0.LPCB.EC0.TOFS, Local0, Local0)
+ Local0 += \_SB.PCI0.LPCB.EC0.TOFS
// Convert to 1/10 Kelvin
- Multiply (Local0, 10, Local0)
+ Local0 *= 10
Return (Local0)
}
/* CTDP Down */
Method (_AC0) {
- If (LLessEqual (\FLVL, 0)) {
+ If (\FLVL <= 0) {
Return (CTOK (\F0OF))
} Else {
Return (CTOK (\F0ON))
@@ -142,7 +142,7 @@
/* CTDP Nominal */
Method (_AC1) {
- If (LLessEqual (\FLVL, 1)) {
+ If (\FLVL <= 1) {
Return (CTOK (\F1OF))
} Else {
Return (CTOK (\F1ON))
@@ -155,19 +155,19 @@
PowerResource (TNP0, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 0)) {
+ If (\FLVL <= 0) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- Store (0, \FLVL)
+ \FLVL = 0
\_SB.PCI0.MCHC.STND ()
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
- Store (1, \FLVL)
+ \FLVL = 1
\_SB.PCI0.MCHC.STDN ()
Notify (\_TZ.THRM, 0x81)
}
@@ -176,18 +176,18 @@
PowerResource (TNP1, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 1)) {
+ If (\FLVL <= 1) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- Store (1, \FLVL)
+ \FLVL = 1
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
- Store (1, \FLVL)
+ \FLVL = 1
Notify (\_TZ.THRM, 0x81)
}
}
diff --git a/src/mainboard/google/parrot/acpi/thermal.asl b/src/mainboard/google/parrot/acpi/thermal.asl
index 852f58f..2d32d47 100644
--- a/src/mainboard/google/parrot/acpi/thermal.asl
+++ b/src/mainboard/google/parrot/acpi/thermal.asl
@@ -26,10 +26,10 @@
// Convert from Degrees C to 1/10 Kelvin for ACPI
Method (CTOK, 1) {
// 10th of Degrees C
- Multiply (Arg0, 10, Local0)
+ Local0 = Arg0 * 10
// Convert to Kelvin
- Add (Local0, 2732, Local0)
+ Local0 += 2732
Return (Local0)
}
@@ -55,23 +55,23 @@
Method (_TMP, 0, Serialized)
{
// Get CPU Temperature from the Embedded Controller
- Store (\_SB.PCI0.LPCB.EC0.CTMP, Local0)
+ Local0 = \_SB.PCI0.LPCB.EC0.CTMP
// Re-read from EC if the temperature is very high to
// avoid OS shutdown if we got a bad reading.
- If (LGreaterEqual (Local0, \TCRT)) {
- Store (\_SB.PCI0.LPCB.EC0.CTMP, Local0)
- If (LGreaterEqual (Local0, \TCRT)) {
+ If (Local0 >= \TCRT) {
+ Local0 = \_SB.PCI0.LPCB.EC0.CTMP
+ If (Local0 >= \TCRT) {
// Check if this is an early read
- If (LLess (CRDC, IRDC)) {
- Store (0, Local0)
+ If (CRDC < IRDC) {
+ Local0 = 0
}
}
}
// Keep track of first few reads by the OS
- If (LLess (CRDC, IRDC)) {
- Increment (CRDC)
+ If (CRDC < IRDC) {
+ CRDC++
}
Return (CTOK (Local0))
diff --git a/src/mainboard/google/slippy/acpi/thermal.asl b/src/mainboard/google/slippy/acpi/thermal.asl
index 74e73a2..838565b 100644
--- a/src/mainboard/google/slippy/acpi/thermal.asl
+++ b/src/mainboard/google/slippy/acpi/thermal.asl
@@ -12,7 +12,7 @@
// 1 = Start throttling
Method (THRT, 1, Serialized)
{
- If (LEqual (Arg0, 0)) {
+ If (Arg0 == 0) {
/* Disable Power Limit */
\_SB.PCI0.MCHC.CTLD ()
} Else {
@@ -35,10 +35,10 @@
// Convert from Degrees C to 1/10 Kelvin for ACPI
Method (CTOK, 1) {
// 10th of Degrees C
- Multiply (Arg0, 10, Local0)
+ Local0 = Arg0 * 10
// Convert to Kelvin
- Add (Local0, 2732, Local0)
+ Local0 += 2732
Return (Local0)
}
@@ -64,56 +64,56 @@
Method (TCHK, 0, Serialized)
{
// Get Temperature from TIN# set in NVS
- Store (\_SB.PCI0.LPCB.EC0.TINS (TMPS), Local0)
+ Local0 = \_SB.PCI0.LPCB.EC0.TINS (TMPS)
// Check for sensor not calibrated
- If (LEqual (Local0, \_SB.PCI0.LPCB.EC0.TNCA)) {
+ If (Local0 == \_SB.PCI0.LPCB.EC0.TNCA) {
Return (CTOK(0))
}
// Check for sensor not present
- If (LEqual (Local0, \_SB.PCI0.LPCB.EC0.TNPR)) {
+ If (Local0 == \_SB.PCI0.LPCB.EC0.TNPR) {
Return (CTOK(0))
}
// Check for sensor not powered
- If (LEqual (Local0, \_SB.PCI0.LPCB.EC0.TNOP)) {
+ If (Local0 == \_SB.PCI0.LPCB.EC0.TNOP) {
Return (CTOK(0))
}
// Check for sensor bad reading
- If (LEqual (Local0, \_SB.PCI0.LPCB.EC0.TBAD)) {
+ If (Local0 == \_SB.PCI0.LPCB.EC0.TBAD) {
Return (CTOK(0))
}
// Adjust by offset to get Kelvin
- Add (\_SB.PCI0.LPCB.EC0.TOFS, Local0, Local0)
+ Local0 += \_SB.PCI0.LPCB.EC0.TOFS
// Convert to 1/10 Kelvin
- Multiply (Local0, 10, Local0)
+ Local0 *= 10
Return (Local0)
}
Method (_TMP, 0, Serialized)
{
// Get temperature from EC in deci-kelvin
- Store (TCHK (), Local0)
+ Local0 = TCHK ()
// Critical temperature in deci-kelvin
- Store (CTOK (\TCRT), Local1)
+ Local1 = CTOK (\TCRT)
- If (LGreaterEqual (Local0, Local1)) {
- Store ("CRITICAL TEMPERATURE", Debug)
- Store (Local0, Debug)
+ If (Local0 >= Local1) {
+ Debug = "CRITICAL TEMPERATURE"
+ Debug = Local0
// Wait 1 second for EC to re-poll
Sleep (1000)
// Re-read temperature from EC
- Store (TCHK (), Local0)
+ Local0 = TCHK ()
- Store ("RE-READ TEMPERATURE", Debug)
- Store (Local0, Debug)
+ Debug = "RE-READ TEMPERATURE"
+ Debug = Local0
}
Return (Local0)
diff --git a/src/mainboard/google/stout/acpi/thermal.asl b/src/mainboard/google/stout/acpi/thermal.asl
index 2484332..72324d7 100644
--- a/src/mainboard/google/stout/acpi/thermal.asl
+++ b/src/mainboard/google/stout/acpi/thermal.asl
@@ -22,10 +22,10 @@
Method (CTOK, 1)
{
// 10th of Degrees C
- Multiply (Arg0, 10, Local0)
+ Local0 = Arg0 * 10
// Convert to Kelvin
- Add (Local0, 2732, Local0)
+ Local0 += 2732
Return (Local0)
}
@@ -51,21 +51,21 @@
Method (_TMP, 0, Serialized)
{
// Returns Higher of the two readings for CPU & VGA Temperature
- If (LGreater (\_SB.PCI0.LPCB.EC0.TMP2, \_SB.PCI0.LPCB.EC0.TMP1))
+ If (\_SB.PCI0.LPCB.EC0.TMP2 > \_SB.PCI0.LPCB.EC0.TMP1)
{
// CPU high temperature
- Store (\_SB.PCI0.LPCB.EC0.TMP2, Local0)
+ Local0 = \_SB.PCI0.LPCB.EC0.TMP2
}
Else
{
// VGA high temperature
- Store (\_SB.PCI0.LPCB.EC0.TMP1, Local0)
+ Local0 = \_SB.PCI0.LPCB.EC0.TMP1
}
// If temp less 35 or great then 115, set default 35
- If (Or (LLess (Local0, 35), LGreater (Local0, 115)))
+ If ((Local0 < 35) || (Local0 > 115))
{
- Store (35, Local0)
+ Local0 = 35
}
Return (CTOK (Local0))
diff --git a/src/mainboard/google/zork/variants/baseboard/include/baseboard/acpi/thermal.asl b/src/mainboard/google/zork/variants/baseboard/include/baseboard/acpi/thermal.asl
index 8f5aa6a..8576d12 100644
--- a/src/mainboard/google/zork/variants/baseboard/include/baseboard/acpi/thermal.asl
+++ b/src/mainboard/google/zork/variants/baseboard/include/baseboard/acpi/thermal.asl
@@ -21,10 +21,10 @@
/* Convert from Degrees C to 1/10 Kelvin for ACPI */
Method (CTOK, 1) {
/* 10th of Degrees C */
- Multiply (Arg0, 10, Local0)
+ Local0 = Arg0 * 10
/* Convert to Kelvin */
- Add (Local0, 2732, Local0)
+ Local0 += 2732
Return (Local0)
}
@@ -50,23 +50,23 @@
Method (_TMP, 0, Serialized)
{
/* Get temperature from EC in deci-kelvin */
- Store (\_SB.PCI0.LPCB.EC0.TSRD (TMPS), Local0)
+ Local0 =\_SB.PCI0.LPCB.EC0.TSRD (TMPS)
/* Critical temperature in deci-kelvin */
- Store (CTOK (\TCRT), Local1)
+ Local1 = CTOK (\TCRT)
- If (LGreaterEqual (Local0, Local1)) {
- Store ("CRITICAL TEMPERATURE", Debug)
- Store (Local0, Debug)
+ If (Local0 >= Local1) {
+ Debug = "CRITICAL TEMPERATURE"
+ Debug = Local0
/* Wait 1 second for EC to re-poll */
Sleep (1000)
/* Re-read temperature from EC */
- Store (\_SB.PCI0.LPCB.EC0.TSRD (TMPS), Local0)
+ Local0 =\_SB.PCI0.LPCB.EC0.TSRD (TMPS)
- Store ("RE-READ TEMPERATURE", Debug)
- Store (Local0, Debug)
+ Debug = "RE-READ TEMPERATURE"
+ Debug = Local0
}
Return (Local0)
diff --git a/src/mainboard/intel/baskingridge/acpi/thermal.asl b/src/mainboard/intel/baskingridge/acpi/thermal.asl
index 487b741..c1bb116 100644
--- a/src/mainboard/intel/baskingridge/acpi/thermal.asl
+++ b/src/mainboard/intel/baskingridge/acpi/thermal.asl
@@ -20,10 +20,10 @@
// Convert from Degrees C to 1/10 Kelvin for ACPI
Method (CTOK, 1) {
// 10th of Degrees C
- Multiply (Arg0, 10, Local0)
+ Local0 = Arg0 * 10
// Convert to Kelvin
- Add (Local0, 2732, Local0)
+ Local0 += 2732
Return (Local0)
}
@@ -52,7 +52,7 @@
}
Method (_AC0) {
- If (LLessEqual (\FLVL, 0)) {
+ If (\FLVL <= 0) {
Return (CTOK (\F0OF))
} Else {
Return (CTOK (\F0ON))
@@ -60,7 +60,7 @@
}
Method (_AC1) {
- If (LLessEqual (\FLVL, 1)) {
+ If (\FLVL <= 1) {
Return (CTOK (\F1OF))
} Else {
Return (CTOK (\F1ON))
@@ -68,7 +68,7 @@
}
Method (_AC2) {
- If (LLessEqual (\FLVL, 2)) {
+ If (\FLVL <= 2) {
Return (CTOK (\F2OF))
} Else {
Return (CTOK (\F2ON))
@@ -76,7 +76,7 @@
}
Method (_AC3) {
- If (LLessEqual (\FLVL, 3)) {
+ If (\FLVL <= 3) {
Return (CTOK (\F3OF))
} Else {
Return (CTOK (\F3ON))
@@ -84,7 +84,7 @@
}
Method (_AC4) {
- If (LLessEqual (\FLVL, 4)) {
+ If (\FLVL <= 4) {
Return (CTOK (\F4OF))
} Else {
Return (CTOK (\F4ON))
@@ -100,20 +100,20 @@
PowerResource (FNP0, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 0)) {
+ If (\FLVL <= 0) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- Store (0, \FLVL)
- Store (\F0PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ \FLVL = 0
+ \_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F0PW
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
- Store (1, \FLVL)
- Store (\F1PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ \FLVL = 1
+ \_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F1PW
Notify (\_TZ.THRM, 0x81)
}
}
@@ -121,20 +121,20 @@
PowerResource (FNP1, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 1)) {
+ If (\FLVL <= 1) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- Store (1, \FLVL)
- Store (\F1PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ \FLVL = 1
+ \_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F1PW
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
- Store (2, \FLVL)
- Store (\F2PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ \FLVL = 2
+ \_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F2PW
Notify (\_TZ.THRM, 0x81)
}
}
@@ -142,20 +142,20 @@
PowerResource (FNP2, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 2)) {
+ If (\FLVL <= 2) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- Store (2, \FLVL)
- Store (\F2PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ \FLVL = 2
+ \_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F2PW
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
- Store (3, \FLVL)
- Store (\F3PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ \FLVL = 3
+ \_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F3PW
Notify (\_TZ.THRM, 0x81)
}
}
@@ -163,20 +163,20 @@
PowerResource (FNP3, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 3)) {
+ If (\FLVL <= 3) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- Store (3, \FLVL)
- Store (\F3PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ \FLVL = 3
+ \_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F3PW
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
- Store (4, \FLVL)
- Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ \FLVL = 4
+ \_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F4PW
Notify (\_TZ.THRM, 0x81)
}
}
@@ -184,20 +184,20 @@
PowerResource (FNP4, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 4)) {
+ If (\FLVL <= 4) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- Store (4, \FLVL)
- Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ \FLVL = 4
+ \_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F4PW
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
- Store (4, \FLVL)
- Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ \FLVL = 4
+ \_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F4PW
Notify (\_TZ.THRM, 0x81)
}
}
diff --git a/src/mainboard/intel/emeraldlake2/acpi/thermal.asl b/src/mainboard/intel/emeraldlake2/acpi/thermal.asl
index 39d61b2..0a3bb49 100644
--- a/src/mainboard/intel/emeraldlake2/acpi/thermal.asl
+++ b/src/mainboard/intel/emeraldlake2/acpi/thermal.asl
@@ -21,10 +21,10 @@
// Convert from Degrees C to 1/10 Kelvin for ACPI
Method (CTOK, 1) {
// 10th of Degrees C
- Multiply (Arg0, 10, Local0)
+ Local0 = Arg0 * 10
// Convert to Kelvin
- Add (Local0, 2732, Local0)
+ Local0 += 2732
Return (Local0)
}
@@ -50,28 +50,28 @@
Method (_TMP, 0, Serialized)
{
// Get CPU Temperature from PECI via SuperIO TMPIN3
- Store (\_SB.PCI0.LPCB.SIO.ENVC.TIN3, Local0)
+ Local0 = \_SB.PCI0.LPCB.SIO.ENVC.TIN3
// Check for invalid readings
- If (LOr (LEqual (Local0, 255), LEqual (Local0, 0))) {
+ If ((Local0 == 255) || (Local0 == 0)) {
Return (CTOK (\F2ON))
}
// PECI raw value is an offset from Tj_max
- Subtract (255, Local0, Local1)
+ Local1 = 255 - Local0
// Handle values greater than Tj_max
- If (LGreaterEqual (Local1, \TMAX)) {
+ If (Local1 >= \TMAX) {
Return (CTOK (\TMAX))
}
// Subtract from Tj_max to get temperature
- Subtract (\TMAX, Local1, Local0)
+ Local0 = \TMAX - Local1
Return (CTOK (Local0))
}
Method (_AC0) {
- If (LLessEqual (\FLVL, 0)) {
+ If (\FLVL <= 0) {
Return (CTOK (\F0OF))
} Else {
Return (CTOK (\F0ON))
@@ -79,7 +79,7 @@
}
Method (_AC1) {
- If (LLessEqual (\FLVL, 1)) {
+ If (\FLVL <= 1) {
Return (CTOK (\F1OF))
} Else {
Return (CTOK (\F1ON))
@@ -87,7 +87,7 @@
}
Method (_AC2) {
- If (LLessEqual (\FLVL, 2)) {
+ If (\FLVL <= 2) {
Return (CTOK (\F2OF))
} Else {
Return (CTOK (\F2ON))
@@ -95,7 +95,7 @@
}
Method (_AC3) {
- If (LLessEqual (\FLVL, 3)) {
+ If (\FLVL <= 3) {
Return (CTOK (\F3OF))
} Else {
Return (CTOK (\F3ON))
@@ -103,7 +103,7 @@
}
Method (_AC4) {
- If (LLessEqual (\FLVL, 4)) {
+ If (\FLVL <= 4) {
Return (CTOK (\F4OF))
} Else {
Return (CTOK (\F4ON))
@@ -119,20 +119,20 @@
PowerResource (FNP0, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 0)) {
+ If (\FLVL <= 0) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- Store (0, \FLVL)
- Store (\F0PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ \FLVL = 0
+ \_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F0PW
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
- Store (1, \FLVL)
- Store (\F1PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ \FLVL = 1
+ \_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F1PW
Notify (\_TZ.THRM, 0x81)
}
}
@@ -140,20 +140,20 @@
PowerResource (FNP1, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 1)) {
+ If (\FLVL <= 1) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- Store (1, \FLVL)
- Store (\F1PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ \FLVL = 1
+ \_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F1PW
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
- Store (2, \FLVL)
- Store (\F2PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ \FLVL = 2
+ \_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F2PW
Notify (\_TZ.THRM, 0x81)
}
}
@@ -161,20 +161,20 @@
PowerResource (FNP2, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 2)) {
+ If (\FLVL <= 2) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- Store (2, \FLVL)
- Store (\F2PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ \FLVL = 2
+ \_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F2PW
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
- Store (3, \FLVL)
- Store (\F3PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ \FLVL = 3
+ \_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F3PW
Notify (\_TZ.THRM, 0x81)
}
}
@@ -182,20 +182,20 @@
PowerResource (FNP3, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 3)) {
+ If (\FLVL <= 3) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- Store (3, \FLVL)
- Store (\F3PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ \FLVL = 3
+ \_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F3PW
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
- Store (4, \FLVL)
- Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ \FLVL = 4
+ \_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F4PW
Notify (\_TZ.THRM, 0x81)
}
}
@@ -203,20 +203,20 @@
PowerResource (FNP4, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 4)) {
+ If (\FLVL <= 4) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- Store (4, \FLVL)
- Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ \FLVL = 4
+ \_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F4PW
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
- Store (4, \FLVL)
- Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ \FLVL = 4
+ \_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F4PW
Notify (\_TZ.THRM, 0x81)
}
}
diff --git a/src/mainboard/intel/wtm2/acpi/thermal.asl b/src/mainboard/intel/wtm2/acpi/thermal.asl
index cb56e97..fe3961e 100644
--- a/src/mainboard/intel/wtm2/acpi/thermal.asl
+++ b/src/mainboard/intel/wtm2/acpi/thermal.asl
@@ -22,10 +22,10 @@
// Convert from Degrees C to 1/10 Kelvin for ACPI
Method (CTOK, 1) {
// 10th of Degrees C
- Multiply (Arg0, 10, Local0)
+ Local0 = Arg0 * 10
// Convert to Kelvin
- Add (Local0, 2732, Local0)
+ Local0 += 2732
Return (Local0)
}
@@ -54,7 +54,7 @@
}
Method (_AC0) {
- If (LLessEqual (\FLVL, 0)) {
+ If (\FLVL <= 0) {
Return (CTOK (FAN0_THRESHOLD_OFF))
} Else {
Return (CTOK (FAN0_THRESHOLD_ON))
@@ -62,7 +62,7 @@
}
Method (_AC1) {
- If (LLessEqual (\FLVL, 1)) {
+ If (\FLVL <= 1) {
Return (CTOK (FAN1_THRESHOLD_OFF))
} Else {
Return (CTOK (FAN1_THRESHOLD_ON))
@@ -70,7 +70,7 @@
}
Method (_AC2) {
- If (LLessEqual (\FLVL, 2)) {
+ If (\FLVL <= 2) {
Return (CTOK (FAN2_THRESHOLD_OFF))
} Else {
Return (CTOK (FAN2_THRESHOLD_ON))
@@ -78,7 +78,7 @@
}
Method (_AC3) {
- If (LLessEqual (\FLVL, 3)) {
+ If (\FLVL <= 3) {
Return (CTOK (FAN3_THRESHOLD_OFF))
} Else {
Return (CTOK (FAN3_THRESHOLD_ON))
@@ -86,7 +86,7 @@
}
Method (_AC4) {
- If (LLessEqual (\FLVL, 4)) {
+ If (\FLVL <= 4) {
Return (CTOK (FAN4_THRESHOLD_OFF))
} Else {
Return (CTOK (FAN4_THRESHOLD_ON))
@@ -102,18 +102,18 @@
PowerResource (FNP0, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 0)) {
+ If (\FLVL <= 0) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- Store (0, \FLVL)
+ \FLVL = 0
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
- Store (1, \FLVL)
+ \FLVL = 1
Notify (\_TZ.THRM, 0x81)
}
}
@@ -121,18 +121,18 @@
PowerResource (FNP1, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 1)) {
+ If (\FLVL <= 1) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- Store (1, \FLVL)
+ \FLVL = 1
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
- Store (2, \FLVL)
+ \FLVL = 2
Notify (\_TZ.THRM, 0x81)
}
}
@@ -140,18 +140,18 @@
PowerResource (FNP2, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 2)) {
+ If (\FLVL <= 2) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- Store (2, \FLVL)
+ \FLVL = 2
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
- Store (3, \FLVL)
+ \FLVL = 3
Notify (\_TZ.THRM, 0x81)
}
}
@@ -159,18 +159,18 @@
PowerResource (FNP3, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 3)) {
+ If (\FLVL <= 3) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- Store (3, \FLVL)
+ \FLVL = 3
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
- Store (4, \FLVL)
+ \FLVL = 4
Notify (\_TZ.THRM, 0x81)
}
}
@@ -178,18 +178,18 @@
PowerResource (FNP4, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 4)) {
+ If (\FLVL <= 4) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- Store (4, \FLVL)
+ \FLVL = 4
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
- Store (4, \FLVL)
+ \FLVL = 4
Notify (\_TZ.THRM, 0x81)
}
}
diff --git a/src/mainboard/kontron/ktqm77/acpi/thermal.asl b/src/mainboard/kontron/ktqm77/acpi/thermal.asl
index 2400493..3465b75 100644
--- a/src/mainboard/kontron/ktqm77/acpi/thermal.asl
+++ b/src/mainboard/kontron/ktqm77/acpi/thermal.asl
@@ -21,10 +21,10 @@
// Convert from Degrees C to 1/10 Kelvin for ACPI
Method (CTOK, 1) {
// 10th of Degrees C
- Multiply (Arg0, 10, Local0)
+ Local0 = Arg0 * 10
// Convert to Kelvin
- Add (Local0, 2732, Local0)
+ Local0 += 2732
Return (Local0)
}
diff --git a/src/mainboard/packardbell/ms2290/acpi/thermal.asl b/src/mainboard/packardbell/ms2290/acpi/thermal.asl
index 8d24127..a41ddb4 100644
--- a/src/mainboard/packardbell/ms2290/acpi/thermal.asl
+++ b/src/mainboard/packardbell/ms2290/acpi/thermal.asl
@@ -6,13 +6,13 @@
Method(C2K, 1, NotSerialized)
{
- Multiply(Arg0, 10, Local0)
- Add (Local0, 2732, Local0)
- if (LLessEqual(Local0, 2732)) {
+ Local0 = Arg0 * 10
+ Local0 += 2732
+ if (Local0 <= 2732) {
Return (3000)
}
- if (LGreater(Local0, 4012)) {
+ if (Local0 > 4012) {
Return (3000)
}
Return (Local0)
@@ -25,7 +25,7 @@
}
Method(_TMP) {
/* Avoid tripping alarm if ME isn't booted at all yet */
- If (LAnd (LNot (MEBT), LEqual (\_SB.PCI0.LPCB.EC.TMP0, 128))) {
+ If ((!MEBT) && (\_SB.PCI0.LPCB.EC.TMP0 == 128)) {
Return (C2K(40))
}
Store (1, MEBT)
diff --git a/src/mainboard/roda/rk9/acpi/thermal.asl b/src/mainboard/roda/rk9/acpi/thermal.asl
index c9bc4d5..907edc1 100644
--- a/src/mainboard/roda/rk9/acpi/thermal.asl
+++ b/src/mainboard/roda/rk9/acpi/thermal.asl
@@ -43,18 +43,18 @@
Method (_TMP, 0, Serialized)
{
If (\_SB.PCI0.LPCB.EC0.ALRC) {
- Store(0, \_SB.PCI0.LPCB.EC0.ALRC)
+ \_SB.PCI0.LPCB.EC0.ALRC = 0
Return(_AC0())
}
If (\_SB.PCI0.LPCB.EC0.ALRL) {
- Store(0, THRO)
- Store(0, \_SB.PCI0.LPCB.EC0.ALRL)
+ THRO = 0
+ \_SB.PCI0.LPCB.EC0.ALRL = 0
}
If (\_SB.PCI0.LPCB.EC0.ALRH) {
- Store(1, THRO)
- Store(0, \_SB.PCI0.LPCB.EC0.ALRH)
+ THRO = 1
+ \_SB.PCI0.LPCB.EC0.ALRH = 0
}
/* vendor BIOS reports 0K if TCPU >= 128 deg C ?!? */
diff --git a/src/mainboard/roda/rv11/acpi/thermal.asl b/src/mainboard/roda/rv11/acpi/thermal.asl
index 7f356e3..1d18781 100644
--- a/src/mainboard/roda/rv11/acpi/thermal.asl
+++ b/src/mainboard/roda/rv11/acpi/thermal.asl
@@ -10,10 +10,10 @@
// Convert from Degrees C to 1/10 Kelvin for ACPI
Method (CTOK, 1) {
// 10th of Degrees C
- Multiply (Arg0, 10, Local0)
+ Local0 = Arg0 * 10
// Convert to Kelvin
- Add (Local0, 2732, Local0)
+ Local0 += 2732
Return (Local0)
}
@@ -49,17 +49,17 @@
Method (_TMP, 0, NotSerialized) // _TMP: Temperature
{
- Store (\_SB.PCI0.LPCB.EC0.CPUT, Local0)
+ Local0 = \_SB.PCI0.LPCB.EC0.CPUT
If (Local0 >= 0x80)
{
- Store ("-----> CPU Temperature (INVALID): ", Debug)
- Store (Local0, Debug)
+ Debug = "-----> CPU Temperature (INVALID): "
+ Debug = Local0
Return (CTOK (0))
}
- Store ("-----> CPU Temperature: ", Debug)
- Store (Local0, Debug)
+ Debug = "-----> CPU Temperature: "
+ Debug = Local0
Return (CTOK (Local0))
}
@@ -82,17 +82,17 @@
Method (_TMP, 0, NotSerialized) // _TMP: Temperature
{
- Store (\_SB.PCI0.LPCB.EC0.LOCT, Local0)
+ Local0 = \_SB.PCI0.LPCB.EC0.LOCT
If (Local0 >= 0x80)
{
- Store ("-----> LOC Temperature (INVALID): ", Debug)
- Store (Local0, Debug)
+ Debug = "-----> LOC Temperature (INVALID): "
+ Debug = Local0
Return (CTOK (0))
}
- Store ("-----> LOC Temperature: ", Debug)
- Store (Local0, Debug)
+ Debug = "-----> LOC Temperature: "
+ Debug = Local0
Return (CTOK (Local0))
}
@@ -114,17 +114,17 @@
Method (_TMP, 0, NotSerialized) // _TMP: Temperature
{
- Store (\_SB.PCI0.LPCB.EC0.OEMT, Local0)
+ Local0 = \_SB.PCI0.LPCB.EC0.OEMT
If (Local0 >= 0x80)
{
- Store ("-----> OEM Temperature (INVALID): ", Debug)
- Store (Local0, Debug)
+ Debug = "-----> OEM Temperature (INVALID): "
+ Debug = Local0
Return (CTOK (0))
}
- Store ("-----> OEM Temperature: ", Debug)
- Store (Local0, Debug)
+ Debug = "-----> OEM Temperature: "
+ Debug = Local0
Return (CTOK (Local0))
}
diff --git a/src/mainboard/samsung/lumpy/acpi/thermal.asl b/src/mainboard/samsung/lumpy/acpi/thermal.asl
index dd85181..55923bd 100644
--- a/src/mainboard/samsung/lumpy/acpi/thermal.asl
+++ b/src/mainboard/samsung/lumpy/acpi/thermal.asl
@@ -26,10 +26,10 @@
// Convert from Degrees C to 1/10 Kelvin for ACPI
Method (CTOK, 1) {
// 10th of Degrees C
- Multiply (Arg0, 10, Local0)
+ Local0 = Arg0 * 10
// Convert to Kelvin
- Add (Local0, 2732, Local0)
+ Local0 += 2732
Return (Local0)
}
@@ -55,27 +55,27 @@
Method (_TMP, 0, Serialized)
{
// Get CPU Temperature from the Embedded Controller
- Store (\_SB.PCI0.LPCB.EC0.CPUT, Local0)
+ Local0 = \_SB.PCI0.LPCB.EC0.CPUT
// Re-read from EC if the temperature is very high to
// avoid OS shutdown if we got a bad reading.
- If (LGreaterEqual (Local0, \TCRT)) {
- Store (\_SB.PCI0.LPCB.EC0.CPUT, Local0)
- If (LGreaterEqual (Local0, \TCRT)) {
+ If (Local0 >= \TCRT) {
+ Local0 = \_SB.PCI0.LPCB.EC0.CPUT
+ If (Local0 >= \TCRT) {
// Check if this is an early read
- If (LLess (CRDC, IRDC)) {
- Store (0, Local0)
+ If (CRDC < IRDC) {
+ Local0 = 0
}
}
}
// Keep track of first few reads by the OS
- If (LLess (CRDC, IRDC)) {
- Increment (CRDC)
+ If (CRDC < IRDC) {
+ CRDC++
}
// Invalid reading, ensure fan is spinning
- If (LGreaterEqual (Local0, 0x80)) {
+ If (Local0 >= 0x80) {
Return (CTOK (\F4ON))
}
@@ -83,7 +83,7 @@
}
Method (_AC0) {
- If (LLessEqual (\FLVL, 0)) {
+ If (\FLVL <= 0) {
Return (CTOK (\F0OF))
} Else {
Return (CTOK (\F0ON))
@@ -91,7 +91,7 @@
}
Method (_AC1) {
- If (LLessEqual (\FLVL, 1)) {
+ If (\FLVL <= 1) {
Return (CTOK (\F1OF))
} Else {
Return (CTOK (\F1ON))
@@ -99,7 +99,7 @@
}
Method (_AC2) {
- If (LLessEqual (\FLVL, 2)) {
+ If (\FLVL <= 2) {
Return (CTOK (\F2OF))
} Else {
Return (CTOK (\F2ON))
@@ -107,7 +107,7 @@
}
Method (_AC3) {
- If (LLessEqual (\FLVL, 3)) {
+ If (\FLVL <= 3) {
Return (CTOK (\F3OF))
} Else {
Return (CTOK (\F3ON))
@@ -115,7 +115,7 @@
}
Method (_AC4) {
- If (LLessEqual (\FLVL, 4)) {
+ If (\FLVL <= 4) {
Return (CTOK (\F4OF))
} Else {
Return (CTOK (\F4ON))
diff --git a/src/mainboard/samsung/stumpy/acpi/thermal.asl b/src/mainboard/samsung/stumpy/acpi/thermal.asl
index 39df88a..cf44aba 100644
--- a/src/mainboard/samsung/stumpy/acpi/thermal.asl
+++ b/src/mainboard/samsung/stumpy/acpi/thermal.asl
@@ -20,10 +20,10 @@
// Convert from Degrees C to 1/10 Kelvin for ACPI
Method (CTOK, 1) {
// 10th of Degrees C
- Multiply (Arg0, 10, Local0)
+ Local0 = Arg0 * 10
// Convert to Kelvin
- Add (Local0, 2732, Local0)
+ Local0 += 2732
Return (Local0)
}
@@ -49,28 +49,28 @@
Method (_TMP, 0, Serialized)
{
// Get CPU Temperature from PECI via SuperIO TMPIN3
- Store (\_SB.PCI0.LPCB.SIO.ENVC.TIN3, Local0)
+ Local0 = \_SB.PCI0.LPCB.SIO.ENVC.TIN3
// Check for invalid readings
- If (LOr (LEqual (Local0, 255), LEqual (Local0, 0))) {
+ If ((Local0 == 255) || (Local0 == 0)) {
Return (CTOK (\F2ON))
}
// PECI raw value is an offset from Tj_max
- Subtract (255, Local0, Local1)
+ Local1 = 255 - Local0
// Handle values greater than Tj_max
- If (LGreaterEqual (Local1, \TMAX)) {
+ If (Local1 >= \TMAX) {
Return (CTOK (\TMAX))
}
// Subtract from Tj_max to get temperature
- Subtract (\TMAX, Local1, Local0)
+ Local0 = \TMAX - Local1
Return (CTOK (Local0))
}
Method (_AC0) {
- If (LLessEqual (\FLVL, 0)) {
+ If (\FLVL <= 0) {
Return (CTOK (\F0OF))
} Else {
Return (CTOK (\F0ON))
@@ -78,7 +78,7 @@
}
Method (_AC1) {
- If (LLessEqual (\FLVL, 1)) {
+ If (\FLVL <= 1) {
Return (CTOK (\F1OF))
} Else {
Return (CTOK (\F1ON))
@@ -86,7 +86,7 @@
}
Method (_AC2) {
- If (LLessEqual (\FLVL, 2)) {
+ If (\FLVL <= 2) {
Return (CTOK (\F2OF))
} Else {
Return (CTOK (\F2ON))
@@ -94,7 +94,7 @@
}
Method (_AC3) {
- If (LLessEqual (\FLVL, 3)) {
+ If (\FLVL <= 3) {
Return (CTOK (\F3OF))
} Else {
Return (CTOK (\F3ON))
@@ -102,7 +102,7 @@
}
Method (_AC4) {
- If (LLessEqual (\FLVL, 4)) {
+ If (\FLVL <= 4) {
Return (CTOK (\F4OF))
} Else {
Return (CTOK (\F4ON))
@@ -118,20 +118,20 @@
PowerResource (FNP0, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 0)) {
+ If (\FLVL <= 0) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- Store (0, \FLVL)
- Store (\F0PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ \FLVL = 0
+ \_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F0PW
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
- Store (1, \FLVL)
- Store (\F1PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ \FLVL = 1
+ \_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F1PW
Notify (\_TZ.THRM, 0x81)
}
}
@@ -139,20 +139,20 @@
PowerResource (FNP1, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 1)) {
+ If (\FLVL <= 1) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- Store (1, \FLVL)
- Store (\F1PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ \FLVL = 1
+ \_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F1PW
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
- Store (2, \FLVL)
- Store (\F2PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ \FLVL = 2
+ \_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F2PW
Notify (\_TZ.THRM, 0x81)
}
}
@@ -160,20 +160,20 @@
PowerResource (FNP2, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 2)) {
+ If (\FLVL <= 2) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- Store (2, \FLVL)
- Store (\F2PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ \FLVL = 2
+ \_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F2PW
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
- Store (3, \FLVL)
- Store (\F3PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ \FLVL = 3
+ \_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F3PW
Notify (\_TZ.THRM, 0x81)
}
}
@@ -181,20 +181,20 @@
PowerResource (FNP3, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 3)) {
+ If (\FLVL <= 3) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- Store (3, \FLVL)
- Store (\F3PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ \FLVL = 3
+ \_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F3PW
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
- Store (4, \FLVL)
- Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ \FLVL = 4
+ \_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F4PW
Notify (\_TZ.THRM, 0x81)
}
}
@@ -202,20 +202,20 @@
PowerResource (FNP4, 0, 0)
{
Method (_STA) {
- If (LLessEqual (\FLVL, 4)) {
+ If (\FLVL <= 4) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
- Store (4, \FLVL)
- Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ \FLVL = 4
+ \_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F4PW
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
- Store (4, \FLVL)
- Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ \FLVL = 4
+ \_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F4PW
Notify (\_TZ.THRM, 0x81)
}
}
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ic46d6d99f02e14edb9a3d83e91f894c826fa01a8
Gerrit-Change-Number: 46047
Gerrit-PatchSet: 1
Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr>
Gerrit-MessageType: newchange
1
2
Change in coreboot[master]: mb/*/*/dsdt.asl: Convert to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 08 Oct '20
by HAOUAS Elyes (Code Review) 08 Oct '20
08 Oct '20
HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46052 )
Change subject: mb/*/*/dsdt.asl: Convert to ASL 2.0 syntax
......................................................................
mb/*/*/dsdt.asl: Convert to ASL 2.0 syntax
Change-Id: I1ccc3c7212ba0d5aaa81854f0035fa2945cab784
Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr>
---
M src/mainboard/asus/p2b/dsdt.asl
M src/mainboard/emulation/qemu-i440fx/dsdt.asl
M src/mainboard/emulation/qemu-q35/dsdt.asl
M src/mainboard/lippert/frontrunner-af/dsdt.asl
4 files changed, 103 insertions(+), 103 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/46052/1
diff --git a/src/mainboard/asus/p2b/dsdt.asl b/src/mainboard/asus/p2b/dsdt.asl
index a2a12ba..4b01070 100644
--- a/src/mainboard/asus/p2b/dsdt.asl
+++ b/src/mainboard/asus/p2b/dsdt.asl
@@ -66,23 +66,23 @@
Method (\_PTS, 1, NotSerialized)
{
/* Disable fan, blink power LED, if not turning off */
- If (LNotEqual (Arg0, 0x05))
+ If (Arg0 != 0x05)
{
- Store (Zero, FANM)
- Store (Zero, PLED)
+ FANM = 0
+ PLED = 0
}
/* Arms SMI for device 12 */
- Store (One, TO12)
+ TO12 = 1
/* Put out a POST code */
- Or (Arg0, 0xF0, P80)
+ P80 = Arg0 | 0xF0
}
Method (\_WAK, 1, NotSerialized)
{
/* Re-enable fan, stop power led blinking */
- Store (One, FANM)
- Store (One, PLED)
+ FANM = 1
+ PLED = 1
/* wake OK */
Return(Package(0x02){0x00, 0x00})
}
@@ -211,10 +211,10 @@
CreateWordField (BUF1, _Y07._MIN, SBLO)
CreateWordField (BUF1, _Y07._MAX, SBRL)
- And (\_SB.PCI0.PX43.PM00, 0xFFFE, PMLO)
- And (\_SB.PCI0.PX43.SB00, 0xFFFE, SBLO)
- Store (PMLO, PMRL)
- Store (SBLO, SBRL)
+ PMLO = \_SB.PCI0.PX43.PM00 & 0xFFFE
+ SBLO = \_SB.PCI0.PX43.SB00 & 0xFFFE
+ PMRL = PMLO
+ SBRL = SBLO
Return (BUF1)
}
}
@@ -245,13 +245,13 @@
{
Method (_MSG, 1, NotSerialized)
{
- If (LEqual (Arg0, Zero))
+ If (Arg0 == 0)
{
- Store (One, MSG0)
+ MSG0 = 1
}
Else
{
- Store (Zero, MSG0)
+ MSG0 = 0
}
}
}
diff --git a/src/mainboard/emulation/qemu-i440fx/dsdt.asl b/src/mainboard/emulation/qemu-i440fx/dsdt.asl
index 6fd4467..6ef05f7 100644
--- a/src/mainboard/emulation/qemu-i440fx/dsdt.asl
+++ b/src/mainboard/emulation/qemu-i440fx/dsdt.asl
@@ -48,7 +48,7 @@
Return (0x00)
}
Method(_S3D, 0, NotSerialized) {
- If (LEqual(VEND, 0x1001b36)) {
+ If (VEND == 0x1001b36) {
Return (0x03) // QXL
} Else {
Return (0x00)
@@ -120,7 +120,7 @@
/* Methods called by hotplug devices */
Method(PCEJ, 1, NotSerialized) {
// _EJ0 method - eject callback
- Store(ShiftLeft(1, Arg0), B0EJ)
+ B0EJ = 1 << Arg0
Return (0x0)
}
@@ -130,13 +130,13 @@
/* PCI hotplug notify method */
Method(PCNF, 0) {
// Local0 = iterator
- Store(Zero, Local0)
- While (LLess(Local0, 31)) {
- Increment(Local0)
- If (And(PCIU, ShiftLeft(1, Local0))) {
+ Local0 = 0
+ While (Local0 < 31) {
+ Local0++
+ If (PCIU & (1 << Local0)) {
PCNT(Local0, 1)
}
- If (And(PCID, ShiftLeft(1, Local0))) {
+ If (PCID & (1 << Local0)) {
PCNT(Local0, 3)
}
}
@@ -212,7 +212,7 @@
Method(IQST, 1, NotSerialized) {
// _STA method - get status
- If (And(0x80, Arg0)) {
+ If (0x80 & Arg0) {
Return (0x09)
}
Return (0x0B)
@@ -223,8 +223,8 @@
Interrupt(, Level, ActiveHigh, Shared) { 0 }
})
CreateDWordField(PRR0, 0x05, PRRI)
- If (LLess(Arg0, 0x80)) {
- Store(Arg0, PRRI)
+ If (Arg0 < 0x80) {
+ PRRI = Arg0
}
Return (PRR0)
}
@@ -242,14 +242,14 @@
Return (IQST(reg)) \
} \
Method(_DIS, 0, NotSerialized) { \
- Or(reg, 0x80, reg) \
+ reg |= 0x80 \
} \
Method(_CRS, 0, NotSerialized) { \
Return (IQCR(reg)) \
} \
Method(_SRS, 1, NotSerialized) { \
CreateDWordField(Arg0, 0x05, PRRI) \
- Store(PRRI, reg) \
+ reg = PRRI \
} \
}
diff --git a/src/mainboard/emulation/qemu-q35/dsdt.asl b/src/mainboard/emulation/qemu-q35/dsdt.asl
index d89d67f..8f7b7eb 100644
--- a/src/mainboard/emulation/qemu-q35/dsdt.asl
+++ b/src/mainboard/emulation/qemu-q35/dsdt.asl
@@ -45,31 +45,31 @@
CreateDWordField(Arg3, 0, CDW1)
// Check for proper UUID
- If (LEqual(Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) {
+ If (Arg0 == ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766")) {
// Create DWORD-addressable fields from the Capabilities Buffer
CreateDWordField(Arg3, 4, CDW2)
CreateDWordField(Arg3, 8, CDW3)
// Save Capabilities DWORD2 & 3
- Store(CDW2, SUPP)
- Store(CDW3, CTRL)
+ SUPP = CDW2
+ CTRL = CDW3
// Always allow native PME, AER (no dependencies)
// Never allow SHPC (no SHPC controller in this system)
- And(CTRL, 0x1D, CTRL)
+ CTRL &= 0x1D
- If (LNotEqual(Arg1, One)) {
+ If (Arg1 != 1) {
// Unknown revision
- Or(CDW1, 0x08, CDW1)
+ CDW1 |= 0x08
}
- If (LNotEqual(CDW3, CTRL)) {
+ If (CDW3 != CTRL) {
// Capabilities bits were masked
- Or(CDW1, 0x10, CDW1)
+ CDW1 |= 0x10
}
// Update DWORD3 in the buffer
- Store(CTRL, CDW3)
+ CDW3 = CTRL
} Else {
- Or(CDW1, 4, CDW1) // Unrecognized UUID
+ CDW1 |= 4 // Unrecognized UUID
}
Return (Arg3)
}
@@ -144,7 +144,7 @@
/* Zero => PIC mode, One => APIC Mode */
Name(\PICF, Zero)
Method(\_PIC, 1, NotSerialized) {
- Store(Arg0, \PICF)
+ \PICF = Arg0
}
Scope(\_SB) {
@@ -268,7 +268,7 @@
section 6.2.8.1 */
/* Note: we provide the same info as the PCI routing
table of the Bochs BIOS */
- If (LEqual(\PICF, Zero)) {
+ If (\PICF == 0) {
Return (PRTP)
} Else {
Return (PRTA)
@@ -291,7 +291,7 @@
Method(IQST, 1, NotSerialized) {
// _STA method - get status
- If (And(0x80, Arg0)) {
+ If (0x80 & Arg0) {
Return (0x09)
}
Return (0x0B)
@@ -302,7 +302,7 @@
Interrupt(, Level, ActiveHigh, Shared) { 0 }
})
CreateDWordField(PRR0, 0x05, PRRI)
- Store(And(Arg0, 0x0F), PRRI)
+ PRRI = Arg0 & 0x0F
Return (PRR0)
}
@@ -319,14 +319,14 @@
Return (IQST(reg)) \
} \
Method(_DIS, 0, NotSerialized) { \
- Or(reg, 0x80, reg) \
+ reg |= 0x80 \
} \
Method(_CRS, 0, NotSerialized) { \
Return (IQCR(reg)) \
} \
Method(_SRS, 1, NotSerialized) { \
CreateDWordField(Arg0, 0x05, PRRI) \
- Store(PRRI, reg) \
+ reg = PRRI \
} \
}
diff --git a/src/mainboard/lippert/frontrunner-af/dsdt.asl b/src/mainboard/lippert/frontrunner-af/dsdt.asl
index ffae0d9..0401989 100644
--- a/src/mainboard/lippert/frontrunner-af/dsdt.asl
+++ b/src/mainboard/lippert/frontrunner-af/dsdt.asl
@@ -370,20 +370,20 @@
Method(OSFL, 0){
- if(LNotEqual(OSVR, Ones)) {Return(OSVR)} /* OS version was already detected */
+ if (OSVR != Ones) {Return(OSVR)} /* OS version was already detected */
if(CondRefOf(\_OSI))
{
- Store(1, OSVR) /* Assume some form of XP */
+ OSVR = 1 /* Assume some form of XP */
if (\_OSI("Windows 2006")) /* Vista */
{
- Store(2, OSVR)
+ OSVR = 2
}
} else {
If(WCMP(\_OS,"Linux")) {
- Store(3, OSVR) /* Linux */
+ OSVR = 3 /* Linux */
} Else {
- Store(4, OSVR) /* Gotta be WinCE */
+ OSVR = 4 /* Gotta be WinCE */
}
}
Return(OSVR)
@@ -395,17 +395,17 @@
{
\_SB.CIRQ()
}
- Store(Arg0, PMOD)
+ PMOD = Arg0
}
Method(CIRQ, 0x00, NotSerialized){
- Store(0, PIRA)
- Store(0, PIRB)
- Store(0, PIRC)
- Store(0, PIRD)
- Store(0, PIRE)
- Store(0, PIRF)
- Store(0, PIRG)
- Store(0, PIRH)
+ PIRA = 0
+ PIRB = 0
+ PIRC = 0
+ PIRD = 0
+ PIRE = 0
+ PIRF = 0
+ PIRG = 0
+ PIRH = 0
}
Name(IRQB, ResourceTemplate(){
@@ -433,7 +433,7 @@
} /* End Method(_SB.INTA._STA) */
Method(_DIS ,0) {
- Store(0, PIRA)
+ PIRA = 0
} /* End Method(_SB.INTA._DIS) */
Method(_PRS ,0) {
@@ -442,7 +442,7 @@
Method(_CRS ,0) {
CreateWordField(IRQB, 0x1, IRQN)
- ShiftLeft(1, PIRA, IRQN)
+ IRQN = 1 << PIRA
Return(IRQB)
} /* Method(_SB.INTA._CRS) */
@@ -452,9 +452,9 @@
/* Use lowest available IRQ */
FindSetRightBit(IRQM, Local0)
if (Local0) {
- Decrement(Local0)
+ Local0--
}
- Store(Local0, PIRA)
+ PIRA = Local0
} /* End Method(_SB.INTA._SRS) */
} /* End Device(INTA) */
@@ -471,7 +471,7 @@
} /* End Method(_SB.INTB._STA) */
Method(_DIS ,0) {
- Store(0, PIRB)
+ PIRB = 0
} /* End Method(_SB.INTB._DIS) */
Method(_PRS ,0) {
@@ -480,7 +480,7 @@
Method(_CRS ,0) {
CreateWordField(IRQB, 0x1, IRQN)
- ShiftLeft(1, PIRB, IRQN)
+ IRQN = 1 << PIRB
Return(IRQB)
} /* Method(_SB.INTB._CRS) */
@@ -490,9 +490,9 @@
/* Use lowest available IRQ */
FindSetRightBit(IRQM, Local0)
if (Local0) {
- Decrement(Local0)
+ Local0--
}
- Store(Local0, PIRB)
+ PIRB = Local0
} /* End Method(_SB.INTB._SRS) */
} /* End Device(INTB) */
@@ -509,7 +509,7 @@
} /* End Method(_SB.INTC._STA) */
Method(_DIS ,0) {
- Store(0, PIRC)
+ PIRC = 0
} /* End Method(_SB.INTC._DIS) */
Method(_PRS ,0) {
@@ -518,7 +518,7 @@
Method(_CRS ,0) {
CreateWordField(IRQB, 0x1, IRQN)
- ShiftLeft(1, PIRC, IRQN)
+ IRQN = 1 << PIRC
Return(IRQB)
} /* Method(_SB.INTC._CRS) */
@@ -528,9 +528,9 @@
/* Use lowest available IRQ */
FindSetRightBit(IRQM, Local0)
if (Local0) {
- Decrement(Local0)
+ Local0--
}
- Store(Local0, PIRC)
+ PIRC = Local0
} /* End Method(_SB.INTC._SRS) */
} /* End Device(INTC) */
@@ -547,7 +547,7 @@
} /* End Method(_SB.INTD._STA) */
Method(_DIS ,0) {
- Store(0, PIRD)
+ PIRD = 0
} /* End Method(_SB.INTD._DIS) */
Method(_PRS ,0) {
@@ -556,7 +556,7 @@
Method(_CRS ,0) {
CreateWordField(IRQB, 0x1, IRQN)
- ShiftLeft(1, PIRD, IRQN)
+ IRQN = 1 << PIRD
Return(IRQB)
} /* Method(_SB.INTD._CRS) */
@@ -566,9 +566,9 @@
/* Use lowest available IRQ */
FindSetRightBit(IRQM, Local0)
if (Local0) {
- Decrement(Local0)
+ Local0--
}
- Store(Local0, PIRD)
+ PIRD = Local0
} /* End Method(_SB.INTD._SRS) */
} /* End Device(INTD) */
@@ -585,7 +585,7 @@
} /* End Method(_SB.INTE._STA) */
Method(_DIS ,0) {
- Store(0, PIRE)
+ PIRE = 0
} /* End Method(_SB.INTE._DIS) */
Method(_PRS ,0) {
@@ -594,7 +594,7 @@
Method(_CRS ,0) {
CreateWordField(IRQB, 0x1, IRQN)
- ShiftLeft(1, PIRE, IRQN)
+ IRQN = 1 << PIRE
Return(IRQB)
} /* Method(_SB.INTE._CRS) */
@@ -604,9 +604,9 @@
/* Use lowest available IRQ */
FindSetRightBit(IRQM, Local0)
if (Local0) {
- Decrement(Local0)
+ Local0--
}
- Store(Local0, PIRE)
+ PIRE = Local0
} /* End Method(_SB.INTE._SRS) */
} /* End Device(INTE) */
@@ -623,7 +623,7 @@
} /* End Method(_SB.INTF._STA) */
Method(_DIS ,0) {
- Store(0, PIRF)
+ PIRF = 0
} /* End Method(_SB.INTF._DIS) */
Method(_PRS ,0) {
@@ -632,7 +632,7 @@
Method(_CRS ,0) {
CreateWordField(IRQB, 0x1, IRQN)
- ShiftLeft(1, PIRF, IRQN)
+ IRQN = 1 << PIRF
Return(IRQB)
} /* Method(_SB.INTF._CRS) */
@@ -642,9 +642,9 @@
/* Use lowest available IRQ */
FindSetRightBit(IRQM, Local0)
if (Local0) {
- Decrement(Local0)
+ Local0--
}
- Store(Local0, PIRF)
+ PIRF = Local0
} /* End Method(_SB.INTF._SRS) */
} /* End Device(INTF) */
@@ -661,7 +661,7 @@
} /* End Method(_SB.INTG._STA) */
Method(_DIS ,0) {
- Store(0, PIRG)
+ PIRG = 0
} /* End Method(_SB.INTG._DIS) */
Method(_PRS ,0) {
@@ -670,7 +670,7 @@
Method(_CRS ,0) {
CreateWordField(IRQB, 0x1, IRQN)
- ShiftLeft(1, PIRG, IRQN)
+ IRQN = 1 << PIRG
Return(IRQB)
} /* Method(_SB.INTG._CRS) */
@@ -680,9 +680,9 @@
/* Use lowest available IRQ */
FindSetRightBit(IRQM, Local0)
if (Local0) {
- Decrement(Local0)
+ Local0--
}
- Store(Local0, PIRG)
+ PIRG = Local0
} /* End Method(_SB.INTG._SRS) */
} /* End Device(INTG) */
@@ -699,7 +699,7 @@
} /* End Method(_SB.INTH._STA) */
Method(_DIS ,0) {
- Store(0, PIRH)
+ PIRH = 0
} /* End Method(_SB.INTH._DIS) */
Method(_PRS ,0) {
@@ -708,7 +708,7 @@
Method(_CRS ,0) {
CreateWordField(IRQB, 0x1, IRQN)
- ShiftLeft(1, PIRH, IRQN)
+ IRQN = 1 << PIRH
Return(IRQB)
} /* Method(_SB.INTH._CRS) */
@@ -718,9 +718,9 @@
/* Use lowest available IRQ */
FindSetRightBit(IRQM, Local0)
if (Local0) {
- Decrement(Local0)
+ Local0--
}
- Store(Local0, PIRH)
+ PIRH = Local0
} /* End Method(_SB.INTH._SRS) */
} /* End Device(INTH) */
@@ -751,13 +751,13 @@
Method(\_PTS, 1) {
/* Don't allow PCIRST# to reset USB */
- if (LEqual(Arg0,3)){
- Store(0,URRE)
+ if (Arg0 == 3){
+ URRE = 0
}
/* Clear wake status structure. */
- Store(0, Index(WKST,0))
- Store(0, Index(WKST,1))
+ WKST [0] = 0
+ WKST [1] = 0
} /* End Method(\_PTS) */
/*
@@ -778,16 +778,16 @@
Method(\_WAK, 1) {
/* Re-enable HPET */
- Store(1,HPDE)
+ HPDE = 1
/* Restore PCIRST# so it resets USB */
- if (LEqual(Arg0,3)){
- Store(1,URRE)
+ if (Arg0 == 3){
+ URRE = 1
}
/* Arbitrarily clear PciExpWakeStatus */
- Store(PWST, Local1)
- Store(Local1, PWST)
+ Local1 = PWST
+ PWST = Local1
Return(WKST)
} /* End Method(\_WAK) */
@@ -862,7 +862,7 @@
Method (_OSC, 4)
{
/* Check for PCI/PCI-X/PCIe GUID */
- If (LEqual (Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766")))
+ If (Arg0 == ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))
{
/* Let OS control everything */
Return (Arg3)
@@ -871,7 +871,7 @@
{
/* Unrecognized UUID, so set bit 2 of Arg3 to 1 */
CreateDWordField (Arg3, 0, CDW1)
- Or (CDW1, 4, CDW1)
+ CDW1 |= 4
Return (Arg3)
}
} /* End _OSC */
@@ -1211,10 +1211,10 @@
* 32bit (0x00000000 - TOM1) will wrap and give the same
* result as 64bit (0x100000000 - TOM1).
*/
- Store(TOM1, MM1B)
- ShiftLeft(0x10000000, 4, Local0)
- Subtract(Local0, TOM1, Local0)
- Store(Local0, MM1L)
+ MM1B = TOM1
+ Local0 = 0x10000000 << 4
+ Local0 -= TOM1
+ MM1L = Local0
Return(CRES) /* note to change the Name buffer */
} /* end of Method(_SB.PCI0._CRS) */
--
To view, visit https://review.coreboot.org/c/coreboot/+/46052
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I1ccc3c7212ba0d5aaa81854f0035fa2945cab784
Gerrit-Change-Number: 46052
Gerrit-PatchSet: 1
Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr>
Gerrit-MessageType: newchange
1
2
Change in coreboot[master]: mb/lenovo: Convert to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 08 Oct '20
by HAOUAS Elyes (Code Review) 08 Oct '20
08 Oct '20
HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46082 )
Change subject: mb/lenovo: Convert to ASL 2.0 syntax
......................................................................
mb/lenovo: Convert to ASL 2.0 syntax
Change-Id: If47882e5ba6f98e98721f1d813503b697351a98f
Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr>
---
M src/mainboard/lenovo/g505s/acpi/gpe.asl
M src/mainboard/lenovo/s230u/acpi/ec.asl
M src/mainboard/lenovo/t400/acpi/dock.asl
M src/mainboard/lenovo/t400/acpi/gpe.asl
M src/mainboard/lenovo/t400/acpi/graphics.asl
M src/mainboard/lenovo/t410/acpi/dock.asl
M src/mainboard/lenovo/t410/acpi/gpe.asl
M src/mainboard/lenovo/t60/acpi/gpe.asl
M src/mainboard/lenovo/x200/acpi/dock.asl
M src/mainboard/lenovo/x200/acpi/gpe.asl
M src/mainboard/lenovo/x201/acpi/dock.asl
M src/mainboard/lenovo/x201/acpi/gpe.asl
M src/mainboard/lenovo/x60/acpi/gpe.asl
13 files changed, 85 insertions(+), 86 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/46082/1
diff --git a/src/mainboard/lenovo/g505s/acpi/gpe.asl b/src/mainboard/lenovo/g505s/acpi/gpe.asl
index 910d2e6..f137606 100644
--- a/src/mainboard/lenovo/g505s/acpi/gpe.asl
+++ b/src/mainboard/lenovo/g505s/acpi/gpe.asl
@@ -15,7 +15,7 @@
/* USB controller PME# */
Method(_L0B) {
- Store("USB PME", Debug)
+ Debug = "USB PME"
/* Notify devices of wake event */
Notify(\_SB.PCI0.UOH1, 0x02)
Notify(\_SB.PCI0.UOH2, 0x02)
@@ -37,16 +37,16 @@
/* Lid switch opened or closed */
Method(_L16) {
- Store("Lid status changed", Debug)
+ Debug = "Lid status changed"
/* Flip trigger polarity */
- Not(LPOL, LPOL)
+ LPOL = ~LPOL
/* Notify lid object of status change */
Notify(\_SB.LID, 0x80)
}
/* GPIO0 or GEvent8 event */
Method(_L18) {
- Store("PCI bridge wake event", Debug)
+ Debug = "PCI bridge wake event"
/* Notify PCI bridges of wake event */
Notify(\_SB.PCI0.PBR4, 0x02)
Notify(\_SB.PCI0.PBR5, 0x02)
diff --git a/src/mainboard/lenovo/s230u/acpi/ec.asl b/src/mainboard/lenovo/s230u/acpi/ec.asl
index 888feac..a1e7379 100644
--- a/src/mainboard/lenovo/s230u/acpi/ec.asl
+++ b/src/mainboard/lenovo/s230u/acpi/ec.asl
@@ -128,7 +128,7 @@
/* Switched to AC power */
Method (_Q26, 0, NotSerialized)
{
- Store (One, PWRS)
+ PWRS = 1
Notify (^AC, 0x80)
Notify (^BAT0, 0x80)
\PNOT ()
@@ -138,7 +138,7 @@
/* Switched to battery power */
Method (_Q27, 0, NotSerialized)
{
- Store (Zero, PWRS)
+ PWRS = 0
Notify (^AC, 0x80)
Notify (^BAT0, 0x80)
\PNOT ()
@@ -148,7 +148,7 @@
/* Lid openend */
Method (_Q2A, 0, NotSerialized)
{
- Store (One, LIDS)
+ LIDS = 1
Notify(^LID, 0x80)
^HKEY.MHKQ (0x5002)
}
@@ -156,7 +156,7 @@
/* Lid closed */
Method (_Q2B, 0, NotSerialized)
{
- Store (Zero, LIDS)
+ LIDS = 0
Notify(^LID, 0x80)
^HKEY.MHKQ (0x5001)
}
@@ -237,7 +237,7 @@
/* FN+Esc pressed / FN row mode switch */
Method (_Q74, 0, NotSerialized) {
- XOr(One, HKFA, HKFA)
+ HKFA = 1 ^ HKFA
^HKEY.MHKQ (0x6060)
}
@@ -271,11 +271,11 @@
{
Acquire (XDHK, 0xFFFF)
- ShiftLeft (One, Decrement (Arg0), Local0)
+ Local0 = 1 << Arg0--
If (Arg1) {
- Or (Local0, DHKN, DHKN)
+ DHKN |= Local0
} Else {
- And (Not(Local0), DHKN, DHKN)
+ DHKN &= ~Local0
}
Release (XDHK)
@@ -285,7 +285,7 @@
{
Acquire (XDHK, 0xFFFF)
- Store (Arg0, DHKC)
+ DHKC = Arg0
Release (XDHK)
}
@@ -294,11 +294,11 @@
{
Acquire (XDHK, 0xFFFF)
- Store (Zero, Local0)
+ Local0 = 0
if (DHKV) {
- Store (DHKV, Local0)
- Store (Zero, DHKV)
+ Local0 = DHKV
+ DHKV = 0
}
Release (XDHK)
@@ -310,7 +310,7 @@
{
Acquire (XDHK, 0xFFFF)
- Store (Arg0, DHKV)
+ DHKV = Arg0
Release (XDHK)
@@ -321,7 +321,7 @@
/* LED support for thinkpad-acpi */
Method (LED, 2, NotSerialized)
{
- Or (Arg0, Arg1, HLCL)
+ HLCL = Arg0 | Arg1
}
Device (AC)
diff --git a/src/mainboard/lenovo/t400/acpi/dock.asl b/src/mainboard/lenovo/t400/acpi/dock.asl
index 9a6d354..dce1d1a 100644
--- a/src/mainboard/lenovo/t400/acpi/dock.asl
+++ b/src/mainboard/lenovo/t400/acpi/dock.asl
@@ -12,14 +12,14 @@
{
if (Arg0) {
/* connect dock */
- Store (1, \GP28)
- Store (1, \_SB.PCI0.LPCB.EC.DKR1)
+ \GP28 = 1
+ \_SB.PCI0.LPCB.EC.DKR1 = 1
} else {
/* disconnect dock */
- Store (0, \GP28)
- Store (0, \_SB.PCI0.LPCB.EC.DKR1)
+ \GP28 = 0
+ \_SB.PCI0.LPCB.EC.DKR1 = 0
}
- Xor(Arg0, \_SB.PCI0.LPCB.EC.DKR1, Local0)
+ Local0 = Arg0 ^ \_SB.PCI0.LPCB.EC.DKR1
Return (Local0)
}
diff --git a/src/mainboard/lenovo/t400/acpi/gpe.asl b/src/mainboard/lenovo/t400/acpi/gpe.asl
index 62e7b37..9984636 100644
--- a/src/mainboard/lenovo/t400/acpi/gpe.asl
+++ b/src/mainboard/lenovo/t400/acpi/gpe.asl
@@ -5,8 +5,8 @@
Method(_L18, 0, NotSerialized)
{
/* Read EC register to clear wake status */
- Store(\_SB.PCI0.LPCB.EC.WAKE, Local0)
+ Local0 = \_SB.PCI0.LPCB.EC.WAKE
/* So that we don't get a warning that Local0 is unused. */
- Increment (Local0)
+ Local0++
}
}
diff --git a/src/mainboard/lenovo/t400/acpi/graphics.asl b/src/mainboard/lenovo/t400/acpi/graphics.asl
index 8780e2f..5559bfc 100644
--- a/src/mainboard/lenovo/t400/acpi/graphics.asl
+++ b/src/mainboard/lenovo/t400/acpi/graphics.asl
@@ -26,19 +26,19 @@
Method(SHYB, 1) {
/* Switch hybrid graphics */
- if (LEqual(Arg0, One))
+ if (Arg0 == One)
{
/* Discrete graphics requested */
- Or(GPLV, HYG1, GPLV)
- Or(GQLV, HYG2, GQLV)
+ GPLV |= HYG1
+ GQLV |= HYG2
}
else
{
/* Integrated graphics requested */
- Xor(HYG1, 0xFFFFFFFF, Local0)
- And(GPLV, Local0, GPLV)
- Xor(HYG2, 0xFFFFFFFF, Local0)
- And(GQLV, Local0, GQLV)
+ Local0 = HYG1 ^ 0xFFFFFFFF
+ GPLV &= Local0
+ Local0 = HYG2 ^ 0xFFFFFFFF
+ GQLV &= Local0
}
}
@@ -53,21 +53,21 @@
CreateDWordField (ATPR, 0x04, FUNC)
/* Version request */
- if (LEqual(Arg0, 0x0))
+ if (Arg0 == 0x0)
{
/* Assemble and return version information */
- Store (0x08, SIZE) /* Response length */
- Store (0x01, VERS) /* Version number */
- Store (0x0F, FUNC) /* Supported functions? */
+ SIZE = 0x08 /* Response length */
+ VERS = 0x01 /* Version number */
+ FUNC = 0x0F /* Supported functions? */
Return (ATPR)
}
/* Mux select */
- if (LEqual(Arg0, 0x2))
+ if (Arg0 == 0x2)
{
CreateByteField (Arg1, 0x02, PWST)
- Store (PWST, Local0)
- And (Local0, 0x01, Local0)
+ Local0 = PWST
+ Local0 &= 0x01
If (Local0)
{
/* Enable discrete graphics */
diff --git a/src/mainboard/lenovo/t410/acpi/dock.asl b/src/mainboard/lenovo/t410/acpi/dock.asl
index 4771c51..a94762f 100644
--- a/src/mainboard/lenovo/t410/acpi/dock.asl
+++ b/src/mainboard/lenovo/t410/acpi/dock.asl
@@ -12,18 +12,18 @@
{
if (Arg0) {
/* connect dock */
- Store (1, \GP28)
- Store (1, \_SB.PCI0.LPCB.EC.DKR1)
- Store (1, \_SB.PCI0.LPCB.EC.DKR2)
- Store (1, \_SB.PCI0.LPCB.EC.DKR3)
+ \GP28 = 1
+ \_SB.PCI0.LPCB.EC.DKR1 = 1
+ \_SB.PCI0.LPCB.EC.DKR2 = 1
+ \_SB.PCI0.LPCB.EC.DKR3 = 1
} else {
/* disconnect dock */
- Store (0, \GP28)
- Store (0, \_SB.PCI0.LPCB.EC.DKR1)
- Store (0, \_SB.PCI0.LPCB.EC.DKR2)
- Store (0, \_SB.PCI0.LPCB.EC.DKR3)
+ \GP28 = 0
+ \_SB.PCI0.LPCB.EC.DKR1 = 0
+ \_SB.PCI0.LPCB.EC.DKR2 = 0
+ \_SB.PCI0.LPCB.EC.DKR3 = 0
}
- Xor(Arg0, \_SB.PCI0.LPCB.EC.DKR1, Local0)
+ Local0 = Arg0 ^ \_SB.PCI0.LPCB.EC.DKR1
Return (Local0)
}
diff --git a/src/mainboard/lenovo/t410/acpi/gpe.asl b/src/mainboard/lenovo/t410/acpi/gpe.asl
index 62e7b37..9984636 100644
--- a/src/mainboard/lenovo/t410/acpi/gpe.asl
+++ b/src/mainboard/lenovo/t410/acpi/gpe.asl
@@ -5,8 +5,8 @@
Method(_L18, 0, NotSerialized)
{
/* Read EC register to clear wake status */
- Store(\_SB.PCI0.LPCB.EC.WAKE, Local0)
+ Local0 = \_SB.PCI0.LPCB.EC.WAKE
/* So that we don't get a warning that Local0 is unused. */
- Increment (Local0)
+ Local0++
}
}
diff --git a/src/mainboard/lenovo/t60/acpi/gpe.asl b/src/mainboard/lenovo/t60/acpi/gpe.asl
index 62e7b37..9984636 100644
--- a/src/mainboard/lenovo/t60/acpi/gpe.asl
+++ b/src/mainboard/lenovo/t60/acpi/gpe.asl
@@ -5,8 +5,8 @@
Method(_L18, 0, NotSerialized)
{
/* Read EC register to clear wake status */
- Store(\_SB.PCI0.LPCB.EC.WAKE, Local0)
+ Local0 = \_SB.PCI0.LPCB.EC.WAKE
/* So that we don't get a warning that Local0 is unused. */
- Increment (Local0)
+ Local0++
}
}
diff --git a/src/mainboard/lenovo/x200/acpi/dock.asl b/src/mainboard/lenovo/x200/acpi/dock.asl
index b612f06..ba8f46e 100644
--- a/src/mainboard/lenovo/x200/acpi/dock.asl
+++ b/src/mainboard/lenovo/x200/acpi/dock.asl
@@ -12,14 +12,14 @@
{
if (Arg0) {
/* connect dock */
- Store (1, \GP28)
- Store (1, \_SB.PCI0.LPCB.EC.DKR1)
+ \GP28 = 1
+ \_SB.PCI0.LPCB.EC.DKR1 = 1
} else {
/* disconnect dock */
- Store (0, \GP28)
- Store (0, \_SB.PCI0.LPCB.EC.DKR1)
+ \GP28 = 0
+ \_SB.PCI0.LPCB.EC.DKR1 = 0
}
- Xor(Arg0, \_SB.PCI0.LPCB.EC.DKR1, Local0)
+ Local0 = Arg0 ^ \_SB.PCI0.LPCB.EC.DKR1
Return (Local0)
}
@@ -32,16 +32,15 @@
/* Returns 0x7 (dock absent) or 0x3 (dock present) */
Method(GGID, 0, NotSerialized)
{
- Store(G_ID, Local0)
- if (LEqual(Local0, 0xFFFFFFFF))
+ Local0 = G_ID
+ if (Local0 == 0xFFFFFFFF)
{
- Store(Or (Or (GP02, ShiftLeft(GP03, 1)),
- ShiftLeft(GP04, 2)), Local0)
- If (LEqual(Local0, 0x00))
+ Local0 = GP02 | (GP03 << 1) | (GP04 << 2)
+ If (Local0 == 0x00)
{
- Store(0x03, Local0)
+ Local0 = 0x03
}
- Store(Local0, G_ID)
+ G_ID = Local0
}
return (Local0)
}
@@ -68,8 +67,8 @@
/* Undock button on dock */
Method(_Q50, 0, NotSerialized)
{
- Store(\_SB.DOCK.GGID (), Local0)
- if (LNotEqual(Local0, 0x07))
+ Local0 = \_SB.DOCK.GGID ()
+ if (Local0 != 0x07)
{
Notify(\_SB.DOCK, 3)
}
@@ -83,16 +82,16 @@
/* Unplug power: only disconnect dock on force eject */
Method(_Q5A, 0, NotSerialized)
{
- Store(\_SB.DOCK.GGID (), Local0)
- if (LEqual(Local0, 0x07))
+ Local0 = \_SB.DOCK.GGID ()
+ if (Local0 == 0x07)
{
Notify(\_SB.DOCK, 3)
}
- if (LEqual(Local0, 0x03))
+ if (Local0 == 0x03)
{
Sleep(0x64)
- Store(DKR1, Local1)
- if (LEqual(Local1, 1))
+ Local1 = DKR1
+ if (Local1 == 1)
{
Notify(\_SB.DOCK, 0)
}
diff --git a/src/mainboard/lenovo/x200/acpi/gpe.asl b/src/mainboard/lenovo/x200/acpi/gpe.asl
index 62e7b37..9984636 100644
--- a/src/mainboard/lenovo/x200/acpi/gpe.asl
+++ b/src/mainboard/lenovo/x200/acpi/gpe.asl
@@ -5,8 +5,8 @@
Method(_L18, 0, NotSerialized)
{
/* Read EC register to clear wake status */
- Store(\_SB.PCI0.LPCB.EC.WAKE, Local0)
+ Local0 = \_SB.PCI0.LPCB.EC.WAKE
/* So that we don't get a warning that Local0 is unused. */
- Increment (Local0)
+ Local0++
}
}
diff --git a/src/mainboard/lenovo/x201/acpi/dock.asl b/src/mainboard/lenovo/x201/acpi/dock.asl
index 0bf5a25..311e620 100644
--- a/src/mainboard/lenovo/x201/acpi/dock.asl
+++ b/src/mainboard/lenovo/x201/acpi/dock.asl
@@ -12,18 +12,18 @@
{
if (Arg0) {
/* connect dock */
- Store (1, \GP28)
- Store (1, \_SB.PCI0.LPCB.EC.DKR1)
- Store (1, \_SB.PCI0.LPCB.EC.DKR2)
- Store (1, \_SB.PCI0.LPCB.EC.DKR3)
+ \GP28 = 1
+ \_SB.PCI0.LPCB.EC.DKR1 = 1
+ \_SB.PCI0.LPCB.EC.DKR2 = 1
+ \_SB.PCI0.LPCB.EC.DKR3 = 1
} else {
/* disconnect dock */
- Store (0, \GP28)
- Store (0, \_SB.PCI0.LPCB.EC.DKR1)
- Store (0, \_SB.PCI0.LPCB.EC.DKR2)
- Store (0, \_SB.PCI0.LPCB.EC.DKR3)
+ \GP28 = 0
+ \_SB.PCI0.LPCB.EC.DKR1 = 0
+ \_SB.PCI0.LPCB.EC.DKR2 = 0
+ \_SB.PCI0.LPCB.EC.DKR3 = 0
}
- Xor(Arg0, \_SB.PCI0.LPCB.EC.DKR1, Local0)
+ Local0 = Arg0 ^ \_SB.PCI0.LPCB.EC.DKR1
Return (Local0)
}
diff --git a/src/mainboard/lenovo/x201/acpi/gpe.asl b/src/mainboard/lenovo/x201/acpi/gpe.asl
index 62e7b37..9984636 100644
--- a/src/mainboard/lenovo/x201/acpi/gpe.asl
+++ b/src/mainboard/lenovo/x201/acpi/gpe.asl
@@ -5,8 +5,8 @@
Method(_L18, 0, NotSerialized)
{
/* Read EC register to clear wake status */
- Store(\_SB.PCI0.LPCB.EC.WAKE, Local0)
+ Local0 = \_SB.PCI0.LPCB.EC.WAKE
/* So that we don't get a warning that Local0 is unused. */
- Increment (Local0)
+ Local0++
}
}
diff --git a/src/mainboard/lenovo/x60/acpi/gpe.asl b/src/mainboard/lenovo/x60/acpi/gpe.asl
index 62e7b37..9984636 100644
--- a/src/mainboard/lenovo/x60/acpi/gpe.asl
+++ b/src/mainboard/lenovo/x60/acpi/gpe.asl
@@ -5,8 +5,8 @@
Method(_L18, 0, NotSerialized)
{
/* Read EC register to clear wake status */
- Store(\_SB.PCI0.LPCB.EC.WAKE, Local0)
+ Local0 = \_SB.PCI0.LPCB.EC.WAKE
/* So that we don't get a warning that Local0 is unused. */
- Increment (Local0)
+ Local0++
}
}
--
To view, visit https://review.coreboot.org/c/coreboot/+/46082
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: If47882e5ba6f98e98721f1d813503b697351a98f
Gerrit-Change-Number: 46082
Gerrit-PatchSet: 1
Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr>
Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu>
Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-MessageType: newchange
1
1
Change in coreboot[master]: mb/google/rambi: Convert to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 08 Oct '20
by HAOUAS Elyes (Code Review) 08 Oct '20
08 Oct '20
HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46178 )
Change subject: mb/google/rambi: Convert to ASL 2.0 syntax
......................................................................
mb/google/rambi: Convert to ASL 2.0 syntax
Change-Id: I0a86b2f55338eb8e7195e847c0052e0352f4e650
Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr>
---
M src/mainboard/google/rambi/acpi/mainboard.asl
1 file changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/46178/1
diff --git a/src/mainboard/google/rambi/acpi/mainboard.asl b/src/mainboard/google/rambi/acpi/mainboard.asl
index 1d0c71e..bfbb66b 100644
--- a/src/mainboard/google/rambi/acpi/mainboard.asl
+++ b/src/mainboard/google/rambi/acpi/mainboard.asl
@@ -23,7 +23,7 @@
Method (_CRS)
{
/* Only return interrupt if I2C1 is PCI mode */
- If (LEqual (\S1EN, 0)) {
+ If (\S1EN == 0) {
Return (^RBUF)
}
@@ -51,7 +51,7 @@
Method (_CRS)
{
/* Return interrupt if I2C6 is PCI mode */
- If (LEqual (\S6EN, 0)) {
+ If (\S6EN == 0) {
Return (^RBUF)
}
@@ -93,7 +93,7 @@
Method (_STA)
{
- If (LEqual (\S2EN, 1)) {
+ If (\S2EN == 1) {
Return (0xF)
} Else {
Return (0x0)
--
To view, visit https://review.coreboot.org/c/coreboot/+/46178
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I0a86b2f55338eb8e7195e847c0052e0352f4e650
Gerrit-Change-Number: 46178
Gerrit-PatchSet: 1
Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr>
Gerrit-MessageType: newchange
1
0
Change in coreboot[master]: mb/google/glados: Convert to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 08 Oct '20
by HAOUAS Elyes (Code Review) 08 Oct '20
08 Oct '20
HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46173 )
Change subject: mb/google/glados: Convert to ASL 2.0 syntax
......................................................................
mb/google/glados: Convert to ASL 2.0 syntax
Change-Id: I7e9f9e9f724efe6db5199a36f01452ac93d4293a
Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr>
---
M src/mainboard/google/glados/variants/caroline/include/variant/acpi/mainboard.asl
1 file changed, 4 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/46173/1
diff --git a/src/mainboard/google/glados/variants/caroline/include/variant/acpi/mainboard.asl b/src/mainboard/google/glados/variants/caroline/include/variant/acpi/mainboard.asl
index f382e08..2cc694b 100644
--- a/src/mainboard/google/glados/variants/caroline/include/variant/acpi/mainboard.asl
+++ b/src/mainboard/google/glados/variants/caroline/include/variant/acpi/mainboard.asl
@@ -87,18 +87,17 @@
*/
Method (_DSM, 4, NotSerialized)
{
- If (LEqual (Arg0, ToUUID
- ("3cdff6f7-4267-4555-ad05-b30a3d8938de"))) {
- If (LEqual (Arg2, Zero)) {
+ If (Arg0 == ToUUID("3cdff6f7-4267-4555-ad05-b30a3d8938de")) {
+ If (Arg2 == 0) {
/* Function 0 - Query */
- If (LEqual (Arg1, One)) {
+ If (Arg1 == 1) {
/* Revision 1 Function 1 */
Return (Buffer (One) { 0x03 })
} Else {
/* Revision 2+ not supported */
Return (Buffer (One) { 0x00 })
}
- } ElseIf (LEqual (Arg2, One)) {
+ } ElseIf (Arg2 == 1) {
/* Function 1 - HID Descriptor Addr */
Return (0x0001)
} Else {
--
To view, visit https://review.coreboot.org/c/coreboot/+/46173
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I7e9f9e9f724efe6db5199a36f01452ac93d4293a
Gerrit-Change-Number: 46173
Gerrit-PatchSet: 1
Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr>
Gerrit-MessageType: newchange
1
0