HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46023 )
Change subject: mb/*/acpi: Convert sleep.asl to ASL 2.0 syntax ......................................................................
mb/*/acpi: Convert sleep.asl to ASL 2.0 syntax
Change-Id: I6b6459bc619e9d2ae0f8c57594897fd784b12ed6 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/mainboard/amd/gardenia/acpi/sleep.asl M src/mainboard/amd/inagua/acpi/sleep.asl M src/mainboard/amd/olivehill/acpi/sleep.asl M src/mainboard/amd/padmelon/acpi/sleep.asl M src/mainboard/amd/parmer/acpi/sleep.asl M src/mainboard/amd/persimmon/acpi/sleep.asl M src/mainboard/amd/south_station/acpi/sleep.asl M src/mainboard/amd/thatcher/acpi/sleep.asl M src/mainboard/amd/union_station/acpi/sleep.asl M src/mainboard/asrock/e350m1/acpi/sleep.asl M src/mainboard/asrock/imb-a180/acpi/sleep.asl M src/mainboard/asus/a88xm-e/acpi/sleep.asl M src/mainboard/asus/am1i-a/acpi/sleep.asl M src/mainboard/asus/f2a85-m/acpi/sleep.asl M src/mainboard/bap/ode_e20XX/acpi/sleep.asl M src/mainboard/biostar/a68n_5200/acpi/sleep.asl M src/mainboard/biostar/am1ml/acpi/sleep.asl M src/mainboard/elmex/pcm205400/acpi/sleep.asl M src/mainboard/gizmosphere/gizmo/acpi/sleep.asl M src/mainboard/gizmosphere/gizmo2/acpi/sleep.asl M src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/sleep.asl M src/mainboard/hp/abm/acpi/sleep.asl M src/mainboard/hp/pavilion_m6_1035dx/acpi/sleep.asl M src/mainboard/jetway/nf81-t56n-lf/acpi/sleep.asl M src/mainboard/lenovo/g505s/acpi/sleep.asl M src/mainboard/msi/ms7721/acpi/sleep.asl M src/mainboard/pcengines/apu1/acpi/sleep.asl M src/mainboard/pcengines/apu2/acpi/sleep.asl 28 files changed, 241 insertions(+), 241 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/46023/1
diff --git a/src/mainboard/amd/gardenia/acpi/sleep.asl b/src/mainboard/amd/gardenia/acpi/sleep.asl index 89c6fa1..0cbf8e3 100644 --- a/src/mainboard/amd/gardenia/acpi/sleep.asl +++ b/src/mainboard/amd/gardenia/acpi/sleep.asl @@ -26,10 +26,10 @@ /* DBGO("\n") */
/* Clear wake status structure. */ - Store(0, PEWD) - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) - Store(7, UPWS) + PEWD = 0 + WKST [0] = 0 + WKST [1] = 0 + UPWS = 7 } /* End Method(_PTS) */
/* diff --git a/src/mainboard/amd/inagua/acpi/sleep.asl b/src/mainboard/amd/inagua/acpi/sleep.asl index 76b5f9e..3b6fd02 100644 --- a/src/mainboard/amd/inagua/acpi/sleep.asl +++ b/src/mainboard/amd/inagua/acpi/sleep.asl @@ -26,23 +26,23 @@ /* DBGO("\n") */
/* Don't allow PCIRST# to reset USB */ - if (LEqual(Arg0,3)){ - Store(0,URRE) + if (Arg0 == 3){ + URRE = 0 }
/* Clear sleep SMI status flag and enable sleep SMI trap. */ - /*Store(One, CSSM) - Store(One, SSEN)*/ + /*CSSM = 1 + SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */ - /*if (LLessEqual(_SB.SBRI, 0x13)) { - * Store(0,_SB.PWDE) + /*if (_SB.SBRI <= 0x13) { + * _SB.PWDE = 0 *} */
/* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) + WKST [0] = 0 + WKST [1] = 0 } /* End Method(_PTS) */
/* @@ -67,21 +67,21 @@ /* DBGO(" to S0\n") */
/* Re-enable HPET */ - Store(1,HPDE) + HPDE = 1
/* Restore PCIRST# so it resets USB */ - if (LEqual(Arg0,3)){ - Store(1,URRE) + if (Arg0 == 3){ + URRE = 1 }
/* Arbitrarily clear PciExpWakeStatus */ - Store(PWST, Local1) - Store(Local1, PWST) + Local1 = PWST + PWST = Local1
- /* if (DeRefOf(Index(WKST,0))) { - * Store(0, Index(WKST,1)) + /* if (DeRefOf(WKST [0])) { + * WKST [1] = 0 * } else { - * Store(Arg0, Index(WKST,1)) + * WKST [1] = Arg0 * } */ Return(WKST) diff --git a/src/mainboard/amd/olivehill/acpi/sleep.asl b/src/mainboard/amd/olivehill/acpi/sleep.asl index 47dd146..fc26c30 100644 --- a/src/mainboard/amd/olivehill/acpi/sleep.asl +++ b/src/mainboard/amd/olivehill/acpi/sleep.asl @@ -30,9 +30,9 @@ /* DBGO("\n") */
/* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) - Store(7, UPWS) + WKST [0] = 0 + WKST [1] = 0 + UPWS = 7 _SB.APTS(Arg0) } /* End Method(_PTS) */
@@ -56,7 +56,7 @@ /* DBGO("From S") */ /* DBGO(Arg0) */ /* DBGO(" to S0\n") */ - Store(1,USBS) + USBS = 1
_SB.AWAK(Arg0)
diff --git a/src/mainboard/amd/padmelon/acpi/sleep.asl b/src/mainboard/amd/padmelon/acpi/sleep.asl index 89c6fa1..0cbf8e3 100644 --- a/src/mainboard/amd/padmelon/acpi/sleep.asl +++ b/src/mainboard/amd/padmelon/acpi/sleep.asl @@ -26,10 +26,10 @@ /* DBGO("\n") */
/* Clear wake status structure. */ - Store(0, PEWD) - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) - Store(7, UPWS) + PEWD = 0 + WKST [0] = 0 + WKST [1] = 0 + UPWS = 7 } /* End Method(_PTS) */
/* diff --git a/src/mainboard/amd/parmer/acpi/sleep.asl b/src/mainboard/amd/parmer/acpi/sleep.asl index dde9c37..cd714ce 100644 --- a/src/mainboard/amd/parmer/acpi/sleep.asl +++ b/src/mainboard/amd/parmer/acpi/sleep.asl @@ -26,20 +26,20 @@ /* DBGO("\n") */
/* Clear sleep SMI status flag and enable sleep SMI trap. */ - /*Store(One, CSSM) - Store(One, SSEN)*/ + /*CSSM = 1 + SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */ - /*if (LLessEqual(_SB.SBRI, 0x13)) { - * Store(0,_SB.PWDE) + /*if (_SB.SBRI <= 0x13) { + * _SB.PWDE = 0 *} */
/* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) + WKST [0] = 0 + WKST [1] = 0
- Store (0x07, UPWS) + UPWS = 0x07 } /* End Method(_PTS) */
/* @@ -64,7 +64,7 @@ /* DBGO(" to S0\n") */
/* Re-enable HPET */ - Store(1,USBS) + USBS = 1
Return(WKST) } /* End Method(_WAK) */ diff --git a/src/mainboard/amd/persimmon/acpi/sleep.asl b/src/mainboard/amd/persimmon/acpi/sleep.asl index 76b5f9e..3b6fd02 100644 --- a/src/mainboard/amd/persimmon/acpi/sleep.asl +++ b/src/mainboard/amd/persimmon/acpi/sleep.asl @@ -26,23 +26,23 @@ /* DBGO("\n") */
/* Don't allow PCIRST# to reset USB */ - if (LEqual(Arg0,3)){ - Store(0,URRE) + if (Arg0 == 3){ + URRE = 0 }
/* Clear sleep SMI status flag and enable sleep SMI trap. */ - /*Store(One, CSSM) - Store(One, SSEN)*/ + /*CSSM = 1 + SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */ - /*if (LLessEqual(_SB.SBRI, 0x13)) { - * Store(0,_SB.PWDE) + /*if (_SB.SBRI <= 0x13) { + * _SB.PWDE = 0 *} */
/* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) + WKST [0] = 0 + WKST [1] = 0 } /* End Method(_PTS) */
/* @@ -67,21 +67,21 @@ /* DBGO(" to S0\n") */
/* Re-enable HPET */ - Store(1,HPDE) + HPDE = 1
/* Restore PCIRST# so it resets USB */ - if (LEqual(Arg0,3)){ - Store(1,URRE) + if (Arg0 == 3){ + URRE = 1 }
/* Arbitrarily clear PciExpWakeStatus */ - Store(PWST, Local1) - Store(Local1, PWST) + Local1 = PWST + PWST = Local1
- /* if (DeRefOf(Index(WKST,0))) { - * Store(0, Index(WKST,1)) + /* if (DeRefOf(WKST [0])) { + * WKST [1] = 0 * } else { - * Store(Arg0, Index(WKST,1)) + * WKST [1] = Arg0 * } */ Return(WKST) diff --git a/src/mainboard/amd/south_station/acpi/sleep.asl b/src/mainboard/amd/south_station/acpi/sleep.asl index 76b5f9e..3b6fd02 100644 --- a/src/mainboard/amd/south_station/acpi/sleep.asl +++ b/src/mainboard/amd/south_station/acpi/sleep.asl @@ -26,23 +26,23 @@ /* DBGO("\n") */
/* Don't allow PCIRST# to reset USB */ - if (LEqual(Arg0,3)){ - Store(0,URRE) + if (Arg0 == 3){ + URRE = 0 }
/* Clear sleep SMI status flag and enable sleep SMI trap. */ - /*Store(One, CSSM) - Store(One, SSEN)*/ + /*CSSM = 1 + SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */ - /*if (LLessEqual(_SB.SBRI, 0x13)) { - * Store(0,_SB.PWDE) + /*if (_SB.SBRI <= 0x13) { + * _SB.PWDE = 0 *} */
/* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) + WKST [0] = 0 + WKST [1] = 0 } /* End Method(_PTS) */
/* @@ -67,21 +67,21 @@ /* DBGO(" to S0\n") */
/* Re-enable HPET */ - Store(1,HPDE) + HPDE = 1
/* Restore PCIRST# so it resets USB */ - if (LEqual(Arg0,3)){ - Store(1,URRE) + if (Arg0 == 3){ + URRE = 1 }
/* Arbitrarily clear PciExpWakeStatus */ - Store(PWST, Local1) - Store(Local1, PWST) + Local1 = PWST + PWST = Local1
- /* if (DeRefOf(Index(WKST,0))) { - * Store(0, Index(WKST,1)) + /* if (DeRefOf(WKST [0])) { + * WKST [1] = 0 * } else { - * Store(Arg0, Index(WKST,1)) + * WKST [1] = Arg0 * } */ Return(WKST) diff --git a/src/mainboard/amd/thatcher/acpi/sleep.asl b/src/mainboard/amd/thatcher/acpi/sleep.asl index af87ce6..e09a638 100644 --- a/src/mainboard/amd/thatcher/acpi/sleep.asl +++ b/src/mainboard/amd/thatcher/acpi/sleep.asl @@ -26,20 +26,20 @@ /* DBGO("\n") */
/* Clear sleep SMI status flag and enable sleep SMI trap. */ - /*Store(One, CSSM) - Store(One, SSEN)*/ + /*CSSM = 1 + SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */ - /*if (LLessEqual(_SB.SBRI, 0x13)) { - * Store(0,_SB.PWDE) + /*if (_SB.SBRI <= 0x13) { + * _SB.PWDE = 0 *} */
/* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) + WKST [0] = 0 + WKST [1] = 0
- Store (0x07, UPWS) + UPWS = 0x07 } /* End Method(_PTS) */
/* @@ -64,6 +64,6 @@ /* DBGO(" to S0\n") */
/* clear USB wake up signal */ - Store(1, USBS) + USBS = 1 Return(WKST) } /* End Method(_WAK) */ diff --git a/src/mainboard/amd/union_station/acpi/sleep.asl b/src/mainboard/amd/union_station/acpi/sleep.asl index 76b5f9e..3b6fd02 100644 --- a/src/mainboard/amd/union_station/acpi/sleep.asl +++ b/src/mainboard/amd/union_station/acpi/sleep.asl @@ -26,23 +26,23 @@ /* DBGO("\n") */
/* Don't allow PCIRST# to reset USB */ - if (LEqual(Arg0,3)){ - Store(0,URRE) + if (Arg0 == 3){ + URRE = 0 }
/* Clear sleep SMI status flag and enable sleep SMI trap. */ - /*Store(One, CSSM) - Store(One, SSEN)*/ + /*CSSM = 1 + SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */ - /*if (LLessEqual(_SB.SBRI, 0x13)) { - * Store(0,_SB.PWDE) + /*if (_SB.SBRI <= 0x13) { + * _SB.PWDE = 0 *} */
/* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) + WKST [0] = 0 + WKST [1] = 0 } /* End Method(_PTS) */
/* @@ -67,21 +67,21 @@ /* DBGO(" to S0\n") */
/* Re-enable HPET */ - Store(1,HPDE) + HPDE = 1
/* Restore PCIRST# so it resets USB */ - if (LEqual(Arg0,3)){ - Store(1,URRE) + if (Arg0 == 3){ + URRE = 1 }
/* Arbitrarily clear PciExpWakeStatus */ - Store(PWST, Local1) - Store(Local1, PWST) + Local1 = PWST + PWST = Local1
- /* if (DeRefOf(Index(WKST,0))) { - * Store(0, Index(WKST,1)) + /* if (DeRefOf(WKST [0])) { + * WKST [1] = 0 * } else { - * Store(Arg0, Index(WKST,1)) + * WKST [1] = Arg0 * } */ Return(WKST) diff --git a/src/mainboard/asrock/e350m1/acpi/sleep.asl b/src/mainboard/asrock/e350m1/acpi/sleep.asl index 76b5f9e..3b6fd02 100644 --- a/src/mainboard/asrock/e350m1/acpi/sleep.asl +++ b/src/mainboard/asrock/e350m1/acpi/sleep.asl @@ -26,23 +26,23 @@ /* DBGO("\n") */
/* Don't allow PCIRST# to reset USB */ - if (LEqual(Arg0,3)){ - Store(0,URRE) + if (Arg0 == 3){ + URRE = 0 }
/* Clear sleep SMI status flag and enable sleep SMI trap. */ - /*Store(One, CSSM) - Store(One, SSEN)*/ + /*CSSM = 1 + SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */ - /*if (LLessEqual(_SB.SBRI, 0x13)) { - * Store(0,_SB.PWDE) + /*if (_SB.SBRI <= 0x13) { + * _SB.PWDE = 0 *} */
/* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) + WKST [0] = 0 + WKST [1] = 0 } /* End Method(_PTS) */
/* @@ -67,21 +67,21 @@ /* DBGO(" to S0\n") */
/* Re-enable HPET */ - Store(1,HPDE) + HPDE = 1
/* Restore PCIRST# so it resets USB */ - if (LEqual(Arg0,3)){ - Store(1,URRE) + if (Arg0 == 3){ + URRE = 1 }
/* Arbitrarily clear PciExpWakeStatus */ - Store(PWST, Local1) - Store(Local1, PWST) + Local1 = PWST + PWST = Local1
- /* if (DeRefOf(Index(WKST,0))) { - * Store(0, Index(WKST,1)) + /* if (DeRefOf(WKST [0])) { + * WKST [1] = 0 * } else { - * Store(Arg0, Index(WKST,1)) + * WKST [1] = Arg0 * } */ Return(WKST) diff --git a/src/mainboard/asrock/imb-a180/acpi/sleep.asl b/src/mainboard/asrock/imb-a180/acpi/sleep.asl index 47dd146..fc26c30 100644 --- a/src/mainboard/asrock/imb-a180/acpi/sleep.asl +++ b/src/mainboard/asrock/imb-a180/acpi/sleep.asl @@ -30,9 +30,9 @@ /* DBGO("\n") */
/* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) - Store(7, UPWS) + WKST [0] = 0 + WKST [1] = 0 + UPWS = 7 _SB.APTS(Arg0) } /* End Method(_PTS) */
@@ -56,7 +56,7 @@ /* DBGO("From S") */ /* DBGO(Arg0) */ /* DBGO(" to S0\n") */ - Store(1,USBS) + USBS = 1
_SB.AWAK(Arg0)
diff --git a/src/mainboard/asus/a88xm-e/acpi/sleep.asl b/src/mainboard/asus/a88xm-e/acpi/sleep.asl index 8777337..46f37f3 100644 --- a/src/mainboard/asus/a88xm-e/acpi/sleep.asl +++ b/src/mainboard/asus/a88xm-e/acpi/sleep.asl @@ -22,10 +22,10 @@ Method(_PTS, 1) {
/* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) + WKST [0] = 0 + WKST [1] = 0
- Store (0x07, UPWS) + UPWS = 0x07 } /* End Method(_PTS) */
/* diff --git a/src/mainboard/asus/am1i-a/acpi/sleep.asl b/src/mainboard/asus/am1i-a/acpi/sleep.asl index 47dd146..fc26c30 100644 --- a/src/mainboard/asus/am1i-a/acpi/sleep.asl +++ b/src/mainboard/asus/am1i-a/acpi/sleep.asl @@ -30,9 +30,9 @@ /* DBGO("\n") */
/* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) - Store(7, UPWS) + WKST [0] = 0 + WKST [1] = 0 + UPWS = 7 _SB.APTS(Arg0) } /* End Method(_PTS) */
@@ -56,7 +56,7 @@ /* DBGO("From S") */ /* DBGO(Arg0) */ /* DBGO(" to S0\n") */ - Store(1,USBS) + USBS = 1
_SB.AWAK(Arg0)
diff --git a/src/mainboard/asus/f2a85-m/acpi/sleep.asl b/src/mainboard/asus/f2a85-m/acpi/sleep.asl index e08accd..07f6419 100644 --- a/src/mainboard/asus/f2a85-m/acpi/sleep.asl +++ b/src/mainboard/asus/f2a85-m/acpi/sleep.asl @@ -26,20 +26,20 @@ /* DBGO("\n") */
/* Clear sleep SMI status flag and enable sleep SMI trap. */ - /*Store(One, CSSM) - Store(One, SSEN)*/ + /*CSSM = 1 + SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */ - /*if (LLessEqual(_SB.SBRI, 0x13)) { - * Store(0,_SB.PWDE) + /*if (_SB.SBRI <= 0x13) { + * _SB.PWDE = 0 *} */
/* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) + WKST [0] = 0 + WKST [1] = 0
- Store (0x07, UPWS) + UPWS = 0x07 } /* End Method(_PTS) */
/* diff --git a/src/mainboard/bap/ode_e20XX/acpi/sleep.asl b/src/mainboard/bap/ode_e20XX/acpi/sleep.asl index 47dd146..fc26c30 100644 --- a/src/mainboard/bap/ode_e20XX/acpi/sleep.asl +++ b/src/mainboard/bap/ode_e20XX/acpi/sleep.asl @@ -30,9 +30,9 @@ /* DBGO("\n") */
/* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) - Store(7, UPWS) + WKST [0] = 0 + WKST [1] = 0 + UPWS = 7 _SB.APTS(Arg0) } /* End Method(_PTS) */
@@ -56,7 +56,7 @@ /* DBGO("From S") */ /* DBGO(Arg0) */ /* DBGO(" to S0\n") */ - Store(1,USBS) + USBS = 1
_SB.AWAK(Arg0)
diff --git a/src/mainboard/biostar/a68n_5200/acpi/sleep.asl b/src/mainboard/biostar/a68n_5200/acpi/sleep.asl index 47dd146..fc26c30 100644 --- a/src/mainboard/biostar/a68n_5200/acpi/sleep.asl +++ b/src/mainboard/biostar/a68n_5200/acpi/sleep.asl @@ -30,9 +30,9 @@ /* DBGO("\n") */
/* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) - Store(7, UPWS) + WKST [0] = 0 + WKST [1] = 0 + UPWS = 7 _SB.APTS(Arg0) } /* End Method(_PTS) */
@@ -56,7 +56,7 @@ /* DBGO("From S") */ /* DBGO(Arg0) */ /* DBGO(" to S0\n") */ - Store(1,USBS) + USBS = 1
_SB.AWAK(Arg0)
diff --git a/src/mainboard/biostar/am1ml/acpi/sleep.asl b/src/mainboard/biostar/am1ml/acpi/sleep.asl index 47dd146..fc26c30 100644 --- a/src/mainboard/biostar/am1ml/acpi/sleep.asl +++ b/src/mainboard/biostar/am1ml/acpi/sleep.asl @@ -30,9 +30,9 @@ /* DBGO("\n") */
/* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) - Store(7, UPWS) + WKST [0] = 0 + WKST [1] = 0 + UPWS = 7 _SB.APTS(Arg0) } /* End Method(_PTS) */
@@ -56,7 +56,7 @@ /* DBGO("From S") */ /* DBGO(Arg0) */ /* DBGO(" to S0\n") */ - Store(1,USBS) + USBS = 1
_SB.AWAK(Arg0)
diff --git a/src/mainboard/elmex/pcm205400/acpi/sleep.asl b/src/mainboard/elmex/pcm205400/acpi/sleep.asl index 76b5f9e..3b6fd02 100644 --- a/src/mainboard/elmex/pcm205400/acpi/sleep.asl +++ b/src/mainboard/elmex/pcm205400/acpi/sleep.asl @@ -26,23 +26,23 @@ /* DBGO("\n") */
/* Don't allow PCIRST# to reset USB */ - if (LEqual(Arg0,3)){ - Store(0,URRE) + if (Arg0 == 3){ + URRE = 0 }
/* Clear sleep SMI status flag and enable sleep SMI trap. */ - /*Store(One, CSSM) - Store(One, SSEN)*/ + /*CSSM = 1 + SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */ - /*if (LLessEqual(_SB.SBRI, 0x13)) { - * Store(0,_SB.PWDE) + /*if (_SB.SBRI <= 0x13) { + * _SB.PWDE = 0 *} */
/* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) + WKST [0] = 0 + WKST [1] = 0 } /* End Method(_PTS) */
/* @@ -67,21 +67,21 @@ /* DBGO(" to S0\n") */
/* Re-enable HPET */ - Store(1,HPDE) + HPDE = 1
/* Restore PCIRST# so it resets USB */ - if (LEqual(Arg0,3)){ - Store(1,URRE) + if (Arg0 == 3){ + URRE = 1 }
/* Arbitrarily clear PciExpWakeStatus */ - Store(PWST, Local1) - Store(Local1, PWST) + Local1 = PWST + PWST = Local1
- /* if (DeRefOf(Index(WKST,0))) { - * Store(0, Index(WKST,1)) + /* if (DeRefOf(WKST [0])) { + * WKST [1] = 0 * } else { - * Store(Arg0, Index(WKST,1)) + * WKST [1] = Arg0 * } */ Return(WKST) diff --git a/src/mainboard/gizmosphere/gizmo/acpi/sleep.asl b/src/mainboard/gizmosphere/gizmo/acpi/sleep.asl index 76b5f9e..3b6fd02 100644 --- a/src/mainboard/gizmosphere/gizmo/acpi/sleep.asl +++ b/src/mainboard/gizmosphere/gizmo/acpi/sleep.asl @@ -26,23 +26,23 @@ /* DBGO("\n") */
/* Don't allow PCIRST# to reset USB */ - if (LEqual(Arg0,3)){ - Store(0,URRE) + if (Arg0 == 3){ + URRE = 0 }
/* Clear sleep SMI status flag and enable sleep SMI trap. */ - /*Store(One, CSSM) - Store(One, SSEN)*/ + /*CSSM = 1 + SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */ - /*if (LLessEqual(_SB.SBRI, 0x13)) { - * Store(0,_SB.PWDE) + /*if (_SB.SBRI <= 0x13) { + * _SB.PWDE = 0 *} */
/* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) + WKST [0] = 0 + WKST [1] = 0 } /* End Method(_PTS) */
/* @@ -67,21 +67,21 @@ /* DBGO(" to S0\n") */
/* Re-enable HPET */ - Store(1,HPDE) + HPDE = 1
/* Restore PCIRST# so it resets USB */ - if (LEqual(Arg0,3)){ - Store(1,URRE) + if (Arg0 == 3){ + URRE = 1 }
/* Arbitrarily clear PciExpWakeStatus */ - Store(PWST, Local1) - Store(Local1, PWST) + Local1 = PWST + PWST = Local1
- /* if (DeRefOf(Index(WKST,0))) { - * Store(0, Index(WKST,1)) + /* if (DeRefOf(WKST [0])) { + * WKST [1] = 0 * } else { - * Store(Arg0, Index(WKST,1)) + * WKST [1] = Arg0 * } */ Return(WKST) diff --git a/src/mainboard/gizmosphere/gizmo2/acpi/sleep.asl b/src/mainboard/gizmosphere/gizmo2/acpi/sleep.asl index 47dd146..fc26c30 100644 --- a/src/mainboard/gizmosphere/gizmo2/acpi/sleep.asl +++ b/src/mainboard/gizmosphere/gizmo2/acpi/sleep.asl @@ -30,9 +30,9 @@ /* DBGO("\n") */
/* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) - Store(7, UPWS) + WKST [0] = 0 + WKST [1] = 0 + UPWS = 7 _SB.APTS(Arg0) } /* End Method(_PTS) */
@@ -56,7 +56,7 @@ /* DBGO("From S") */ /* DBGO(Arg0) */ /* DBGO(" to S0\n") */ - Store(1,USBS) + USBS = 1
_SB.AWAK(Arg0)
diff --git a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/sleep.asl b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/sleep.asl index d151e1d..ced2e2d 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/sleep.asl +++ b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/sleep.asl @@ -29,10 +29,10 @@ _SB.PCI0.FPTS ()
/* Clear wake status structure. */ - Store (0, PEWD) - Store (0, Index(WKST,0)) - Store (0, Index(WKST,1)) - Store (7, UPWS) + PEWD = 0 + WKST [0] = 0 + WKST [1] = 0 + UPWS = 7 }
/* diff --git a/src/mainboard/hp/abm/acpi/sleep.asl b/src/mainboard/hp/abm/acpi/sleep.asl index 47dd146..fc26c30 100644 --- a/src/mainboard/hp/abm/acpi/sleep.asl +++ b/src/mainboard/hp/abm/acpi/sleep.asl @@ -30,9 +30,9 @@ /* DBGO("\n") */
/* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) - Store(7, UPWS) + WKST [0] = 0 + WKST [1] = 0 + UPWS = 7 _SB.APTS(Arg0) } /* End Method(_PTS) */
@@ -56,7 +56,7 @@ /* DBGO("From S") */ /* DBGO(Arg0) */ /* DBGO(" to S0\n") */ - Store(1,USBS) + USBS = 1
_SB.AWAK(Arg0)
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/acpi/sleep.asl b/src/mainboard/hp/pavilion_m6_1035dx/acpi/sleep.asl index dde9c37..cd714ce 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/acpi/sleep.asl +++ b/src/mainboard/hp/pavilion_m6_1035dx/acpi/sleep.asl @@ -26,20 +26,20 @@ /* DBGO("\n") */
/* Clear sleep SMI status flag and enable sleep SMI trap. */ - /*Store(One, CSSM) - Store(One, SSEN)*/ + /*CSSM = 1 + SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */ - /*if (LLessEqual(_SB.SBRI, 0x13)) { - * Store(0,_SB.PWDE) + /*if (_SB.SBRI <= 0x13) { + * _SB.PWDE = 0 *} */
/* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) + WKST [0] = 0 + WKST [1] = 0
- Store (0x07, UPWS) + UPWS = 0x07 } /* End Method(_PTS) */
/* @@ -64,7 +64,7 @@ /* DBGO(" to S0\n") */
/* Re-enable HPET */ - Store(1,USBS) + USBS = 1
Return(WKST) } /* End Method(_WAK) */ diff --git a/src/mainboard/jetway/nf81-t56n-lf/acpi/sleep.asl b/src/mainboard/jetway/nf81-t56n-lf/acpi/sleep.asl index 76b5f9e..3b6fd02 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/acpi/sleep.asl +++ b/src/mainboard/jetway/nf81-t56n-lf/acpi/sleep.asl @@ -26,23 +26,23 @@ /* DBGO("\n") */
/* Don't allow PCIRST# to reset USB */ - if (LEqual(Arg0,3)){ - Store(0,URRE) + if (Arg0 == 3){ + URRE = 0 }
/* Clear sleep SMI status flag and enable sleep SMI trap. */ - /*Store(One, CSSM) - Store(One, SSEN)*/ + /*CSSM = 1 + SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */ - /*if (LLessEqual(_SB.SBRI, 0x13)) { - * Store(0,_SB.PWDE) + /*if (_SB.SBRI <= 0x13) { + * _SB.PWDE = 0 *} */
/* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) + WKST [0] = 0 + WKST [1] = 0 } /* End Method(_PTS) */
/* @@ -67,21 +67,21 @@ /* DBGO(" to S0\n") */
/* Re-enable HPET */ - Store(1,HPDE) + HPDE = 1
/* Restore PCIRST# so it resets USB */ - if (LEqual(Arg0,3)){ - Store(1,URRE) + if (Arg0 == 3){ + URRE = 1 }
/* Arbitrarily clear PciExpWakeStatus */ - Store(PWST, Local1) - Store(Local1, PWST) + Local1 = PWST + PWST = Local1
- /* if (DeRefOf(Index(WKST,0))) { - * Store(0, Index(WKST,1)) + /* if (DeRefOf(WKST [0])) { + * WKST [1] = 0 * } else { - * Store(Arg0, Index(WKST,1)) + * WKST [1] = Arg0 * } */ Return(WKST) diff --git a/src/mainboard/lenovo/g505s/acpi/sleep.asl b/src/mainboard/lenovo/g505s/acpi/sleep.asl index dde9c37..cd714ce 100644 --- a/src/mainboard/lenovo/g505s/acpi/sleep.asl +++ b/src/mainboard/lenovo/g505s/acpi/sleep.asl @@ -26,20 +26,20 @@ /* DBGO("\n") */
/* Clear sleep SMI status flag and enable sleep SMI trap. */ - /*Store(One, CSSM) - Store(One, SSEN)*/ + /*CSSM = 1 + SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */ - /*if (LLessEqual(_SB.SBRI, 0x13)) { - * Store(0,_SB.PWDE) + /*if (_SB.SBRI <= 0x13) { + * _SB.PWDE = 0 *} */
/* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) + WKST [0] = 0 + WKST [1] = 0
- Store (0x07, UPWS) + UPWS = 0x07 } /* End Method(_PTS) */
/* @@ -64,7 +64,7 @@ /* DBGO(" to S0\n") */
/* Re-enable HPET */ - Store(1,USBS) + USBS = 1
Return(WKST) } /* End Method(_WAK) */ diff --git a/src/mainboard/msi/ms7721/acpi/sleep.asl b/src/mainboard/msi/ms7721/acpi/sleep.asl index e08accd..07f6419 100644 --- a/src/mainboard/msi/ms7721/acpi/sleep.asl +++ b/src/mainboard/msi/ms7721/acpi/sleep.asl @@ -26,20 +26,20 @@ /* DBGO("\n") */
/* Clear sleep SMI status flag and enable sleep SMI trap. */ - /*Store(One, CSSM) - Store(One, SSEN)*/ + /*CSSM = 1 + SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */ - /*if (LLessEqual(_SB.SBRI, 0x13)) { - * Store(0,_SB.PWDE) + /*if (_SB.SBRI <= 0x13) { + * _SB.PWDE = 0 *} */
/* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) + WKST [0] = 0 + WKST [1] = 0
- Store (0x07, UPWS) + UPWS = 0x07 } /* End Method(_PTS) */
/* diff --git a/src/mainboard/pcengines/apu1/acpi/sleep.asl b/src/mainboard/pcengines/apu1/acpi/sleep.asl index 76b5f9e..3b6fd02 100644 --- a/src/mainboard/pcengines/apu1/acpi/sleep.asl +++ b/src/mainboard/pcengines/apu1/acpi/sleep.asl @@ -26,23 +26,23 @@ /* DBGO("\n") */
/* Don't allow PCIRST# to reset USB */ - if (LEqual(Arg0,3)){ - Store(0,URRE) + if (Arg0 == 3){ + URRE = 0 }
/* Clear sleep SMI status flag and enable sleep SMI trap. */ - /*Store(One, CSSM) - Store(One, SSEN)*/ + /*CSSM = 1 + SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */ - /*if (LLessEqual(_SB.SBRI, 0x13)) { - * Store(0,_SB.PWDE) + /*if (_SB.SBRI <= 0x13) { + * _SB.PWDE = 0 *} */
/* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) + WKST [0] = 0 + WKST [1] = 0 } /* End Method(_PTS) */
/* @@ -67,21 +67,21 @@ /* DBGO(" to S0\n") */
/* Re-enable HPET */ - Store(1,HPDE) + HPDE = 1
/* Restore PCIRST# so it resets USB */ - if (LEqual(Arg0,3)){ - Store(1,URRE) + if (Arg0 == 3){ + URRE = 1 }
/* Arbitrarily clear PciExpWakeStatus */ - Store(PWST, Local1) - Store(Local1, PWST) + Local1 = PWST + PWST = Local1
- /* if (DeRefOf(Index(WKST,0))) { - * Store(0, Index(WKST,1)) + /* if (DeRefOf(WKST [0])) { + * WKST [1] = 0 * } else { - * Store(Arg0, Index(WKST,1)) + * WKST [1] = Arg0 * } */ Return(WKST) diff --git a/src/mainboard/pcengines/apu2/acpi/sleep.asl b/src/mainboard/pcengines/apu2/acpi/sleep.asl index 39fe610..377f0de 100644 --- a/src/mainboard/pcengines/apu2/acpi/sleep.asl +++ b/src/mainboard/pcengines/apu2/acpi/sleep.asl @@ -30,9 +30,9 @@ /* DBGO("\n") */
/* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) - Store(7, UPWS) + WKST [0] = 0 + WKST [1] = 0 + UPWS = 7 _SB.APTS(Arg0) } /* End Method(_PTS) */
@@ -58,7 +58,7 @@ /* DBGO(" to S0\n") */
/* clear USB wake up signal */ - Store(1, USBS) + USBS = 1
_SB.AWAK(Arg0)
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46023 )
Change subject: mb/*/acpi: Convert sleep.asl to ASL 2.0 syntax ......................................................................
Patch Set 1:
Please split this into smaller, reviewable commits.
HAOUAS Elyes has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/46023 )
Change subject: mb/*/acpi: Convert sleep.asl to ASL 2.0 syntax ......................................................................
Abandoned
squashed
-
Angel Pons (Code Review) -
HAOUAS Elyes (Code Review)