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Change in coreboot[master]: mb/*/*/dsdt.asl: Convert to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 08 Oct '20

08 Oct '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46052 ) Change subject: mb/*/*/dsdt.asl: Convert to ASL 2.0 syntax ...................................................................... mb/*/*/dsdt.asl: Convert to ASL 2.0 syntax Change-Id: I1ccc3c7212ba0d5aaa81854f0035fa2945cab784 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/asus/p2b/dsdt.asl M src/mainboard/emulation/qemu-i440fx/dsdt.asl M src/mainboard/emulation/qemu-q35/dsdt.asl M src/mainboard/lippert/frontrunner-af/dsdt.asl 4 files changed, 103 insertions(+), 103 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/46052/1 diff --git a/src/mainboard/asus/p2b/dsdt.asl b/src/mainboard/asus/p2b/dsdt.asl index a2a12ba..4b01070 100644 --- a/src/mainboard/asus/p2b/dsdt.asl +++ b/src/mainboard/asus/p2b/dsdt.asl @@ -66,23 +66,23 @@ Method (\_PTS, 1, NotSerialized) { /* Disable fan, blink power LED, if not turning off */ - If (LNotEqual (Arg0, 0x05)) + If (Arg0 != 0x05) { - Store (Zero, FANM) - Store (Zero, PLED) + FANM = 0 + PLED = 0 } /* Arms SMI for device 12 */ - Store (One, TO12) + TO12 = 1 /* Put out a POST code */ - Or (Arg0, 0xF0, P80) + P80 = Arg0 | 0xF0 } Method (\_WAK, 1, NotSerialized) { /* Re-enable fan, stop power led blinking */ - Store (One, FANM) - Store (One, PLED) + FANM = 1 + PLED = 1 /* wake OK */ Return(Package(0x02){0x00, 0x00}) } @@ -211,10 +211,10 @@ CreateWordField (BUF1, _Y07._MIN, SBLO) CreateWordField (BUF1, _Y07._MAX, SBRL) - And (\_SB.PCI0.PX43.PM00, 0xFFFE, PMLO) - And (\_SB.PCI0.PX43.SB00, 0xFFFE, SBLO) - Store (PMLO, PMRL) - Store (SBLO, SBRL) + PMLO = \_SB.PCI0.PX43.PM00 & 0xFFFE + SBLO = \_SB.PCI0.PX43.SB00 & 0xFFFE + PMRL = PMLO + SBRL = SBLO Return (BUF1) } } @@ -245,13 +245,13 @@ { Method (_MSG, 1, NotSerialized) { - If (LEqual (Arg0, Zero)) + If (Arg0 == 0) { - Store (One, MSG0) + MSG0 = 1 } Else { - Store (Zero, MSG0) + MSG0 = 0 } } } diff --git a/src/mainboard/emulation/qemu-i440fx/dsdt.asl b/src/mainboard/emulation/qemu-i440fx/dsdt.asl index 6fd4467..6ef05f7 100644 --- a/src/mainboard/emulation/qemu-i440fx/dsdt.asl +++ b/src/mainboard/emulation/qemu-i440fx/dsdt.asl @@ -48,7 +48,7 @@ Return (0x00) } Method(_S3D, 0, NotSerialized) { - If (LEqual(VEND, 0x1001b36)) { + If (VEND == 0x1001b36) { Return (0x03) // QXL } Else { Return (0x00) @@ -120,7 +120,7 @@ /* Methods called by hotplug devices */ Method(PCEJ, 1, NotSerialized) { // _EJ0 method - eject callback - Store(ShiftLeft(1, Arg0), B0EJ) + B0EJ = 1 << Arg0 Return (0x0) } @@ -130,13 +130,13 @@ /* PCI hotplug notify method */ Method(PCNF, 0) { // Local0 = iterator - Store(Zero, Local0) - While (LLess(Local0, 31)) { - Increment(Local0) - If (And(PCIU, ShiftLeft(1, Local0))) { + Local0 = 0 + While (Local0 < 31) { + Local0++ + If (PCIU & (1 << Local0)) { PCNT(Local0, 1) } - If (And(PCID, ShiftLeft(1, Local0))) { + If (PCID & (1 << Local0)) { PCNT(Local0, 3) } } @@ -212,7 +212,7 @@ Method(IQST, 1, NotSerialized) { // _STA method - get status - If (And(0x80, Arg0)) { + If (0x80 & Arg0) { Return (0x09) } Return (0x0B) @@ -223,8 +223,8 @@ Interrupt(, Level, ActiveHigh, Shared) { 0 } }) CreateDWordField(PRR0, 0x05, PRRI) - If (LLess(Arg0, 0x80)) { - Store(Arg0, PRRI) + If (Arg0 < 0x80) { + PRRI = Arg0 } Return (PRR0) } @@ -242,14 +242,14 @@ Return (IQST(reg)) \ } \ Method(_DIS, 0, NotSerialized) { \ - Or(reg, 0x80, reg) \ + reg |= 0x80 \ } \ Method(_CRS, 0, NotSerialized) { \ Return (IQCR(reg)) \ } \ Method(_SRS, 1, NotSerialized) { \ CreateDWordField(Arg0, 0x05, PRRI) \ - Store(PRRI, reg) \ + reg = PRRI \ } \ } diff --git a/src/mainboard/emulation/qemu-q35/dsdt.asl b/src/mainboard/emulation/qemu-q35/dsdt.asl index d89d67f..8f7b7eb 100644 --- a/src/mainboard/emulation/qemu-q35/dsdt.asl +++ b/src/mainboard/emulation/qemu-q35/dsdt.asl @@ -45,31 +45,31 @@ CreateDWordField(Arg3, 0, CDW1) // Check for proper UUID - If (LEqual(Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) { + If (Arg0 == ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766")) { // Create DWORD-addressable fields from the Capabilities Buffer CreateDWordField(Arg3, 4, CDW2) CreateDWordField(Arg3, 8, CDW3) // Save Capabilities DWORD2 & 3 - Store(CDW2, SUPP) - Store(CDW3, CTRL) + SUPP = CDW2 + CTRL = CDW3 // Always allow native PME, AER (no dependencies) // Never allow SHPC (no SHPC controller in this system) - And(CTRL, 0x1D, CTRL) + CTRL &= 0x1D - If (LNotEqual(Arg1, One)) { + If (Arg1 != 1) { // Unknown revision - Or(CDW1, 0x08, CDW1) + CDW1 |= 0x08 } - If (LNotEqual(CDW3, CTRL)) { + If (CDW3 != CTRL) { // Capabilities bits were masked - Or(CDW1, 0x10, CDW1) + CDW1 |= 0x10 } // Update DWORD3 in the buffer - Store(CTRL, CDW3) + CDW3 = CTRL } Else { - Or(CDW1, 4, CDW1) // Unrecognized UUID + CDW1 |= 4 // Unrecognized UUID } Return (Arg3) } @@ -144,7 +144,7 @@ /* Zero => PIC mode, One => APIC Mode */ Name(\PICF, Zero) Method(\_PIC, 1, NotSerialized) { - Store(Arg0, \PICF) + \PICF = Arg0 } Scope(\_SB) { @@ -268,7 +268,7 @@ section 6.2.8.1 */ /* Note: we provide the same info as the PCI routing table of the Bochs BIOS */ - If (LEqual(\PICF, Zero)) { + If (\PICF == 0) { Return (PRTP) } Else { Return (PRTA) @@ -291,7 +291,7 @@ Method(IQST, 1, NotSerialized) { // _STA method - get status - If (And(0x80, Arg0)) { + If (0x80 & Arg0) { Return (0x09) } Return (0x0B) @@ -302,7 +302,7 @@ Interrupt(, Level, ActiveHigh, Shared) { 0 } }) CreateDWordField(PRR0, 0x05, PRRI) - Store(And(Arg0, 0x0F), PRRI) + PRRI = Arg0 & 0x0F Return (PRR0) } @@ -319,14 +319,14 @@ Return (IQST(reg)) \ } \ Method(_DIS, 0, NotSerialized) { \ - Or(reg, 0x80, reg) \ + reg |= 0x80 \ } \ Method(_CRS, 0, NotSerialized) { \ Return (IQCR(reg)) \ } \ Method(_SRS, 1, NotSerialized) { \ CreateDWordField(Arg0, 0x05, PRRI) \ - Store(PRRI, reg) \ + reg = PRRI \ } \ } diff --git a/src/mainboard/lippert/frontrunner-af/dsdt.asl b/src/mainboard/lippert/frontrunner-af/dsdt.asl index ffae0d9..0401989 100644 --- a/src/mainboard/lippert/frontrunner-af/dsdt.asl +++ b/src/mainboard/lippert/frontrunner-af/dsdt.asl @@ -370,20 +370,20 @@ Method(OSFL, 0){ - if(LNotEqual(OSVR, Ones)) {Return(OSVR)} /* OS version was already detected */ + if (OSVR != Ones) {Return(OSVR)} /* OS version was already detected */ if(CondRefOf(\_OSI)) { - Store(1, OSVR) /* Assume some form of XP */ + OSVR = 1 /* Assume some form of XP */ if (\_OSI("Windows 2006")) /* Vista */ { - Store(2, OSVR) + OSVR = 2 } } else { If(WCMP(\_OS,"Linux")) { - Store(3, OSVR) /* Linux */ + OSVR = 3 /* Linux */ } Else { - Store(4, OSVR) /* Gotta be WinCE */ + OSVR = 4 /* Gotta be WinCE */ } } Return(OSVR) @@ -395,17 +395,17 @@ { \_SB.CIRQ() } - Store(Arg0, PMOD) + PMOD = Arg0 } Method(CIRQ, 0x00, NotSerialized){ - Store(0, PIRA) - Store(0, PIRB) - Store(0, PIRC) - Store(0, PIRD) - Store(0, PIRE) - Store(0, PIRF) - Store(0, PIRG) - Store(0, PIRH) + PIRA = 0 + PIRB = 0 + PIRC = 0 + PIRD = 0 + PIRE = 0 + PIRF = 0 + PIRG = 0 + PIRH = 0 } Name(IRQB, ResourceTemplate(){ @@ -433,7 +433,7 @@ } /* End Method(_SB.INTA._STA) */ Method(_DIS ,0) { - Store(0, PIRA) + PIRA = 0 } /* End Method(_SB.INTA._DIS) */ Method(_PRS ,0) { @@ -442,7 +442,7 @@ Method(_CRS ,0) { CreateWordField(IRQB, 0x1, IRQN) - ShiftLeft(1, PIRA, IRQN) + IRQN = 1 << PIRA Return(IRQB) } /* Method(_SB.INTA._CRS) */ @@ -452,9 +452,9 @@ /* Use lowest available IRQ */ FindSetRightBit(IRQM, Local0) if (Local0) { - Decrement(Local0) + Local0-- } - Store(Local0, PIRA) + PIRA = Local0 } /* End Method(_SB.INTA._SRS) */ } /* End Device(INTA) */ @@ -471,7 +471,7 @@ } /* End Method(_SB.INTB._STA) */ Method(_DIS ,0) { - Store(0, PIRB) + PIRB = 0 } /* End Method(_SB.INTB._DIS) */ Method(_PRS ,0) { @@ -480,7 +480,7 @@ Method(_CRS ,0) { CreateWordField(IRQB, 0x1, IRQN) - ShiftLeft(1, PIRB, IRQN) + IRQN = 1 << PIRB Return(IRQB) } /* Method(_SB.INTB._CRS) */ @@ -490,9 +490,9 @@ /* Use lowest available IRQ */ FindSetRightBit(IRQM, Local0) if (Local0) { - Decrement(Local0) + Local0-- } - Store(Local0, PIRB) + PIRB = Local0 } /* End Method(_SB.INTB._SRS) */ } /* End Device(INTB) */ @@ -509,7 +509,7 @@ } /* End Method(_SB.INTC._STA) */ Method(_DIS ,0) { - Store(0, PIRC) + PIRC = 0 } /* End Method(_SB.INTC._DIS) */ Method(_PRS ,0) { @@ -518,7 +518,7 @@ Method(_CRS ,0) { CreateWordField(IRQB, 0x1, IRQN) - ShiftLeft(1, PIRC, IRQN) + IRQN = 1 << PIRC Return(IRQB) } /* Method(_SB.INTC._CRS) */ @@ -528,9 +528,9 @@ /* Use lowest available IRQ */ FindSetRightBit(IRQM, Local0) if (Local0) { - Decrement(Local0) + Local0-- } - Store(Local0, PIRC) + PIRC = Local0 } /* End Method(_SB.INTC._SRS) */ } /* End Device(INTC) */ @@ -547,7 +547,7 @@ } /* End Method(_SB.INTD._STA) */ Method(_DIS ,0) { - Store(0, PIRD) + PIRD = 0 } /* End Method(_SB.INTD._DIS) */ Method(_PRS ,0) { @@ -556,7 +556,7 @@ Method(_CRS ,0) { CreateWordField(IRQB, 0x1, IRQN) - ShiftLeft(1, PIRD, IRQN) + IRQN = 1 << PIRD Return(IRQB) } /* Method(_SB.INTD._CRS) */ @@ -566,9 +566,9 @@ /* Use lowest available IRQ */ FindSetRightBit(IRQM, Local0) if (Local0) { - Decrement(Local0) + Local0-- } - Store(Local0, PIRD) + PIRD = Local0 } /* End Method(_SB.INTD._SRS) */ } /* End Device(INTD) */ @@ -585,7 +585,7 @@ } /* End Method(_SB.INTE._STA) */ Method(_DIS ,0) { - Store(0, PIRE) + PIRE = 0 } /* End Method(_SB.INTE._DIS) */ Method(_PRS ,0) { @@ -594,7 +594,7 @@ Method(_CRS ,0) { CreateWordField(IRQB, 0x1, IRQN) - ShiftLeft(1, PIRE, IRQN) + IRQN = 1 << PIRE Return(IRQB) } /* Method(_SB.INTE._CRS) */ @@ -604,9 +604,9 @@ /* Use lowest available IRQ */ FindSetRightBit(IRQM, Local0) if (Local0) { - Decrement(Local0) + Local0-- } - Store(Local0, PIRE) + PIRE = Local0 } /* End Method(_SB.INTE._SRS) */ } /* End Device(INTE) */ @@ -623,7 +623,7 @@ } /* End Method(_SB.INTF._STA) */ Method(_DIS ,0) { - Store(0, PIRF) + PIRF = 0 } /* End Method(_SB.INTF._DIS) */ Method(_PRS ,0) { @@ -632,7 +632,7 @@ Method(_CRS ,0) { CreateWordField(IRQB, 0x1, IRQN) - ShiftLeft(1, PIRF, IRQN) + IRQN = 1 << PIRF Return(IRQB) } /* Method(_SB.INTF._CRS) */ @@ -642,9 +642,9 @@ /* Use lowest available IRQ */ FindSetRightBit(IRQM, Local0) if (Local0) { - Decrement(Local0) + Local0-- } - Store(Local0, PIRF) + PIRF = Local0 } /* End Method(_SB.INTF._SRS) */ } /* End Device(INTF) */ @@ -661,7 +661,7 @@ } /* End Method(_SB.INTG._STA) */ Method(_DIS ,0) { - Store(0, PIRG) + PIRG = 0 } /* End Method(_SB.INTG._DIS) */ Method(_PRS ,0) { @@ -670,7 +670,7 @@ Method(_CRS ,0) { CreateWordField(IRQB, 0x1, IRQN) - ShiftLeft(1, PIRG, IRQN) + IRQN = 1 << PIRG Return(IRQB) } /* Method(_SB.INTG._CRS) */ @@ -680,9 +680,9 @@ /* Use lowest available IRQ */ FindSetRightBit(IRQM, Local0) if (Local0) { - Decrement(Local0) + Local0-- } - Store(Local0, PIRG) + PIRG = Local0 } /* End Method(_SB.INTG._SRS) */ } /* End Device(INTG) */ @@ -699,7 +699,7 @@ } /* End Method(_SB.INTH._STA) */ Method(_DIS ,0) { - Store(0, PIRH) + PIRH = 0 } /* End Method(_SB.INTH._DIS) */ Method(_PRS ,0) { @@ -708,7 +708,7 @@ Method(_CRS ,0) { CreateWordField(IRQB, 0x1, IRQN) - ShiftLeft(1, PIRH, IRQN) + IRQN = 1 << PIRH Return(IRQB) } /* Method(_SB.INTH._CRS) */ @@ -718,9 +718,9 @@ /* Use lowest available IRQ */ FindSetRightBit(IRQM, Local0) if (Local0) { - Decrement(Local0) + Local0-- } - Store(Local0, PIRH) + PIRH = Local0 } /* End Method(_SB.INTH._SRS) */ } /* End Device(INTH) */ @@ -751,13 +751,13 @@ Method(\_PTS, 1) { /* Don't allow PCIRST# to reset USB */ - if (LEqual(Arg0,3)){ - Store(0,URRE) + if (Arg0 == 3){ + URRE = 0 } /* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) + WKST [0] = 0 + WKST [1] = 0 } /* End Method(\_PTS) */ /* @@ -778,16 +778,16 @@ Method(\_WAK, 1) { /* Re-enable HPET */ - Store(1,HPDE) + HPDE = 1 /* Restore PCIRST# so it resets USB */ - if (LEqual(Arg0,3)){ - Store(1,URRE) + if (Arg0 == 3){ + URRE = 1 } /* Arbitrarily clear PciExpWakeStatus */ - Store(PWST, Local1) - Store(Local1, PWST) + Local1 = PWST + PWST = Local1 Return(WKST) } /* End Method(\_WAK) */ @@ -862,7 +862,7 @@ Method (_OSC, 4) { /* Check for PCI/PCI-X/PCIe GUID */ - If (LEqual (Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) + If (Arg0 == ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766")) { /* Let OS control everything */ Return (Arg3) @@ -871,7 +871,7 @@ { /* Unrecognized UUID, so set bit 2 of Arg3 to 1 */ CreateDWordField (Arg3, 0, CDW1) - Or (CDW1, 4, CDW1) + CDW1 |= 4 Return (Arg3) } } /* End _OSC */ @@ -1211,10 +1211,10 @@ * 32bit (0x00000000 - TOM1) will wrap and give the same * result as 64bit (0x100000000 - TOM1). */ - Store(TOM1, MM1B) - ShiftLeft(0x10000000, 4, Local0) - Subtract(Local0, TOM1, Local0) - Store(Local0, MM1L) + MM1B = TOM1 + Local0 = 0x10000000 << 4 + Local0 -= TOM1 + MM1L = Local0 Return(CRES) /* note to change the Name buffer */ } /* end of Method(_SB.PCI0._CRS) */ -- To view, visit https://review.coreboot.org/c/coreboot/+/46052 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1ccc3c7212ba0d5aaa81854f0035fa2945cab784 Gerrit-Change-Number: 46052 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

1 2

Change in coreboot[master]: mb/lenovo: Convert to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 08 Oct '20

08 Oct '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46082 ) Change subject: mb/lenovo: Convert to ASL 2.0 syntax ...................................................................... mb/lenovo: Convert to ASL 2.0 syntax Change-Id: If47882e5ba6f98e98721f1d813503b697351a98f Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/lenovo/g505s/acpi/gpe.asl M src/mainboard/lenovo/s230u/acpi/ec.asl M src/mainboard/lenovo/t400/acpi/dock.asl M src/mainboard/lenovo/t400/acpi/gpe.asl M src/mainboard/lenovo/t400/acpi/graphics.asl M src/mainboard/lenovo/t410/acpi/dock.asl M src/mainboard/lenovo/t410/acpi/gpe.asl M src/mainboard/lenovo/t60/acpi/gpe.asl M src/mainboard/lenovo/x200/acpi/dock.asl M src/mainboard/lenovo/x200/acpi/gpe.asl M src/mainboard/lenovo/x201/acpi/dock.asl M src/mainboard/lenovo/x201/acpi/gpe.asl M src/mainboard/lenovo/x60/acpi/gpe.asl 13 files changed, 85 insertions(+), 86 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/46082/1 diff --git a/src/mainboard/lenovo/g505s/acpi/gpe.asl b/src/mainboard/lenovo/g505s/acpi/gpe.asl index 910d2e6..f137606 100644 --- a/src/mainboard/lenovo/g505s/acpi/gpe.asl +++ b/src/mainboard/lenovo/g505s/acpi/gpe.asl @@ -15,7 +15,7 @@ /* USB controller PME# */ Method(_L0B) { - Store("USB PME", Debug) + Debug = "USB PME" /* Notify devices of wake event */ Notify(\_SB.PCI0.UOH1, 0x02) Notify(\_SB.PCI0.UOH2, 0x02) @@ -37,16 +37,16 @@ /* Lid switch opened or closed */ Method(_L16) { - Store("Lid status changed", Debug) + Debug = "Lid status changed" /* Flip trigger polarity */ - Not(LPOL, LPOL) + LPOL = ~LPOL /* Notify lid object of status change */ Notify(\_SB.LID, 0x80) } /* GPIO0 or GEvent8 event */ Method(_L18) { - Store("PCI bridge wake event", Debug) + Debug = "PCI bridge wake event" /* Notify PCI bridges of wake event */ Notify(\_SB.PCI0.PBR4, 0x02) Notify(\_SB.PCI0.PBR5, 0x02) diff --git a/src/mainboard/lenovo/s230u/acpi/ec.asl b/src/mainboard/lenovo/s230u/acpi/ec.asl index 888feac..a1e7379 100644 --- a/src/mainboard/lenovo/s230u/acpi/ec.asl +++ b/src/mainboard/lenovo/s230u/acpi/ec.asl @@ -128,7 +128,7 @@ /* Switched to AC power */ Method (_Q26, 0, NotSerialized) { - Store (One, PWRS) + PWRS = 1 Notify (^AC, 0x80) Notify (^BAT0, 0x80) \PNOT () @@ -138,7 +138,7 @@ /* Switched to battery power */ Method (_Q27, 0, NotSerialized) { - Store (Zero, PWRS) + PWRS = 0 Notify (^AC, 0x80) Notify (^BAT0, 0x80) \PNOT () @@ -148,7 +148,7 @@ /* Lid openend */ Method (_Q2A, 0, NotSerialized) { - Store (One, LIDS) + LIDS = 1 Notify(^LID, 0x80) ^HKEY.MHKQ (0x5002) } @@ -156,7 +156,7 @@ /* Lid closed */ Method (_Q2B, 0, NotSerialized) { - Store (Zero, LIDS) + LIDS = 0 Notify(^LID, 0x80) ^HKEY.MHKQ (0x5001) } @@ -237,7 +237,7 @@ /* FN+Esc pressed / FN row mode switch */ Method (_Q74, 0, NotSerialized) { - XOr(One, HKFA, HKFA) + HKFA = 1 ^ HKFA ^HKEY.MHKQ (0x6060) } @@ -271,11 +271,11 @@ { Acquire (XDHK, 0xFFFF) - ShiftLeft (One, Decrement (Arg0), Local0) + Local0 = 1 << Arg0-- If (Arg1) { - Or (Local0, DHKN, DHKN) + DHKN |= Local0 } Else { - And (Not(Local0), DHKN, DHKN) + DHKN &= ~Local0 } Release (XDHK) @@ -285,7 +285,7 @@ { Acquire (XDHK, 0xFFFF) - Store (Arg0, DHKC) + DHKC = Arg0 Release (XDHK) } @@ -294,11 +294,11 @@ { Acquire (XDHK, 0xFFFF) - Store (Zero, Local0) + Local0 = 0 if (DHKV) { - Store (DHKV, Local0) - Store (Zero, DHKV) + Local0 = DHKV + DHKV = 0 } Release (XDHK) @@ -310,7 +310,7 @@ { Acquire (XDHK, 0xFFFF) - Store (Arg0, DHKV) + DHKV = Arg0 Release (XDHK) @@ -321,7 +321,7 @@ /* LED support for thinkpad-acpi */ Method (LED, 2, NotSerialized) { - Or (Arg0, Arg1, HLCL) + HLCL = Arg0 | Arg1 } Device (AC) diff --git a/src/mainboard/lenovo/t400/acpi/dock.asl b/src/mainboard/lenovo/t400/acpi/dock.asl index 9a6d354..dce1d1a 100644 --- a/src/mainboard/lenovo/t400/acpi/dock.asl +++ b/src/mainboard/lenovo/t400/acpi/dock.asl @@ -12,14 +12,14 @@ { if (Arg0) { /* connect dock */ - Store (1, \GP28) - Store (1, \_SB.PCI0.LPCB.EC.DKR1) + \GP28 = 1 + \_SB.PCI0.LPCB.EC.DKR1 = 1 } else { /* disconnect dock */ - Store (0, \GP28) - Store (0, \_SB.PCI0.LPCB.EC.DKR1) + \GP28 = 0 + \_SB.PCI0.LPCB.EC.DKR1 = 0 } - Xor(Arg0, \_SB.PCI0.LPCB.EC.DKR1, Local0) + Local0 = Arg0 ^ \_SB.PCI0.LPCB.EC.DKR1 Return (Local0) } diff --git a/src/mainboard/lenovo/t400/acpi/gpe.asl b/src/mainboard/lenovo/t400/acpi/gpe.asl index 62e7b37..9984636 100644 --- a/src/mainboard/lenovo/t400/acpi/gpe.asl +++ b/src/mainboard/lenovo/t400/acpi/gpe.asl @@ -5,8 +5,8 @@ Method(_L18, 0, NotSerialized) { /* Read EC register to clear wake status */ - Store(\_SB.PCI0.LPCB.EC.WAKE, Local0) + Local0 = \_SB.PCI0.LPCB.EC.WAKE /* So that we don't get a warning that Local0 is unused. */ - Increment (Local0) + Local0++ } } diff --git a/src/mainboard/lenovo/t400/acpi/graphics.asl b/src/mainboard/lenovo/t400/acpi/graphics.asl index 8780e2f..5559bfc 100644 --- a/src/mainboard/lenovo/t400/acpi/graphics.asl +++ b/src/mainboard/lenovo/t400/acpi/graphics.asl @@ -26,19 +26,19 @@ Method(SHYB, 1) { /* Switch hybrid graphics */ - if (LEqual(Arg0, One)) + if (Arg0 == One) { /* Discrete graphics requested */ - Or(GPLV, HYG1, GPLV) - Or(GQLV, HYG2, GQLV) + GPLV |= HYG1 + GQLV |= HYG2 } else { /* Integrated graphics requested */ - Xor(HYG1, 0xFFFFFFFF, Local0) - And(GPLV, Local0, GPLV) - Xor(HYG2, 0xFFFFFFFF, Local0) - And(GQLV, Local0, GQLV) + Local0 = HYG1 ^ 0xFFFFFFFF + GPLV &= Local0 + Local0 = HYG2 ^ 0xFFFFFFFF + GQLV &= Local0 } } @@ -53,21 +53,21 @@ CreateDWordField (ATPR, 0x04, FUNC) /* Version request */ - if (LEqual(Arg0, 0x0)) + if (Arg0 == 0x0) { /* Assemble and return version information */ - Store (0x08, SIZE) /* Response length */ - Store (0x01, VERS) /* Version number */ - Store (0x0F, FUNC) /* Supported functions? */ + SIZE = 0x08 /* Response length */ + VERS = 0x01 /* Version number */ + FUNC = 0x0F /* Supported functions? */ Return (ATPR) } /* Mux select */ - if (LEqual(Arg0, 0x2)) + if (Arg0 == 0x2) { CreateByteField (Arg1, 0x02, PWST) - Store (PWST, Local0) - And (Local0, 0x01, Local0) + Local0 = PWST + Local0 &= 0x01 If (Local0) { /* Enable discrete graphics */ diff --git a/src/mainboard/lenovo/t410/acpi/dock.asl b/src/mainboard/lenovo/t410/acpi/dock.asl index 4771c51..a94762f 100644 --- a/src/mainboard/lenovo/t410/acpi/dock.asl +++ b/src/mainboard/lenovo/t410/acpi/dock.asl @@ -12,18 +12,18 @@ { if (Arg0) { /* connect dock */ - Store (1, \GP28) - Store (1, \_SB.PCI0.LPCB.EC.DKR1) - Store (1, \_SB.PCI0.LPCB.EC.DKR2) - Store (1, \_SB.PCI0.LPCB.EC.DKR3) + \GP28 = 1 + \_SB.PCI0.LPCB.EC.DKR1 = 1 + \_SB.PCI0.LPCB.EC.DKR2 = 1 + \_SB.PCI0.LPCB.EC.DKR3 = 1 } else { /* disconnect dock */ - Store (0, \GP28) - Store (0, \_SB.PCI0.LPCB.EC.DKR1) - Store (0, \_SB.PCI0.LPCB.EC.DKR2) - Store (0, \_SB.PCI0.LPCB.EC.DKR3) + \GP28 = 0 + \_SB.PCI0.LPCB.EC.DKR1 = 0 + \_SB.PCI0.LPCB.EC.DKR2 = 0 + \_SB.PCI0.LPCB.EC.DKR3 = 0 } - Xor(Arg0, \_SB.PCI0.LPCB.EC.DKR1, Local0) + Local0 = Arg0 ^ \_SB.PCI0.LPCB.EC.DKR1 Return (Local0) } diff --git a/src/mainboard/lenovo/t410/acpi/gpe.asl b/src/mainboard/lenovo/t410/acpi/gpe.asl index 62e7b37..9984636 100644 --- a/src/mainboard/lenovo/t410/acpi/gpe.asl +++ b/src/mainboard/lenovo/t410/acpi/gpe.asl @@ -5,8 +5,8 @@ Method(_L18, 0, NotSerialized) { /* Read EC register to clear wake status */ - Store(\_SB.PCI0.LPCB.EC.WAKE, Local0) + Local0 = \_SB.PCI0.LPCB.EC.WAKE /* So that we don't get a warning that Local0 is unused. */ - Increment (Local0) + Local0++ } } diff --git a/src/mainboard/lenovo/t60/acpi/gpe.asl b/src/mainboard/lenovo/t60/acpi/gpe.asl index 62e7b37..9984636 100644 --- a/src/mainboard/lenovo/t60/acpi/gpe.asl +++ b/src/mainboard/lenovo/t60/acpi/gpe.asl @@ -5,8 +5,8 @@ Method(_L18, 0, NotSerialized) { /* Read EC register to clear wake status */ - Store(\_SB.PCI0.LPCB.EC.WAKE, Local0) + Local0 = \_SB.PCI0.LPCB.EC.WAKE /* So that we don't get a warning that Local0 is unused. */ - Increment (Local0) + Local0++ } } diff --git a/src/mainboard/lenovo/x200/acpi/dock.asl b/src/mainboard/lenovo/x200/acpi/dock.asl index b612f06..ba8f46e 100644 --- a/src/mainboard/lenovo/x200/acpi/dock.asl +++ b/src/mainboard/lenovo/x200/acpi/dock.asl @@ -12,14 +12,14 @@ { if (Arg0) { /* connect dock */ - Store (1, \GP28) - Store (1, \_SB.PCI0.LPCB.EC.DKR1) + \GP28 = 1 + \_SB.PCI0.LPCB.EC.DKR1 = 1 } else { /* disconnect dock */ - Store (0, \GP28) - Store (0, \_SB.PCI0.LPCB.EC.DKR1) + \GP28 = 0 + \_SB.PCI0.LPCB.EC.DKR1 = 0 } - Xor(Arg0, \_SB.PCI0.LPCB.EC.DKR1, Local0) + Local0 = Arg0 ^ \_SB.PCI0.LPCB.EC.DKR1 Return (Local0) } @@ -32,16 +32,15 @@ /* Returns 0x7 (dock absent) or 0x3 (dock present) */ Method(GGID, 0, NotSerialized) { - Store(G_ID, Local0) - if (LEqual(Local0, 0xFFFFFFFF)) + Local0 = G_ID + if (Local0 == 0xFFFFFFFF) { - Store(Or (Or (GP02, ShiftLeft(GP03, 1)), - ShiftLeft(GP04, 2)), Local0) - If (LEqual(Local0, 0x00)) + Local0 = GP02 | (GP03 << 1) | (GP04 << 2) + If (Local0 == 0x00) { - Store(0x03, Local0) + Local0 = 0x03 } - Store(Local0, G_ID) + G_ID = Local0 } return (Local0) } @@ -68,8 +67,8 @@ /* Undock button on dock */ Method(_Q50, 0, NotSerialized) { - Store(\_SB.DOCK.GGID (), Local0) - if (LNotEqual(Local0, 0x07)) + Local0 = \_SB.DOCK.GGID () + if (Local0 != 0x07) { Notify(\_SB.DOCK, 3) } @@ -83,16 +82,16 @@ /* Unplug power: only disconnect dock on force eject */ Method(_Q5A, 0, NotSerialized) { - Store(\_SB.DOCK.GGID (), Local0) - if (LEqual(Local0, 0x07)) + Local0 = \_SB.DOCK.GGID () + if (Local0 == 0x07) { Notify(\_SB.DOCK, 3) } - if (LEqual(Local0, 0x03)) + if (Local0 == 0x03) { Sleep(0x64) - Store(DKR1, Local1) - if (LEqual(Local1, 1)) + Local1 = DKR1 + if (Local1 == 1) { Notify(\_SB.DOCK, 0) } diff --git a/src/mainboard/lenovo/x200/acpi/gpe.asl b/src/mainboard/lenovo/x200/acpi/gpe.asl index 62e7b37..9984636 100644 --- a/src/mainboard/lenovo/x200/acpi/gpe.asl +++ b/src/mainboard/lenovo/x200/acpi/gpe.asl @@ -5,8 +5,8 @@ Method(_L18, 0, NotSerialized) { /* Read EC register to clear wake status */ - Store(\_SB.PCI0.LPCB.EC.WAKE, Local0) + Local0 = \_SB.PCI0.LPCB.EC.WAKE /* So that we don't get a warning that Local0 is unused. */ - Increment (Local0) + Local0++ } } diff --git a/src/mainboard/lenovo/x201/acpi/dock.asl b/src/mainboard/lenovo/x201/acpi/dock.asl index 0bf5a25..311e620 100644 --- a/src/mainboard/lenovo/x201/acpi/dock.asl +++ b/src/mainboard/lenovo/x201/acpi/dock.asl @@ -12,18 +12,18 @@ { if (Arg0) { /* connect dock */ - Store (1, \GP28) - Store (1, \_SB.PCI0.LPCB.EC.DKR1) - Store (1, \_SB.PCI0.LPCB.EC.DKR2) - Store (1, \_SB.PCI0.LPCB.EC.DKR3) + \GP28 = 1 + \_SB.PCI0.LPCB.EC.DKR1 = 1 + \_SB.PCI0.LPCB.EC.DKR2 = 1 + \_SB.PCI0.LPCB.EC.DKR3 = 1 } else { /* disconnect dock */ - Store (0, \GP28) - Store (0, \_SB.PCI0.LPCB.EC.DKR1) - Store (0, \_SB.PCI0.LPCB.EC.DKR2) - Store (0, \_SB.PCI0.LPCB.EC.DKR3) + \GP28 = 0 + \_SB.PCI0.LPCB.EC.DKR1 = 0 + \_SB.PCI0.LPCB.EC.DKR2 = 0 + \_SB.PCI0.LPCB.EC.DKR3 = 0 } - Xor(Arg0, \_SB.PCI0.LPCB.EC.DKR1, Local0) + Local0 = Arg0 ^ \_SB.PCI0.LPCB.EC.DKR1 Return (Local0) } diff --git a/src/mainboard/lenovo/x201/acpi/gpe.asl b/src/mainboard/lenovo/x201/acpi/gpe.asl index 62e7b37..9984636 100644 --- a/src/mainboard/lenovo/x201/acpi/gpe.asl +++ b/src/mainboard/lenovo/x201/acpi/gpe.asl @@ -5,8 +5,8 @@ Method(_L18, 0, NotSerialized) { /* Read EC register to clear wake status */ - Store(\_SB.PCI0.LPCB.EC.WAKE, Local0) + Local0 = \_SB.PCI0.LPCB.EC.WAKE /* So that we don't get a warning that Local0 is unused. */ - Increment (Local0) + Local0++ } } diff --git a/src/mainboard/lenovo/x60/acpi/gpe.asl b/src/mainboard/lenovo/x60/acpi/gpe.asl index 62e7b37..9984636 100644 --- a/src/mainboard/lenovo/x60/acpi/gpe.asl +++ b/src/mainboard/lenovo/x60/acpi/gpe.asl @@ -5,8 +5,8 @@ Method(_L18, 0, NotSerialized) { /* Read EC register to clear wake status */ - Store(\_SB.PCI0.LPCB.EC.WAKE, Local0) + Local0 = \_SB.PCI0.LPCB.EC.WAKE /* So that we don't get a warning that Local0 is unused. */ - Increment (Local0) + Local0++ } } -- To view, visit https://review.coreboot.org/c/coreboot/+/46082 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If47882e5ba6f98e98721f1d813503b697351a98f Gerrit-Change-Number: 46082 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

1 1

Change in coreboot[master]: mb/google/rambi: Convert to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 08 Oct '20

08 Oct '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46178 ) Change subject: mb/google/rambi: Convert to ASL 2.0 syntax ...................................................................... mb/google/rambi: Convert to ASL 2.0 syntax Change-Id: I0a86b2f55338eb8e7195e847c0052e0352f4e650 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/google/rambi/acpi/mainboard.asl 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/46178/1 diff --git a/src/mainboard/google/rambi/acpi/mainboard.asl b/src/mainboard/google/rambi/acpi/mainboard.asl index 1d0c71e..bfbb66b 100644 --- a/src/mainboard/google/rambi/acpi/mainboard.asl +++ b/src/mainboard/google/rambi/acpi/mainboard.asl @@ -23,7 +23,7 @@ Method (_CRS) { /* Only return interrupt if I2C1 is PCI mode */ - If (LEqual (\S1EN, 0)) { + If (\S1EN == 0) { Return (^RBUF) } @@ -51,7 +51,7 @@ Method (_CRS) { /* Return interrupt if I2C6 is PCI mode */ - If (LEqual (\S6EN, 0)) { + If (\S6EN == 0) { Return (^RBUF) } @@ -93,7 +93,7 @@ Method (_STA) { - If (LEqual (\S2EN, 1)) { + If (\S2EN == 1) { Return (0xF) } Else { Return (0x0) -- To view, visit https://review.coreboot.org/c/coreboot/+/46178 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0a86b2f55338eb8e7195e847c0052e0352f4e650 Gerrit-Change-Number: 46178 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

1 0

Change in coreboot[master]: mb/google/glados: Convert to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 08 Oct '20

08 Oct '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46173 ) Change subject: mb/google/glados: Convert to ASL 2.0 syntax ...................................................................... mb/google/glados: Convert to ASL 2.0 syntax Change-Id: I7e9f9e9f724efe6db5199a36f01452ac93d4293a Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/google/glados/variants/caroline/include/variant/acpi/mainboard.asl 1 file changed, 4 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/46173/1 diff --git a/src/mainboard/google/glados/variants/caroline/include/variant/acpi/mainboard.asl b/src/mainboard/google/glados/variants/caroline/include/variant/acpi/mainboard.asl index f382e08..2cc694b 100644 --- a/src/mainboard/google/glados/variants/caroline/include/variant/acpi/mainboard.asl +++ b/src/mainboard/google/glados/variants/caroline/include/variant/acpi/mainboard.asl @@ -87,18 +87,17 @@ */ Method (_DSM, 4, NotSerialized) { - If (LEqual (Arg0, ToUUID - ("3cdff6f7-4267-4555-ad05-b30a3d8938de"))) { - If (LEqual (Arg2, Zero)) { + If (Arg0 == ToUUID("3cdff6f7-4267-4555-ad05-b30a3d8938de")) { + If (Arg2 == 0) { /* Function 0 - Query */ - If (LEqual (Arg1, One)) { + If (Arg1 == 1) { /* Revision 1 Function 1 */ Return (Buffer (One) { 0x03 }) } Else { /* Revision 2+ not supported */ Return (Buffer (One) { 0x00 }) } - } ElseIf (LEqual (Arg2, One)) { + } ElseIf (Arg2 == 1) { /* Function 1 - HID Descriptor Addr */ Return (0x0001) } Else { -- To view, visit https://review.coreboot.org/c/coreboot/+/46173 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7e9f9e9f724efe6db5199a36f01452ac93d4293a Gerrit-Change-Number: 46173 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

1 0

Change in coreboot[master]: mb/google/cyan: Convert to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 08 Oct '20

08 Oct '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46172 ) Change subject: mb/google/cyan: Convert to ASL 2.0 syntax ...................................................................... mb/google/cyan: Convert to ASL 2.0 syntax Change-Id: Ic655b26730a9118ecd6c7af0adfead5da2490e0f Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/google/cyan/variants/terra/include/variant/acpi/mainboard.asl M src/mainboard/google/cyan/variants/terra/include/variant/acpi/thermal.asl 2 files changed, 15 insertions(+), 14 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/46172/1 diff --git a/src/mainboard/google/cyan/variants/terra/include/variant/acpi/mainboard.asl b/src/mainboard/google/cyan/variants/terra/include/variant/acpi/mainboard.asl index 0bee309..a2a7640 100644 --- a/src/mainboard/google/cyan/variants/terra/include/variant/acpi/mainboard.asl +++ b/src/mainboard/google/cyan/variants/terra/include/variant/acpi/mainboard.asl @@ -10,7 +10,8 @@ { Method (GPID, 0, Serialized) // GPID: Get Project ID for Terra2/Terra3 { - And( ShiftRight (\BDID, 3, Local0), 0x01, Local0) + Local0 = \BDID >> 3 + Local0 &= 0x01 Return (Local0) } } diff --git a/src/mainboard/google/cyan/variants/terra/include/variant/acpi/thermal.asl b/src/mainboard/google/cyan/variants/terra/include/variant/acpi/thermal.asl index 1e2d286..94c80da 100644 --- a/src/mainboard/google/cyan/variants/terra/include/variant/acpi/thermal.asl +++ b/src/mainboard/google/cyan/variants/terra/include/variant/acpi/thermal.asl @@ -6,20 +6,20 @@ #if CONFIG(EC_SUPPORTS_DPTF_TEVT) Method (TEVT, 1, NotSerialized) { - Store (ToInteger (Arg0), Local0) + Local0 = ToInteger (Arg0) #ifdef DPTF_TSR0_SENSOR_ID - If (LEqual (Local0, DPTF_TSR0_SENSOR_ID)) { + If (Local0 == DPTF_TSR0_SENSOR_ID) { Notify (^TSR0, 0x90) } #endif #ifdef DPTF_TSR1_SENSOR_ID - If (LEqual (Local0, DPTF_TSR1_SENSOR_ID)) { + If (Local0 == DPTF_TSR1_SENSOR_ID) { Notify (^TSR1, 0x90) } #endif #ifdef DPTF_TSR2_SENSOR_ID - If (LEqual (Local0, DPTF_TSR2_SENSOR_ID)) { + If (Local0 == DPTF_TSR2_SENSOR_ID) { Notify (^TSR2, 0x90) } #endif @@ -52,7 +52,7 @@ Method (_STA) { - If (LEqual (\DPTE, One)) { + If (\DPTE == 1) { Return (0xF) } Else { Return (0x0) @@ -67,7 +67,7 @@ /* Return passive thermal point defined by Terra2 or Terra3 mainboard */ Method (_PSV) { - If (LEqual (\_SB.GPID, TERRA2_PROJECT_ID)) + If (\_SB.GPID == TERRA2_PROJECT_ID) { Return (CTOK (DPTF_TERRA2_TSR0_PASSIVE)) } Else { @@ -78,7 +78,7 @@ /* Return critical thermal point defined by Terra2 or Terra3 mainboard */ Method (_CRT) { - If (LEqual (\_SB.GPID, TERRA2_PROJECT_ID)) + If (\_SB.GPID == TERRA2_PROJECT_ID) { Return (CTOK (DPTF_TERRA2_TSR0_CRITICAL)) } Else { @@ -120,7 +120,7 @@ Method (_STA) { - If (LEqual (\DPTE, One)) { + If (\DPTE == 1) { Return (0xF) } Else { Return (0x0) @@ -135,7 +135,7 @@ /* Return passive thermal point defined by Terra2 or Terra3 mainboard */ Method (_PSV) { - If (LEqual (\_SB.GPID, TERRA2_PROJECT_ID)) + If (\_SB.GPID == TERRA2_PROJECT_ID) { Return (CTOK (DPTF_TERRA2_TSR1_PASSIVE)) } Else { @@ -146,7 +146,7 @@ /* Return critical thermal point defined by Terra2 or Terra3 mainboard */ Method (_CRT) { - If (LEqual (\_SB.GPID, TERRA2_PROJECT_ID)) + If (\_SB.GPID == TERRA2_PROJECT_ID) { Return (CTOK (DPTF_TERRA2_TSR1_CRITICAL)) } Else { @@ -188,7 +188,7 @@ Method (_STA) { - If (LEqual (\DPTE, One)) { + If (\DPTE == 1) { Return (0xF) } Else { Return (0x0) @@ -203,7 +203,7 @@ /* Return passive thermal point defined by Terra2 or Terra3 mainboard */ Method (_PSV) { - If (LEqual (\_SB.GPID, TERRA2_PROJECT_ID)) + If (\_SB.GPID == TERRA2_PROJECT_ID) { Return (CTOK (DPTF_TERRA2_TSR2_PASSIVE)) } Else { @@ -214,7 +214,7 @@ /* Return critical thermal point defined by Terra2 or Terra3 mainboard */ Method (_CRT) { - If (LEqual (\_SB.GPID, TERRA2_PROJECT_ID)) + If (\_SB.GPID == TERRA2_PROJECT_ID) { Return (CTOK (DPTF_TERRA2_TSR2_CRITICAL)) } Else { -- To view, visit https://review.coreboot.org/c/coreboot/+/46172 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic655b26730a9118ecd6c7af0adfead5da2490e0f Gerrit-Change-Number: 46172 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

1 0

Change in coreboot[master]: mb/google/dedede/var/waddledee: Enable GPIO based I2C Multiplexer
by Karthik Ramasubramanian (Code Review) 08 Oct '20

08 Oct '20

Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45912 ) Change subject: mb/google/dedede/var/waddledee: Enable GPIO based I2C Multiplexer ...................................................................... Patch Set 6: (1 comment) https://review.coreboot.org/c/coreboot/+/45912/5/src/mainboard/google/deded… File src/mainboard/google/dedede/Kconfig.name: https://review.coreboot.org/c/coreboot/+/45912/5/src/mainboard/google/deded… PS5, Line 54: select DRIVERS_I2C_GPIO_MUX > It should be fine to do this in Kconfig under BOARD_GOOGLE_BASEBOARD_DEDEDE. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/45912 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9b09e063b4377587019ade9e6e194f4aadcdd312 Gerrit-Change-Number: 45912 Gerrit-PatchSet: 6 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Evan Green <evgreen(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Justin TerAvest <teravest(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 08 Oct 2020 07:23:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede/var/waddledee: Enable GPIO based I2C Multiplexer
by Karthik Ramasubramanian (Code Review) 08 Oct '20

08 Oct '20

Hello build bot (Jenkins), Furquan Shaikh, Justin TerAvest, Evan Green, Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/45912 to look at the new patch set (#6). Change subject: mb/google/dedede/var/waddledee: Enable GPIO based I2C Multiplexer ...................................................................... mb/google/dedede/var/waddledee: Enable GPIO based I2C Multiplexer The camera sensor component chosen for UFC and WFC have address conflict. Resolve it by enabling GPIO based I2C Multiplexer BUG=b:169444894 TEST=Build and boot waddledee to OS. Ensure that the ACPI identifiers are added for I2C devices multiplexed using I2C MUX under the appropriate scope. Change-Id: I9b09e063b4377587019ade9e6e194f4aadcdd312 Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/variants/waddledee/overridetree.cb 2 files changed, 15 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/45912/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/45912 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9b09e063b4377587019ade9e6e194f4aadcdd312 Gerrit-Change-Number: 45912 Gerrit-PatchSet: 6 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Evan Green <evgreen(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Justin TerAvest <teravest(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: drivers/i2c: Add chip driver for GPIO based I2C multiplexer
by Karthik Ramasubramanian (Code Review) 08 Oct '20

08 Oct '20

Hello build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth, Justin TerAvest, Evan Green, Tim Wawrzynczak, Duncan Laurie, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/45911 to look at the new patch set (#6). Change subject: drivers/i2c: Add chip driver for GPIO based I2C multiplexer ...................................................................... drivers/i2c: Add chip driver for GPIO based I2C multiplexer Add identifiers in ACPI tables for GPIO based I2C multiplexer. The multiplexer device defines the GPIO resource used to select the adapter/bus lines. The multiplexer adapter device defines the address to select the adapter/client lines. BUG=b:169444894 TEST=Build and boot waddledee to OS. Ensure that the ACPI identifiers are added for I2C devices multiplexed using I2C MUX under the appropriate scope. Here is the output SSDT: Scope (\_SB.PCI0.I2C3) { Device (MUX0) { Name (_HID, "PRP0001") // _HID: Hardware ID Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, "\\_SB.PCI0.GPIO", 0x00, ResourceConsumer, , ) { // Pin list 0x0125 } }) Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x02) { Package (0x02) { "compatible", "i2c-mux-gpio" }, Package (0x02) { "mux-gpios", Package (0x04) { \_SB.PCI0.I2C3.MUX0, Zero, Zero, Zero } } } }) } } Change-Id: Ib371108cc6043c133681066bf7bf4b2e00771e8b Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> --- A src/drivers/i2c/gpiomux/Kconfig A src/drivers/i2c/gpiomux/Makefile.inc A src/drivers/i2c/gpiomux/mux/Makefile.inc A src/drivers/i2c/gpiomux/mux/chip.h A src/drivers/i2c/gpiomux/mux/mux.c 5 files changed, 109 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/45911/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/45911 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib371108cc6043c133681066bf7bf4b2e00771e8b Gerrit-Change-Number: 45911 Gerrit-PatchSet: 6 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Evan Green <evgreen(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Justin TerAvest <teravest(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/skylake: Configure L1 substates for PCH root ports
by Matt DeVillier (Code Review) 08 Oct '20

08 Oct '20

Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39538 ) Change subject: soc/intel/skylake: Configure L1 substates for PCH root ports ...................................................................... Patch Set 25: > Patch Set 25: > > Do you think that L1 substates should be guarded by that Kconfig? it wouldn't hurt to add 'CONFIG(PCIEXP_L1_SUB_STATE) &&' to the front of the if statement -- To view, visit https://review.coreboot.org/c/coreboot/+/39538 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I36150858485715016158595c832c142b0582ddb8 Gerrit-Change-Number: 39538 Gerrit-PatchSet: 25 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 08 Oct 2020 06:45:36 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: util/intelp2m: Add output files to .gitignore
by Maxim Polyakov (Code Review) 08 Oct '20

08 Oct '20

Maxim Polyakov has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45870 ) Change subject: util/intelp2m: Add output files to .gitignore ...................................................................... util/intelp2m: Add output files to .gitignore Change-Id: I50a783424b0d244eb824db9cd73738108f800003 Signed-off-by: Maxim Polyakov <max.senia.poliak(a)gmail.com> --- M .gitignore 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/45870/1 diff --git a/.gitignore b/.gitignore index 190d3717..2fabfee 100644 --- a/.gitignore +++ b/.gitignore @@ -105,6 +105,8 @@ util/intelmetool/intelmetool util/inteltool/.dependencies util/inteltool/inteltool +util/intelp2m/intelp2m +util/intelp2m/generate/gpio.h util/intelvbttool/intelvbttool util/msrtool/Makefile util/msrtool/Makefile.deps -- To view, visit https://review.coreboot.org/c/coreboot/+/45870 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I50a783424b0d244eb824db9cd73738108f800003 Gerrit-Change-Number: 45870 Gerrit-PatchSet: 1 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-MessageType: newchange

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coreboot-gerrit October 2020