coreboot-gerrit October 2020

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Change in coreboot[master]: mb/google/poppy/variant/atlas: Reset bluetooth in BIOS
by Tim Wawrzynczak (Code Review) 08 Oct '20

08 Oct '20

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Change in coreboot[master]: mb/google/poppy/variant/atlas: Reset bluetooth in BIOS
by Tim Wawrzynczak (Code Review) 08 Oct '20

08 Oct '20

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46120 ) Change subject: mb/google/poppy/variant/atlas: Reset bluetooth in BIOS ...................................................................... Patch Set 1: (3 comments) https://review.coreboot.org/c/coreboot/+/46120/1//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/46120/1//COMMIT_MSG@13 PS1, Line 13: down-rev > Sorry, what does that mean? older firmware, as in the opposite of to "up-rev" firmware https://review.coreboot.org/c/coreboot/+/46120/1//COMMIT_MSG@12 PS1, Line 12: If the BT chip is : already running down-rev firmware from a previous boot, the driver : makes no attempt update the BT firmware by resetting it. This can lead : to unexpected behavior across system upgrades. > Is there a Linux bug report for that issue? It's not Linux-specific, it's specific to the Bluetooth module. https://review.coreboot.org/c/coreboot/+/46120/1//COMMIT_MSG@20 PS1, Line 20: Shouldn't this go in the poppy branch? -- To view, visit https://review.coreboot.org/c/coreboot/+/46120 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I361caa49e82aa086c3c35962164fb078fa30139e Gerrit-Change-Number: 46120 Gerrit-PatchSet: 1 Gerrit-Owner: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Thu, 08 Oct 2020 16:52:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/jasperlake: Correct SaGv mapping
by Tim Wawrzynczak (Code Review) 08 Oct '20

08 Oct '20

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45195 ) Change subject: soc/intel/jasperlake: Correct SaGv mapping ...................................................................... Patch Set 2: Code-Review+2 Was this just missed when the TGL/JSL split happened? -- To view, visit https://review.coreboot.org/c/coreboot/+/45195 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I366de1ea7cf41c56b2954b8032c69bfba81058e2 Gerrit-Change-Number: 45195 Gerrit-PatchSet: 2 Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Comment-Date: Thu, 08 Oct 2020 16:34:38 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/i2c: Add chip driver for GPIO based I2C multiplexer
by Evan Green (Code Review) 08 Oct '20

08 Oct '20

Evan Green has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45911 ) Change subject: drivers/i2c: Add chip driver for GPIO based I2C multiplexer ...................................................................... Patch Set 6: (1 comment) https://review.coreboot.org/c/coreboot/+/45911/6/src/drivers/i2c/gpiomux/mu… File src/drivers/i2c/gpiomux/mux/mux.c: https://review.coreboot.org/c/coreboot/+/45911/6/src/drivers/i2c/gpiomux/mu… PS6, Line 37: "_HID", ACPI_DT_NAMESPACE_HID) Wait but if you do this and use PRP0001, aren't you deferring into the DT world entirely, including its bindings? We're not following the DT-based bindings exactly (around i2c-parent). Don't we need an ACPI-based _HID so we can say "this is the ACPI version"? -- To view, visit https://review.coreboot.org/c/coreboot/+/45911 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib371108cc6043c133681066bf7bf4b2e00771e8b Gerrit-Change-Number: 45911 Gerrit-PatchSet: 6 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Evan Green <evgreen(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Justin TerAvest <teravest(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 08 Oct 2020 16:16:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake: Replace soc_get_pmc_mux_device with device pointers
by Tim Wawrzynczak (Code Review) 08 Oct '20

08 Oct '20

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45747 ) Change subject: soc/intel/tigerlake: Replace soc_get_pmc_mux_device with device pointers ...................................................................... Patch Set 4: (2 comments) https://review.coreboot.org/c/coreboot/+/45747/1/src/mainboard/google/volte… File src/mainboard/google/volteer/variants/baseboard/devicetree.cb: https://review.coreboot.org/c/coreboot/+/45747/1/src/mainboard/google/volte… PS1, Line 403: device ref south_xhci on end > note to self: oops, this should stay Done https://review.coreboot.org/c/coreboot/+/45747/1/src/mainboard/google/volte… File src/mainboard/google/volteer/variants/volteer/overridetree.cb: https://review.coreboot.org/c/coreboot/+/45747/1/src/mainboard/google/volte… PS1, Line 183: : use dev1 as conn1; > C makes it hard not to end lines with semicolons sometimes... Done -- To view, visit https://review.coreboot.org/c/coreboot/+/45747 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie00834c79bd5304998adaccb388ae74a108192b1 Gerrit-Change-Number: 45747 Gerrit-PatchSet: 4 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Thu, 08 Oct 2020 15:42:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/xeon_sp/cpx: Add locking of IA32_FEATURE_CONTROL and VMX
by Christian Walter (Code Review) 08 Oct '20

08 Oct '20

Christian Walter has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45869 ) Change subject: soc/intel/xeon_sp/cpx: Add locking of IA32_FEATURE_CONTROL and VMX ...................................................................... soc/intel/xeon_sp/cpx: Add locking of IA32_FEATURE_CONTROL and VMX Change-Id: Ib329648f77acecccb0ced1806f61be252d03f2f4 Signed-off-by: Christian Walter <christian.walter(a)9elements.com> --- M src/soc/intel/xeon_sp/cpx/cpu.c 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/45869/1 diff --git a/src/soc/intel/xeon_sp/cpx/cpu.c b/src/soc/intel/xeon_sp/cpx/cpu.c index eb8c0eb..0999f6d 100644 --- a/src/soc/intel/xeon_sp/cpx/cpu.c +++ b/src/soc/intel/xeon_sp/cpx/cpu.c @@ -16,6 +16,7 @@ #include <soc/msr.h> #include <soc/soc_util.h> #include "chip.h" +#include <cpu/intel/common/common.h> static const void *microcode_patch; @@ -91,6 +92,9 @@ /* Clear out pending MCEs */ xeon_configure_mca(); + + /* Enable Vmx */ + set_vmx_and_lock(); } static struct device_operations cpu_dev_ops = { -- To view, visit https://review.coreboot.org/c/coreboot/+/45869 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib329648f77acecccb0ced1806f61be252d03f2f4 Gerrit-Change-Number: 45869 Gerrit-PatchSet: 1 Gerrit-Owner: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: security/intel/txt: Style fixes
by Christian Walter (Code Review) 08 Oct '20

08 Oct '20

Christian Walter has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45867 ) Change subject: security/intel/txt: Style fixes ...................................................................... security/intel/txt: Style fixes Fix two style issues. First one is to align the #define in txt_registers.h, the second one prints the chipset as hex to make it more readable. Change-Id: Ifafbe0a1161e9fe6e790692002375f45d813b723 Signed-off-by: Christian Walter <christian.walter(a)9elements.com> --- M src/security/intel/txt/logging.c M src/security/intel/txt/txt_register.h 2 files changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/45867/1 diff --git a/src/security/intel/txt/logging.c b/src/security/intel/txt/logging.c index cf14b55..f329cf9 100644 --- a/src/security/intel/txt/logging.c +++ b/src/security/intel/txt/logging.c @@ -141,7 +141,7 @@ printk(BIOS_INFO, " Header: v%u.%u\n", acm_header->header_version[0], acm_header->header_version[1]); - printk(BIOS_INFO, " Chipset: %u\n", acm_header->chipset_id); + printk(BIOS_INFO, " Chipset: %x\n", acm_header->chipset_id); printk(BIOS_INFO, " Size: %zu\n", acm_size); switch (acm_header->flags) { diff --git a/src/security/intel/txt/txt_register.h b/src/security/intel/txt/txt_register.h index c7f1575..bf087de 100644 --- a/src/security/intel/txt/txt_register.h +++ b/src/security/intel/txt/txt_register.h @@ -23,7 +23,7 @@ */ #define TXT_ESTS_WAKE_ERROR_STS (1 << 6) -#define TXT_ERROR (TXT_BASE + 0x30) +#define TXT_ERROR (TXT_BASE + 0x30) #define ACMERROR_TXT_VALID (1ul << 31) #define ACMERROR_TXT_EXTERNAL (1ul << 30) -- To view, visit https://review.coreboot.org/c/coreboot/+/45867 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifafbe0a1161e9fe6e790692002375f45d813b723 Gerrit-Change-Number: 45867 Gerrit-PatchSet: 1 Gerrit-Owner: Christian Walter <christian.walter(a)9elements.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/volteer: add mainboard_supports_usb4()
by Nick Vaccaro (Code Review) 08 Oct '20

08 Oct '20

Nick Vaccaro has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45946 ) Change subject: mb/google/volteer: add mainboard_supports_usb4() ...................................................................... mb/google/volteer: add mainboard_supports_usb4() Implement mainboard_supports_usb4() to allow soc code to disable the USB4/TBT in the cases where we're on SKUs without USB4 hardware. BUG=b:167983038 TEST=none Change-Id: Iab23c07e15f754ca807f128b9edad7fdc9a44b9d Signed-off-by: Nick Vaccaro <nvaccaro(a)google.com> --- M src/mainboard/google/volteer/Makefile.inc A src/mainboard/google/volteer/mainboard_support.c 2 files changed, 10 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/45946/1 diff --git a/src/mainboard/google/volteer/Makefile.inc b/src/mainboard/google/volteer/Makefile.inc index c01f993..d07588b 100644 --- a/src/mainboard/google/volteer/Makefile.inc +++ b/src/mainboard/google/volteer/Makefile.inc @@ -4,12 +4,14 @@ bootblock-y += bootblock.c romstage-$(CONFIG_CHROMEOS) += chromeos.c +romstage-y += mainboard_support.c romstage-y += romstage.c ramstage-$(CONFIG_CHROMEOS) += chromeos.c ramstage-y += ec.c ramstage-$(CONFIG_FW_CONFIG) += fw_config.c ramstage-y += mainboard.c +ramstage-y += mainboard_support.c smm-y += smihandler.c diff --git a/src/mainboard/google/volteer/mainboard_support.c b/src/mainboard/google/volteer/mainboard_support.c new file mode 100644 index 0000000..9be2e51 --- /dev/null +++ b/src/mainboard/google/volteer/mainboard_support.c @@ -0,0 +1,8 @@ +#include <soc/mainboard_support.h> +#include <fw_config.h> + +bool mainboard_supports_usb4(void) +{ + return (fw_config_probe(FW_CONFIG(DB_USB, USB4_GEN2)) || + fw_config_probe(FW_CONFIG(DB_USB, USB4_GEN3))); +} -- To view, visit https://review.coreboot.org/c/coreboot/+/45946 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iab23c07e15f754ca807f128b9edad7fdc9a44b9d Gerrit-Change-Number: 45946 Gerrit-PatchSet: 1 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: lib/fw_config: change BOOT_STATE_INIT_ENTRY to be BS_DEV_INIT_CHIPS
by Nick Vaccaro (Code Review) 08 Oct '20

08 Oct '20

Nick Vaccaro has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45961 ) Change subject: lib/fw_config: change BOOT_STATE_INIT_ENTRY to be BS_DEV_INIT_CHIPS ...................................................................... lib/fw_config: change BOOT_STATE_INIT_ENTRY to be BS_DEV_INIT_CHIPS Make boot state init run before the init_chips code. This allows for correcting tbt settings at a stage earlier than devicetree parsing. BUG=b:167983038 TEST=none Change-Id: I8364746ba311575e7de93fa25241ffef7faf35b4 Signed-off-by: Nick Vaccaro <nvaccaro(a)google.com> --- M src/lib/fw_config.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/45961/1 diff --git a/src/lib/fw_config.c b/src/lib/fw_config.c index fdfab0a..ec32059 100644 --- a/src/lib/fw_config.c +++ b/src/lib/fw_config.c @@ -127,5 +127,5 @@ } } } -BOOT_STATE_INIT_ENTRY(BS_DEV_ENUMERATE, BS_ON_ENTRY, fw_config_init, NULL); +BOOT_STATE_INIT_ENTRY(BS_DEV_INIT_CHIPS, BS_ON_ENTRY, fw_config_init, NULL); #endif -- To view, visit https://review.coreboot.org/c/coreboot/+/45961 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8364746ba311575e7de93fa25241ffef7faf35b4 Gerrit-Change-Number: 45961 Gerrit-PatchSet: 1 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/ocp/deltalake: Override smbios_fill_dimm_locator for type 17
by Angel Pons (Code Review) 08 Oct '20

08 Oct '20

Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45799 ) Change subject: mb/ocp/deltalake: Override smbios_fill_dimm_locator for type 17 ...................................................................... mb/ocp/deltalake: Override smbios_fill_dimm_locator for type 17 Override smbios_fill_dimm_locator for type 17 Locator and Bank Locator. Also remove CONFIG(GENERATE_SMBIOS_TABLES) compile option because SMBIOS is always enabled and it makes the code cleaner. One sample type 17 table displayed as below: Handle 0x0010, DMI type 17, 40 bytes Memory Device ... Locator: DIMM F0 Bank Locator: _Node0_Channel5_Dimm0 Tested=On OCP Delta Lake, the Locator and Bank Locator strings are expected. Change-Id: I84531f9ee8bc76d9529aa983bc13e64f40c93138 Signed-off-by: Johnny Lin <johnny_lin(a)wiwynn.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45799 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/ocp/deltalake/ramstage.c 1 file changed, 11 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/src/mainboard/ocp/deltalake/ramstage.c b/src/mainboard/ocp/deltalake/ramstage.c index e00f1c3..c03ad68 100644 --- a/src/mainboard/ocp/deltalake/ramstage.c +++ b/src/mainboard/ocp/deltalake/ramstage.c @@ -128,7 +128,6 @@ } } -#if CONFIG(GENERATE_SMBIOS_TABLES) static int create_smbios_type9(int *handle, unsigned long *current) { int index; @@ -234,7 +233,17 @@ return len; } -#endif + +void smbios_fill_dimm_locator(const struct dimm_info *dimm, struct smbios_type17 *t) +{ + char buf[40]; + + snprintf(buf, sizeof(buf), "DIMM %c0", 'A' + dimm->channel_num); + t->device_locator = smbios_add_string(t->eos, buf); + + snprintf(buf, sizeof(buf), "_Node0_Channel%d_Dimm0", dimm->channel_num); + t->bank_locator = smbios_add_string(t->eos, buf); +} unsigned int smbios_processor_family(struct cpuid_result res) { @@ -251,9 +260,7 @@ { dev->ops->get_smbios_strings = dl_oem_smbios_strings, read_fru_areas(CONFIG_BMC_KCS_BASE, CONFIG_FRU_DEVICE_ID, 0, &fru_strings); -#if (CONFIG(GENERATE_SMBIOS_TABLES)) dev->ops->get_smbios_data = mainboard_smbios_data; -#endif } void mainboard_silicon_init_params(FSPS_UPD *params) -- To view, visit https://review.coreboot.org/c/coreboot/+/45799 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I84531f9ee8bc76d9529aa983bc13e64f40c93138 Gerrit-Change-Number: 45799 Gerrit-PatchSet: 13 Gerrit-Owner: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: John Looney <john.looney(a)gmail.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: merged

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coreboot-gerrit October 2020