coreboot-gerrit October 2020

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Change in coreboot[master]: superio/smsc/mec1308/acpi: Convert superio.asl to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 12 Oct '20

12 Oct '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45990 ) Change subject: superio/smsc/mec1308/acpi: Convert superio.asl to ASL 2.0 syntax ...................................................................... superio/smsc/mec1308/acpi: Convert superio.asl to ASL 2.0 syntax Change-Id: I7d15dbb90bbf910cdfd59d67fa4d9ca41420b8d9 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/superio/smsc/mec1308/acpi/superio.asl 1 file changed, 10 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/45990/1 diff --git a/src/superio/smsc/mec1308/acpi/superio.asl b/src/superio/smsc/mec1308/acpi/superio.asl index b688697..f692323 100644 --- a/src/superio/smsc/mec1308/acpi/superio.asl +++ b/src/superio/smsc/mec1308/acpi/superio.asl @@ -37,30 +37,30 @@ Method (ENTR, 0, NotSerialized) { - Store (0x55, SI2E) + SI2E = 0x55 } Method (EXIT, 0, NotSerialized) { - Store (0xaa, SI2E) + SI2E = 0xaa } /* Parse activate register for an LDN */ Method (ISEN, 1, NotSerialized) { ENTR () - Store (Arg0, SLDN) - Store (SACT, Local0) + SLDN = Arg0 + Local0 = SACT EXIT () /* Check if it exists */ - If (LEqual (Local0, 0xFF)) + If (Local0 == 0xFF) { Return (0x00) } /* Check if activated */ - If (LEqual (Local0, One)) + If (Local0 == 1) { Return (0x0F) } @@ -74,8 +74,8 @@ Method (SENA, 1, NotSerialized) { ENTR () - Store (Arg0, SLDN) - Store (One, SACT) + SLDN = Arg0 + SACT = 1 EXIT () } @@ -83,8 +83,8 @@ Method (SDIS, 1, NotSerialized) { ENTR () - Store (Arg0, SLDN) - Store (Zero, SACT) + SLDN = Arg0 + SACT = 0 EXIT () } -- To view, visit https://review.coreboot.org/c/coreboot/+/45990 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7d15dbb90bbf910cdfd59d67fa4d9ca41420b8d9 Gerrit-Change-Number: 45990 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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Change in coreboot[master]: superio/ite/it8772f/acpi: Convert superio.asl to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 12 Oct '20

12 Oct '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45989 ) Change subject: superio/ite/it8772f/acpi: Convert superio.asl to ASL 2.0 syntax ...................................................................... superio/ite/it8772f/acpi: Convert superio.asl to ASL 2.0 syntax Change-Id: Ia7072112a1add1de9c3fb348bc70dbd404337819 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/superio/fintek/f81803a/acpi/superio.asl 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/45989/1 diff --git a/src/superio/fintek/f81803a/acpi/superio.asl b/src/superio/fintek/f81803a/acpi/superio.asl index 302f2f4..4e2c525 100644 --- a/src/superio/fintek/f81803a/acpi/superio.asl +++ b/src/superio/fintek/f81803a/acpi/superio.asl @@ -152,7 +152,7 @@ ENTER_CONFIG_MODE (SUPERIO_UART_LDN) PNP_WRITE_IO(PNP_IO0, Arg0, IO0) PNP_WRITE_IRQ(PNP_IRQ0, Arg0, IR0) - Store (One, PNP_DEVICE_ACTIVE) + PNP_DEVICE_ACTIVE = 1 EXIT_CONFIG_MODE () } } @@ -221,7 +221,7 @@ ENTER_CONFIG_MODE (SUPERIO_UART_LDN) PNP_WRITE_IO(PNP_IO0, Arg0, IO0) PNP_WRITE_IRQ(PNP_IRQ0, Arg0, IR0) - Store (One, PNP_DEVICE_ACTIVE) + PNP_DEVICE_ACTIVE = 1 EXIT_CONFIG_MODE () } } @@ -244,7 +244,7 @@ { /* DBG0("SIO CPSI") */ ENTER_CONFIG_MODE(SUPERIO_PME_LDN) - Store(1, PSIN) + PSIN = 1 EXIT_CONFIG_MODE() } #endif -- To view, visit https://review.coreboot.org/c/coreboot/+/45989 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia7072112a1add1de9c3fb348bc70dbd404337819 Gerrit-Change-Number: 45989 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/intel: Convert to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 12 Oct '20

12 Oct '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46081 ) Change subject: mb/intel: Convert to ASL 2.0 syntax ...................................................................... mb/intel: Convert to ASL 2.0 syntax Change-Id: I41195be171b48f41fe2955e4639d8b770853d483 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/intel/kblrvp/acpi/mipi_camera.asl M src/mainboard/intel/tglrvp/acpi/mipi_camera.asl 2 files changed, 75 insertions(+), 77 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/46081/1 diff --git a/src/mainboard/intel/kblrvp/acpi/mipi_camera.asl b/src/mainboard/intel/kblrvp/acpi/mipi_camera.asl index fa55794..ddb61b4 100644 --- a/src/mainboard/intel/kblrvp/acpi/mipi_camera.asl +++ b/src/mainboard/intel/kblrvp/acpi/mipi_camera.asl @@ -23,46 +23,45 @@ Name (AVB3, Zero) Method (_REG, 2, NotSerialized) { - If (LEqual (Arg0, 0x08)) + If (Arg0 == 0x08) { /* Marks the availability of GeneralPurposeIO * 0x08: opregion space for GeneralPurposeIO */ - Store (Arg1, AVGP) + AVGP = Arg1 } - If (LEqual (Arg0, 0xB0)) + If (Arg0 == 0xB0) { /* Marks the availability of * TI_PMIC_POWER_OPREGION_ID */ - Store (Arg1, AVB0) + AVB0 = Arg1 } - If (LEqual (Arg0, 0xB1)) + If (Arg0 == 0xB1) { /* Marks the availability of * TI_PMIC_VR_VAL_OPREGION_ID */ - Store (Arg1, AVB1) + AVB1 = Arg1 } - If (LEqual (Arg0, 0xB2)) + If (Arg0 == 0xB2) { /* Marks the availability of * TI_PMIC_CLK_OPREGION_ID */ - Store (Arg1, AVB2) + AVB2 = Arg1 } - If (LEqual (Arg0, 0xB3)) + If (Arg0 == 0xB3) { /* Marks the availability of * TI_PMIC_CLK_FREQ_OPREGION_ID */ - Store (Arg1, AVB3) + AVB3 = Arg1 } - If (LAnd (AVGP, LAnd (LAnd (AVB0, AVB1), - LAnd(AVB2, AVB3)))) + If (AVGP & ((AVB0 & AVB1) & (AVB2 & AVB3))) { /* Marks the availability of all opregions */ - Store (1, AVP1) + AVP1 = 1 } Else { - Store (0, AVP1) + AVP1 = 0 } } @@ -163,9 +162,9 @@ Method (CLKE, 0, Serialized) { /* save Acquire result so we can check for Mutex acquired */ - Store (Acquire (MUTC, 1000), Local0) + Local0 = Acquire (MUTC, 1000) /* check for Mutex acquired */ - If (LEqual (Local0, Zero)) { + If (Local0 == 0) { /* Set boost clock divider */ BODI = 3 /* Set buck clock divider */ @@ -197,9 +196,9 @@ Method (CLKD, 0, Serialized) { /* save Acquire result so we can check for Mutex acquired */ - Store (Acquire (MUTC, 1000), Local0) + Local0 = Acquire (MUTC, 1000) /* check for Mutex acquired */ - If (LEqual (Local0, Zero)) { + If (Local0 == 0) { BODI = 0 BUDI = 0 PSWR = 0 @@ -220,26 +219,26 @@ Method (DOVD, 1, Serialized) { /* Save Acquire result so we can check for Mutex acquired */ - Store (Acquire (MUTV, 1000), Local0) + Local0 = Acquire (MUTV, 1000) /* Check for Mutex acquired */ - If (LEqual (Local0, Zero)) { + If (Local0 == 0) { /* Turn off VSIO */ - If (LEqual (Arg0, Zero)) { + If (Arg0 == 0) { /* Decrement only if VSIC > 0 */ - if (LGreater (VSIC, 0)) { - Decrement (VSIC) - If (LEqual (VSIC, Zero)) { + if (VSIC > 0) { + VSIC-- + If (VSIC == 0) { VSIO = 0 } } - } ElseIf (LEqual (Arg0, 1)) { + } ElseIf (Arg0 == 1) { /* Increment only if VSIC < 2 */ - If (LLess (VSIC, 2)) { + If (VSIC < 2) { /* Turn on VSIO */ - If (LEqual (VSIC, Zero)) { + If (VSIC == 0) { VSIO = 3 } - Increment (VSIC) + VSIC++ } } @@ -251,18 +250,18 @@ PowerResource (OVTH, 0, 0) { Name (STA, 0) Method (_ON, 0, Serialized) { - If (LEqual (AVP1, 1)) { - If (LEqual (STA, 0)) { + If (AVP1 == 1) { + If (STA == 0) { /* Enable VSIO regulator + daisy chain */ DOVD(1) - if (LNotEqual (IOVA, 52)) { + if (IOVA != 52) { /* Set VSIO value as 1.8006 V */ IOVA = 52 } - if (LNotEqual (SIOV, 52)) { + if (SIOV != 52) { /* Set VSIO value as 1.8006 V */ SIOV = 52 @@ -270,7 +269,7 @@ Sleep(3) VACT = 1 - if (LNotEqual (ACVA, 109)) { + if ACVA != 109) { /* Set ANA at 2.8152V */ ACVA = 109 } @@ -279,7 +278,7 @@ \_SB.PCI0.I2C2.PMIC.CLKE() VDCT = 1 - if (LNotEqual (DCVA, 12)) { + if (DCVA != 12) { /* Set CORE at 1.2V */ DCVA = 12 } @@ -293,8 +292,8 @@ } Method (_OFF, 0, Serialized) { - If (LEqual (AVP1, 1)) { - If (LEqual (STA, 1)) { + If (AVP1 == 1) { + If (STA == 1) { Sleep(2) \_SB.PCI0.I2C2.PMIC.CLKD() Sleep(2) @@ -319,17 +318,17 @@ PowerResource (VCMP, 0, 0) { Name (STA, 0) Method (_ON, 0, Serialized) { - If (LEqual (AVP1, 1)) { - If (LEqual (STA, 0)) { + If (AVP1 == 1) { + If (STA == 0) { /* Enable VSIO regulator + daisy chain */ DOVD(1) - if (LNotEqual (IOVA, 52)) { + if (IOVA != 52) { /* Set VSIO value as 1.8006 V */ IOVA = 52 } - if (LNotEqual (SIOV, 52)) { + if (SIOV != 52) { /* Set VSIO value as 1.8006 V */ SIOV = 52 @@ -338,7 +337,7 @@ /* Enable VCM regulator */ VCMC = 1 - if (LNotEqual (VCMV, 109)) { + if ((VCM !=, 109) { /* Set VCM value at 2.8152 V */ VCMV = 109 @@ -351,8 +350,8 @@ } Method (_OFF, 0, Serialized) { - If (LEqual (AVP1, 1)) { - If (LEqual (STA, 1)) { + If (AVP1 == 1) { + If (STA == 1) { VCMC = 0 /* Disable regulator */ Sleep(1) DOVD(0) /* Disable regulator */ @@ -522,46 +521,45 @@ Name (AVB3, Zero) Method (_REG, 2, NotSerialized) { - If (LEqual (Arg0, 0x08)) + If (Arg0 == 0x08) { /* Marks the availability of GeneralPurposeIO * 0x08: opregion space for GeneralPurposeIO */ - Store (Arg1, AVGP) + AVGP = Arg1 } - If (LEqual (Arg0, 0xB0)) + If (Arg0 == 0xB0) { /* Marks the availability of * TI_PMIC_POWER_OPREGION_ID */ - Store (Arg1, AVB0) + AVB0 = Arg1 } - If (LEqual (Arg0, 0xB1)) + If (Arg0 == 0xB1) { /* Marks the availability of * TI_PMIC_VR_VAL_OPREGION_ID */ - Store (Arg1, AVB1) + AVB1 = Arg1 } - If (LEqual (Arg0, 0xB2)) + If (Arg0 == 0xB2) { /* Marks the availability of * TI_PMIC_CLK_OPREGION_ID */ - Store (Arg1, AVB2) + AVB2 = Arg1 } - If (LEqual (Arg0, 0xB3)) + If (Arg0 == 0xB3) { /* Marks the availability of * TI_PMIC_CLK_FREQ_OPREGION_ID */ - Store (Arg1, AVB3) + AVB3 = Arg1 } - If (LAnd (AVGP, LAnd (LAnd (AVB0, AVB1), - LAnd(AVB2, AVB3)))) + If (AVGP & ((AVB0 & AVB1) & (AVB2 & AVB3))) { /* Marks the availability of all opregions */ - Store (1, AVP2) + AVP2 = 1 } Else { - Store (0, AVP2) + AVP2 = 0 } } @@ -669,9 +667,9 @@ Method (CLKE, 0, Serialized) { /* save Acquire result so we can check for Mutex acquired */ - Store (Acquire (MUTC, 1000), Local0) + Local0 = Acquire (MUTC, 1000) /* check for Mutex acquired */ - If (LEqual (Local0, Zero)) { + If (Local0 == 0) { /* Set boost clock divider */ BODI = 3 /* Set buck clock divider */ @@ -703,9 +701,9 @@ Method (CLKD, 0, Serialized) { /* save Acquire result so we can check for Mutex acquired */ - Store (Acquire (MUTC, 1000), Local0) + Local0 = Acquire (MUTC, 1000) /* check for Mutex acquired */ - If (LEqual (Local0, Zero)) { + If (Local0 == 0) { BODI = 0 BUDI = 0 PSWR = 0 @@ -726,13 +724,13 @@ Method (DOVD, 1, Serialized) { /* Save Acquire result so we can check for Mutex acquired */ - Store (Acquire (MUTV, 1000), Local0) + Local0 = Acquire (MUTV, 1000) /* Check for Mutex acquired */ - If (LEqual (Local0, Zero)) { + If (Local0 == 0) { /* Turn off VSIO */ - If (LEqual (Arg0, Zero)) { + If (Arg0 == 0) { VSIO = 0 - } ElseIf (LEqual (Arg0, 1)) { + } ElseIf (Arg0 == 1) { VSIO = 3 } Release (MUTV) @@ -743,15 +741,15 @@ PowerResource (OVFI, 0, 0) { Name (STA, 0) Method (_ON, 0, Serialized) { - If (LEqual (AVP2, 1)) { - If (LEqual (STA, 0)) { + If (AVP2 == 1) { + If (STA == 0) { /* Enable VSIO regulator + daisy chain */ DOVD(1) VAX2 = 1 /* Enable VAUX2 */ - if (LNotEqual (AX2V, 52)) { + if (AX2V != 52) { /* Set VAUX2 as 1.8006 V */ AX2V = 52 @@ -761,7 +759,7 @@ \_SB.PCI0.I2C3.PMIC.CLKE() VAX1 = 1 /* Enable VAUX1 */ - if (LNotEqual (AX1V, 19)) { + if (AX1V != 19) { /* Set VAUX1 as 1.2132V */ AX1V = 19 } @@ -778,8 +776,8 @@ } Method (_OFF, 0, Serialized) { - If (LEqual (AVP2, 1)) { - If (LEqual (STA, 1)) { + If (AVP2 == 1) { + If (STA == 1) { Sleep(2) \_SB.PCI0.I2C3.PMIC.CLKD() Sleep(2) diff --git a/src/mainboard/intel/tglrvp/acpi/mipi_camera.asl b/src/mainboard/intel/tglrvp/acpi/mipi_camera.asl index 0f83b05..6ff05f7 100644 --- a/src/mainboard/intel/tglrvp/acpi/mipi_camera.asl +++ b/src/mainboard/intel/tglrvp/acpi/mipi_camera.asl @@ -170,12 +170,12 @@ STXS(GPP_C15) Sleep(1) /* t2 */ - Store(1,STA) + STA = 1 } } Method (_OFF, 0, Serialized) /* Rear camera _OFF: Power Off */ { - If ((STA == One)) + If (STA == 1) { /* Disable IMG_CLK */ Sleep(1) /* t0+t1 */ @@ -187,7 +187,7 @@ /* Pull PWREN low */ CTXS(GPP_B23) - Store(0,STA) + STA = 0 } } Method (_STA, 0, NotSerialized) /* _STA: Status */ @@ -389,12 +389,12 @@ STXS(GPP_H12) Sleep(1) /* t2 */ - Store(1,STA) + STA = 1 } } Method (_OFF, 0, Serialized) /* Front camera_OFF_: Power Off */ { - If ((STA == One)) + If (STA == 1) { /* Disable IMG_CLK */ Sleep(1) /* t0+t1 */ @@ -410,7 +410,7 @@ CTXS(GPP_R6) #endif - Store(0,STA) + STA = 0 } } Method (_STA, 0, NotSerialized) /* _STA: Status */ -- To view, visit https://review.coreboot.org/c/coreboot/+/46081 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I41195be171b48f41fe2955e4639d8b770853d483 Gerrit-Change-Number: 46081 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

4 10

Change in coreboot[master]: superio/winbond/*/acpi: Convert superio.asl to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 12 Oct '20

12 Oct '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45994 ) Change subject: superio/winbond/*/acpi: Convert superio.asl to ASL 2.0 syntax ...................................................................... superio/winbond/*/acpi: Convert superio.asl to ASL 2.0 syntax Change-Id: I67e08a1099e41acb7031469069d9eddb274f7735 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/superio/winbond/w83627dhg/acpi/superio.asl M src/superio/winbond/w83627hf/acpi/superio.asl M src/superio/winbond/w83977tf/acpi/superio.asl 3 files changed, 312 insertions(+), 303 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/45994/1 diff --git a/src/superio/winbond/w83627dhg/acpi/superio.asl b/src/superio/winbond/w83627dhg/acpi/superio.asl index 4667b13..298e9a7 100644 --- a/src/superio/winbond/w83627dhg/acpi/superio.asl +++ b/src/superio/winbond/w83627dhg/acpi/superio.asl @@ -111,7 +111,7 @@ /* PM: indicate IPD (Immediate Power Down) bit state as D0/D3 */ Method (_PSC) { ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE) - Store (IPD, Local0) + Local0 = IPD EXIT_CONFIG_MODE () If (Local0) { Return (3) } Else { Return (0) } @@ -120,14 +120,14 @@ /* PM: Switch to D0 by setting IPD low */ Method (_PS0) { ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE) - Store (Zero, IPD) + IPD = 0 EXIT_CONFIG_MODE () } /* PM: Switch to D3 by setting IPD high */ Method (_PS3) { ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE) - Store (One, IPD) + IPD = 1 EXIT_CONFIG_MODE () } @@ -145,10 +145,10 @@ #define SUPERIO_SUSL_LDN 9 Method (SUSL, 1, Serialized) { ENTER_CONFIG_MODE (SUPERIO_SUSL_LDN) - Store (SULM, Local0) - And (Local0, 0x1f, Local0) - Or (Local0, ShiftLeft (Arg0, 5), Local0) - Store (Local0, SULM) + Local0 = SULM + Local0 &= 0x1f + Local0 |= (Arg0 << 5) + SULM = Local0 EXIT_CONFIG_MODE () } diff --git a/src/superio/winbond/w83627hf/acpi/superio.asl b/src/superio/winbond/w83627hf/acpi/superio.asl index 1f92df9..ccf4c93 100644 --- a/src/superio/winbond/w83627hf/acpi/superio.asl +++ b/src/superio/winbond/w83627hf/acpi/superio.asl @@ -151,10 +151,10 @@ Method (ENTER_CONFIG_MODE, 1) { Acquire (CRMX, 0xFFFF) - Store (0x87, ADDR) - Store (0x87, ADDR) - If (LLess(Arg0, 0xFF)) { - Store(Arg0, LDN) + ADDR = 0x87 + ADDR = 0x87 + If (Arg0 < 0xFF) { + LDN = Arg0 } } @@ -163,14 +163,14 @@ */ Method (EXIT_CONFIG_MODE) { - Store (0xAA, ADDR) + ADDR = 0xAA Release (CRMX) } /* PM: indicate IPD (Immediate Power Down) bit state as D0/D3 */ Method (_PSC) { ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE) - Store (IPD, Local0) + Local0 = IPD EXIT_CONFIG_MODE () If (Local0) { Return (3) } Else { Return (0) } @@ -179,14 +179,14 @@ /* PM: Switch to D0 by setting IPD low */ Method (_PS0) { ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE) - Store (Zero, IPD) + IPD = 0 EXIT_CONFIG_MODE () } /* PM: Switch to D3 by setting IPD high */ Method (_PS3) { ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE) - Store (One, IPD) + IPD = 1 EXIT_CONFIG_MODE () } @@ -199,14 +199,14 @@ Method (_STA) { - Store (0x00, Local0) + Local0 = 0x00 ENTER_CONFIG_MODE (0) If (ACTR) { - Store (0x0F, Local0) + Local0 = 0x0F } - ElseIf (LOr (IO1H, IO1L)) + ElseIf (IO1H || IO1L) { - Store (0x0D, Local0) + Local0 = 0x0D } EXIT_CONFIG_MODE () Return (Local0) @@ -216,10 +216,10 @@ * 2 if whole chip is powered down), 0 else */ Method (_PSC) { - Store(^^_PSC (), Local0) + Local0 = ^^_PSC () If (Local0) { Return (Local0) } ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE) - Store (FDPW, Local0) + Local0 = FDPW EXIT_CONFIG_MODE () If (Local0) { Return (3) } Else { Return (0) } @@ -227,20 +227,20 @@ /* Disable power saving mode */ Method (_PS0) { ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE) - Store (One, FDPW) + FDPW = 1 EXIT_CONFIG_MODE () } /* Enable power saving mode */ Method (_PS3) { ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE) - Store (Zero, FDPW) + FDPW = 0 EXIT_CONFIG_MODE () } Method (_DIS) { ENTER_CONFIG_MODE (0) - Store (Zero, ACTR) + ACTR = 0 EXIT_CONFIG_MODE () } @@ -254,18 +254,18 @@ /* Get IO port info */ ENTER_CONFIG_MODE (0) - Store(IO1L, Local0) - Store(IO1H, Local1) + Local0 = IO1L + Local1 = IO1H EXIT_CONFIG_MODE () /* Calculate full IO port address */ - Or(ShiftLeft(Local1, 8), Local0, Local0) + Local0 |= (Local1 << 8) /* Modify the resource template and return it */ CreateWordField (CRS, IO0._MIN, IMIN) CreateWordField (CRS, IO0._MAX, IMAX) - Store (Local0, IMIN) - Store (Local0, IMAX) + IMIN = Local0 + IMAX = Local0 Return (CRS) } @@ -300,13 +300,13 @@ // Get resources from logical device ENTER_CONFIG_MODE (0) - Store (ACTR, Local0) - Store (IO1H, Local1) - Store (IO1L, Local2) + Local0 = ACTR + Local1 = IO1H + Local2 = IO1L EXIT_CONFIG_MODE () - ShiftLeft(Local1, 8, Local1) - Or(Local1, Local2, Local1) - If (LNot(Local0)) { + Local1 <<= 8 + Local1 |= Local2 + If (!Local0) { Return (FDE) } @@ -338,30 +338,30 @@ SIFR, 8 } - Store(One, ACT1) - Store(0, SELE) + ACT1 = 1 + SELE = 0 Sleep(0x64) - If (SIFR) { Store (One, FD1) } + If (SIFR) { FD1 = 1 } - Store(Zero, ACT1) - Store(One, ACT2) - Store(1, SELE) + ACT1 = 0 + ACT2 = 1 + SELE = 1 Sleep(0x64) - If (SIFR) { Store (One, FD2) } + If (SIFR) { FD2 = 1 } - Store(Zero, ACT2) - Store(One, ACT3) - Store(2, SELE) + ACT2 = 0 + ACT3 = 1 + SELE = 2 Sleep(0x64) - If (SIFR) { Store (One, FD3) } + If (SIFR) { FD3 = 1 } - Store(Zero, ACT3) - Store(One, ACT4) - Store(3, SELE) + ACT3 = 0 + ACT4 = 1 + SELE = 3 Sleep(0x64) - If (SIFR) { Store (One, FD4) } - Store(Zero, ACT4) - Store(Zero, SELE) + If (SIFR) { FD4 = 1 } + ACT4 = 0 + SELE = 0 Return (FDE) } @@ -379,12 +379,13 @@ CreateByteField (Arg0, IRQ0._INT, IRQL) CreateByteField (Arg0, DMA0._DMA, DMCH) - Divide(IOA0, 256, Local0, Local1) + Local1 = IOA0 / 256 + Local0 = IOA0 % 256 ENTER_CONFIG_MODE (0) - Store (Local0, IO1L) - Store (Local1, IO1H) - Store (One, ACTR) + IO1L = Local0 + IO1H = Local1 + ACTR = 1 EXIT_CONFIG_MODE () } } @@ -399,10 +400,10 @@ Name (_UID, "w83627hf-pport") Method (MODE, 1) { - And(Arg0, 0x07, Local0) + Local0 = Arg0 & 0x07 ENTER_CONFIG_MODE (1) - And(OPT1, 0x3, Local1) - Or(Local1, Local0, OPT1) + Local1 = OPT1 & 0x3 + OPT1 = Local1 | Local0 EXIT_CONFIG_MODE() } @@ -412,53 +413,53 @@ through _CRS and it's only useful in ECP mode which we don't support at the moment. */ ENTER_CONFIG_MODE (1) - Store (0x04, DMA0) + DMA0 = 0x04 EXIT_CONFIG_MODE () } Method (_STA) { - Store (0x00, Local0) + Local0 = 0x00 ENTER_CONFIG_MODE (1) - And(OPT1, 0x3, Local1) + Local1 = OPT1 & 0x3 If (ACTR) { - If (LNotEqual(Local1, 2)) { - Store (0x0D, Local0) + If (Local1 != 2) { + Local0 = 0x0D } Else { - Store (0x0D, Local0) + Local0 = 0x0D /* FIXME: same branches */ } } - ElseIf (LOr (IO1H, IO1L)) + ElseIf (IO1H || IO1L) { - Store (0x0D, Local0) + Local0 = 0x0D } EXIT_CONFIG_MODE () Return (Local0) } Method (_PSC) { - Store(^^_PSC (), Local0) + Local0 = ^^_PSC () If (Local0) { Return (Local0) } ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE) - Store (PRPW, Local0) + Local0 = PRPW EXIT_CONFIG_MODE () If (Local0) { Return (3) } Else { Return (0) } } Method (_PS0) { ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE) - Store (One, PRPW) + PRPW = 1 EXIT_CONFIG_MODE () } Method (_PS3) { ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE) - Store (Zero, PRPW) + PRPW = 0 EXIT_CONFIG_MODE () } Method (_DIS) { ENTER_CONFIG_MODE (1) - Store (Zero, ACTR) + ACTR = 0 EXIT_CONFIG_MODE () } @@ -477,33 +478,33 @@ /* Get device settings */ ENTER_CONFIG_MODE (1) - Store (IO1L, Local0) - Store (IO1H, Local1) - Store (OPT1, Local2) - Store (IRQ0, Local5) + Local0 = IO1L + Local1 = IO1H + Local2 = OPT1 + Local5 = IRQ0 EXIT_CONFIG_MODE () /* Calculate IO port and modify template */ - Or(ShiftLeft(Local1, 8), Local0, Local0) - Store(Local1, IOP0) - Store(Local1, IOR0) + Local0 |= (Local1 << 8) + IOP0 = Local1 + IOR0 = Local1 /* Set align and length based on active parallel port mode */ - And(Local2, 0x3, Local3) - And(Local2, 0x4, Local4) + Local3 = Local2 & 0x3 + Local4 = Local2 & 0x4 If (Local4) { - Store(0x04, IOAL) + IOAL = 0x04 } - If (LEqual (Local0, 0xBC)) + If (Local0 == 0xBC) { - Store (0x04, IOLE) + IOLE = 0x04 } Else { - Store (0x08, IOLE) + IOLE = 0x08 } /* Calculate IRQ bitmap */ - Store (One, Local0) - ShiftLeft (Local0, Local5, IRQW) + Local0 = 1 + IRQW = Local0 << Local5 /* Return resource template */ Return (CRS) } @@ -564,28 +565,29 @@ CreateByteField (Arg0, IO0._LEN, IOLE) CreateWordField (Arg0, IRQX._INT, IRQL) - If (LEqual(IOAL, 4)) { - Store(0x0, Local2) + If (IOAL == 4) { + Local2 = 0x0 } else { - Store(0x1, Local2) + Local2 = 0x1 } - Divide(IOA0, 256, Local0, Local1) + Local1 = IOA0 / 256 + Local0 = IOA0 % 256 ENTER_CONFIG_MODE (1) /* IO port */ - Store (Local0, IO1L) - Store (Local1, IO1H) + IO1L = Local0 + IO1H = Local1 /* Mode */ - Store (OPT1, Local3) - And (Local3, 0xF8, Local3) - Or (Local2, Local3, OPT1) + Local3 = OPT1 + Local3 &= 0xF8 + OPT1 = Local2 | Local3 /* DMA off */ - Store (0x04, DMA0) + DMA0 = 0x04 /* IRQ */ - Subtract(FindSetLeftBit (IRQL), 1, IRQ0) + IRQ0 = FindSetLeftBit (IRQL) - 1 /* Activate */ - Store (One, ACTR) + ACTR = 1 EXIT_CONFIG_MODE () } } @@ -600,43 +602,43 @@ Method (_STA) { - Store (0x00, Local0) + Local0 = 0x00 ENTER_CONFIG_MODE (2) If (ACTR) { - Store (0x0F, Local0) + Local0 = 0x0F } - ElseIf (LOr (IO1H, IO1L)) + ElseIf (IO1H || IO1L) { - Store (0x0D, Local0) + Local0 = 0x0D } EXIT_CONFIG_MODE () Return (Local0) } Method (_PSC) { - Store(^^_PSC (), Local0) + Local0 = ^^_PSC () If (Local0) { Return (Local0) } ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE) - Store (UAPW, Local0) + Local0 = UAPW EXIT_CONFIG_MODE () If (Local0) { Return (3) } Else { Return (0) } } Method (_PS0) { ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE) - Store (One, UAPW) + UAPW = 1 EXIT_CONFIG_MODE () } Method (_PS3) { ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE) - Store (Zero, UAPW) + UAPW = 0 EXIT_CONFIG_MODE () } Method (_DIS) { ENTER_CONFIG_MODE (2) - Store (Zero, ACTR) + ACTR = 0 EXIT_CONFIG_MODE () } @@ -647,20 +649,20 @@ IRQNoFlags (IRQX) {6} }) ENTER_CONFIG_MODE (2) - Store(IO1L, Local0) - Store(IO1H, Local1) - Store(IRQ0, Local2) + Local0 = IO1L + Local1 = IO1H + Local2 = IRQ0 EXIT_CONFIG_MODE () - Or(ShiftLeft(Local1, 8), Local0, Local0) + Local0 |= (Local1 << 8) CreateWordField (CRS, IO0._MIN, IMIN) - Store (Local0, IMIN) + IMIN = Local0 CreateWordField (CRS, IO0._MAX, IMAX) - Store (Local0, IMAX) + IMAX = Local0 CreateWordField (CRS, IRQX._INT, IRQW) - Store (One, Local3) - ShiftLeft (Local3, Local2, IRQW) + Local3 = 1 + IRQW = Local3 << Local2 Return (CRS) } @@ -699,15 +701,16 @@ CreateWordField (Arg0, IO0._MIN, IOA0) CreateWordField (Arg0, IRQX._INT, IRQL) - Divide(IOA0, 256, Local0, Local1) + Local1 = IOA0 / 256 + Local0 = IOA0 % 256 - Subtract(FindSetLeftBit (IRQL), 1, Local3) + Local3 = FindSetLeftBit (IRQL) - 1 ENTER_CONFIG_MODE (2) - Store (Local0, IO1L) - Store (Local1, IO1H) - Store (Local3, IRQ0) - Store (One, ACTR) + IO1L = Local0 + IO1H = Local1 + Local3 = Local3 + ACTR = 1 EXIT_CONFIG_MODE () } } @@ -722,16 +725,17 @@ Method (_STA) { - Store (0x00, Local0) + Local0 = 0x00 ENTER_CONFIG_MODE (3) - If (LNot(And(OPT2, 0x30))) + If (!(OPT2 & 0x30)) { If (ACTR) { - Store (0x0F, Local0) + Local0 = 0x0F + } - ElseIf (LOr (IO1H, IO1L)) + ElseIf (IO1H || IO1L) { - Store (0x0D, Local0) + Local0 = 0x0D } } EXIT_CONFIG_MODE () @@ -739,29 +743,29 @@ } Method (_PSC) { - Store(^^_PSC (), Local0) + Local0 = ^^_PSC () If (Local0) { Return (Local0) } ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE) - Store (UBPW, Local0) + Local0 = UBPW EXIT_CONFIG_MODE () If (Local0) { Return (3) } Else { Return (0) } } Method (_PS0) { ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE) - Store (One, UBPW) + UBPW = 1 EXIT_CONFIG_MODE () } Method (_PS3) { ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE) - Store (Zero, UBPW) + UBPW = 0 EXIT_CONFIG_MODE () } Method (_DIS) { ENTER_CONFIG_MODE (3) - Store (Zero, ACTR) + ACTR = 0 EXIT_CONFIG_MODE () } @@ -772,20 +776,20 @@ IRQNoFlags (IRQX) {6} }) ENTER_CONFIG_MODE (3) - Store(IO1L, Local0) - Store(IO1H, Local1) - Store(IRQ0, Local2) + Local0 = IO1L + Local1 = IO1H + Local2 = IRQ0 EXIT_CONFIG_MODE () - Or(ShiftLeft(Local1, 8), Local0, Local0) + Local0 |= (Local1 << 8) CreateWordField (CRS, IO0._MIN, IMIN) - Store (Local0, IMIN) + IMIN = Local0 CreateWordField (CRS, IO0._MAX, IMAX) - Store (Local0, IMAX) + IMAX = Local0 CreateWordField (CRS, IRQX._INT, IRQW) - Store (One, Local3) - ShiftLeft (Local3, Local2, IRQW) + Local3 = 1 + IRQW = Local3 << Local2 Return (CRS) } @@ -824,15 +828,16 @@ CreateWordField (Arg0, IO0._MIN, IOA0) CreateByteField (Arg0, IRQX._INT, IRQL) - Divide(IOA0, 256, Local0, Local1) + Local1 = IOA0 / 256 + Local0 = IOA0 % 256 - Subtract(FindSetLeftBit (IRQL), 1, Local3) + Local3 = FindSetLeftBit (IRQL) - 1 ENTER_CONFIG_MODE (3) - Store (Local0, IO1L) - Store (Local1, IO1H) - Store (Local3, IRQ0) - Store (One, ACTR) + IO1L = Local0 + IO1H = Local1 + IRQ0 = Local3 + ACTR = 1 EXIT_CONFIG_MODE () } } @@ -847,16 +852,16 @@ Method (_STA) { - Store (0x00, Local0) + Local0 = 0x00 ENTER_CONFIG_MODE (3) - If (And(OPT2, 0x30)) + If (OPT2 & 0x30) { If (ACTR) { - Store (0x0F, Local0) + Local0 = 0x0F } - ElseIf (LOr (IO1H, IO1L)) + ElseIf (IO1H || IO1L) { - Store (0x0D, Local0) + Local0 = 0x0D } } EXIT_CONFIG_MODE () @@ -864,29 +869,29 @@ } Method (_PSC) { - Store(^^_PSC (), Local0) + Local0 = ^^_PSC () If (Local0) { Return (Local0) } ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE) - Store (UBPW, Local0) + Local0 = UBPW EXIT_CONFIG_MODE () If (Local0) { Return (3) } Else { Return (0) } } Method (_PS0) { ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE) - Store (One, UBPW) + UBPW = 1 EXIT_CONFIG_MODE () } Method (_PS3) { ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE) - Store (Zero, UBPW) + UBPW = 0 EXIT_CONFIG_MODE () } Method (_DIS) { ENTER_CONFIG_MODE (3) - Store (Zero, ACTR) + ACTR = 0 EXIT_CONFIG_MODE () } @@ -897,20 +902,20 @@ IRQNoFlags (IRQX) {6} }) ENTER_CONFIG_MODE (3) - Store(IO1H, Local1) - Store(IO1L, Local0) - Store(IRQ0, Local2) + Local1 = IO1H + Local0 = IO1L + Local2 = IRQ0 EXIT_CONFIG_MODE () - Or(ShiftLeft(Local1, 8), Local0, Local0) + Local0 |= (Local1 << 8) CreateWordField (CRS, IO0._MIN, IMIN) - Store (Local0, IMIN) + IMIN = Local0 CreateWordField (CRS, IO0._MAX, IMAX) - Store (Local0, IMAX) + IMAX = Local0 CreateWordField (CRS, IRQX._INT, IRQW) - Store (One, Local3) - ShiftLeft (Local3, Local2, IRQW) + Local3 = 1 + IRQW = Local3 << Local2 Return (CRS) } @@ -949,15 +954,16 @@ CreateWordField (Arg0, IO0._MIN, IOA0) CreateByteField (Arg0, IRQX._INT, IRQL) - Divide(IOA0, 256, Local0, Local1) + Local1 = IOA0 / 256 + Local0 = IOA0 % 256 - Subtract(FindSetLeftBit (IRQL), 1, Local3) + Local3 = FindSetLeftBit (IRQL) - 1 ENTER_CONFIG_MODE (3) - Store (Local0, IO1L) - Store (Local1, IO1H) - Store (Local3, IRQ0) - Store (One, ACTR) + IO1L = Local0 + IO1H = Local1 + IRQ0 = Local3 + ACTR = 1 EXIT_CONFIG_MODE () } } @@ -973,14 +979,14 @@ Method (_STA) { - Store (0x00, Local0) + Local0 = 0x00 ENTER_CONFIG_MODE (6) If (ACTR) { - Store (0x0F, Local0) + Local0 = 0x0F } - ElseIf (LOr (IO1H, IO1L)) + ElseIf (IO1H || IO1L) { - Store (0x0D, Local0) + Local0 = 0x0D } EXIT_CONFIG_MODE () Return (Local0) @@ -989,7 +995,7 @@ Method (_DIS) { ENTER_CONFIG_MODE (6) - Store (Zero, ACTR) + ACTR = 0 EXIT_CONFIG_MODE () } @@ -1000,20 +1006,20 @@ IRQNoFlags (IRQX) {6} }) ENTER_CONFIG_MODE (6) - Store(IO1L, Local0) - Store(IO1H, Local1) - Store(IRQ0, Local2) + Local0 = IO1L + Local1 = IO1H + Local2 = IRQ0 EXIT_CONFIG_MODE () - Or(ShiftLeft(Local1, 8), Local0, Local0) + Local0 |= (Local1 << 8) CreateWordField (CRS, IO0._MIN, IMIN) - Store (Local0, IMIN) + IMIN = Local0 CreateWordField (CRS, IO0._MAX, IMAX) - Store (Local0, IMAX) + IMAX = Local0 CreateWordField (CRS, IRQX._INT, IRQW) - Store (One, Local3) - ShiftLeft (Local3, Local2, IRQW) + Local3 = 1 + IRQW = Local3 << Local2 Return (CRS) } @@ -1036,15 +1042,16 @@ CreateWordField (Arg0, IO0._MIN, IOA0) CreateByteField (Arg0, IRQX._INT, IRQL) - Divide(IOA0, 256, Local0, Local1) + Local1 = IOA0 / 256 + Local0 = IOA0 % 256 - Subtract(FindSetLeftBit (IRQL), 1, Local3) + Local3 = FindSetLeftBit (IRQL) - 1 ENTER_CONFIG_MODE (6) - Store (Local0, IO1L) - Store (Local1, IO1H) - Store (Local3, IRQ0) - Store (One, ACTR) + IO1L = Local0 + IO1H = Local1 + IRQ0 = Local3 + ACTR = 1 EXIT_CONFIG_MODE () } } @@ -1059,17 +1066,17 @@ Method (_STA) { - Store (0x00, Local0) + Local0 = 0x00 ENTER_CONFIG_MODE (5) If (ACTR) { - Store (0x0F, Local0) + Local0 = 0x0F } - ElseIf (Lor(LOr (IO1H, IO1L), LOr (IO2H, IO2L))) + ElseIf (IO1H || IO1L || IO2H ||IO2L) { #ifdef W83627HF_KBC_COMPAT - Store (0x0F, Local0) + Local0 = 0x0F #else - Store (0x0D, Local0) + Local0 = 0x0D #endif } EXIT_CONFIG_MODE () @@ -1079,7 +1086,7 @@ Method (_DIS) { ENTER_CONFIG_MODE (5) - Store (Zero, ACTR) + ACTR = 0 EXIT_CONFIG_MODE () Notify(PS2M, 1) } @@ -1092,29 +1099,29 @@ IO (Decode16, 0x0000, 0x0000, 0x01, 0x01, IO1) }) ENTER_CONFIG_MODE (5) - Store(IO1L, Local0) - Store(IO1H, Local1) - Store(IO2L, Local2) - Store(IO2H, Local3) - Store(IRQ0, Local4) + Local0 = IO1L + Local1 = IO1H + Local2 = IO2L + Local3 = IO2H + Local4 = IRQ0 EXIT_CONFIG_MODE () - Or(ShiftLeft(Local1, 8), Local0, Local0) - Or(ShiftLeft(Local3, 8), Local2, Local2) + Local0 |= (Local1 << 8) + Local2 |= (Local3 << 8) CreateWordField (CRS, IO0._MIN, IMIN) - Store (Local0, IMIN) + IMIN = Local0 CreateWordField (CRS, IO0._MAX, IMAX) - Store (Local0, IMAX) + IMAX = Local0 CreateWordField (CRS, IO1._MIN, I1MI) - Store (Local2, I1MI) + I1MI = Local2 CreateWordField (CRS, IO1._MAX, I1MA) - Store (Local2, I1MA) + I1MA = Local2 CreateWordField (CRS, IRQX._INT, IRQW) - Store (One, Local5) - ShiftLeft (Local5, Local4, IRQW) + Local5 = 1 + IRQW = Local5 << Local4 Return (CRS) } @@ -1140,18 +1147,20 @@ CreateWordField (Arg0, IO1._MIN, IOA1) CreateWordField (Arg0, IRQX._INT, IRQL) - Divide(IOA0, 256, Local0, Local1) - Divide(IOA1, 256, Local2, Local3) + Local1 = IOA0 / 256 + Local0 = IOA0 % 256 + Local3 = IOA0 / 256 + Local2 = IOA0 % 256 - Subtract(FindSetLeftBit (IRQL), 1, Local4) + Local4 = FindSetLeftBit (IRQL) -1 ENTER_CONFIG_MODE (5) - Store (Local0, IO1L) - Store (Local1, IO1H) - Store (Local2, IO2L) - Store (Local3, IO2H) - Store (Local4, IRQ0) - Store (One, ACTR) + IO1L = Local0 + IO1H = Local1 + IO2L = Local2 + IO2H = Local3 + IRQ0 = Local4 + ACTR = 1 EXIT_CONFIG_MODE () Notify(PS2M, 1) } @@ -1164,17 +1173,17 @@ Method (_STA) { - Store (0x00, Local0) + Local0 = 0x00 ENTER_CONFIG_MODE (5) - If (LAnd(ACTR, IRQ1) ) { - Store (0x0F, Local0) + If (ACTR && IRQ1) { + Local0 = 0x0F } - ElseIf (Lor(LOr (IO1H, IO1L), LOr (IO2H, IO2L))) + ElseIf ((IO1H ||IO1L) || (IO2H || IO2L)) { #ifdef W83627HF_KBC_COMPAT - Store (0x0F, Local0) + Local0 = 0x0F #else - Store (0x0D, Local0) + Local0 = 0x0D #endif } EXIT_CONFIG_MODE () @@ -1184,7 +1193,7 @@ Method (_DIS) { ENTER_CONFIG_MODE (5) - Store (Zero, IRQ1) + IRQ1 = 0 EXIT_CONFIG_MODE () } @@ -1194,12 +1203,12 @@ IRQNoFlags (IRQX) {} }) ENTER_CONFIG_MODE (5) - Store(IRQ1, Local4) + Local4 = IRQ1 EXIT_CONFIG_MODE () CreateWordField (CRS, IRQX._INT, IRQW) - Store (One, Local5) - ShiftLeft (Local5, Local4, IRQW) + Local5 = 1 + IRQW = Local5 << Local4 Return (CRS) } @@ -1222,10 +1231,10 @@ }) CreateWordField (Arg0, IRQX._INT, IRQL) - Subtract(FindSetLeftBit (IRQL), 1, Local0) + Local0 = FindSetLeftBit (IRQL) - 1 ENTER_CONFIG_MODE (5) - Store (Local0, IRQ1) + IRQ1 = Local0 /* Only activates if KBD is active */ EXIT_CONFIG_MODE () } @@ -1242,14 +1251,14 @@ Name (_UID, "w83627hf-game") Method (_STA) { - Store(0, Local0) + Local0 = 0 ENTER_CONFIG_MODE (7) - If (LOr(IO1L, IO1H)) { - If (LOr(ACTR, ACT1)) { - Store (0x0F, Local0) + If (IO1L || IO1H) { + If (ACTR || ACT1) { + Local0 = 0x0F } Else { - Store (0x0D, Local0) + Local0 = 0x0D } } EXIT_CONFIG_MODE () @@ -1263,22 +1272,22 @@ IRQNoFlags (IRQX) {} }) ENTER_CONFIG_MODE (7) - Store(IO1L, Local0) - Store(IO1H, Local1) - Store(IRQ0, Local2) + Local0 = IO1L + Local1 = IO1H + Local2 = IRQ0 EXIT_CONFIG_MODE () - Or(ShiftLeft(Local1, 8), Local0, Local0) + Local0 |= (Local1 << 8) CreateWordField (CRS, IO0._MIN, IMIN) CreateWordField (CRS, IO0._MAX, IMAX) - Store (Local0, IMIN) - Store (Local0, IMAX) + IMIN = Local0 + IMAX = Local0 If (Local2) { CreateWordField (CRS, IRQX._INT, IRQW) - Store (One, Local3) - ShiftLeft (Local3, Local2, IRQW) + Local3 = 1 + IRQW = Local3 << Local2 } Return (CRS) @@ -1297,14 +1306,14 @@ Method (_STA) { - Store(0, Local0) + Local0 = 0 ENTER_CONFIG_MODE (7) - If (LOr(IO2L, IO2H)) { - If (LOr(ACTR, ACT2)) { - Store (0x0F, Local0) + If ((IO2L || IO2H)) { + If ((ACTR || ACT2)) { + Local0 = 0x0F } Else { - Store (0x0D, Local0) + Local0 = 0x0D } } EXIT_CONFIG_MODE () @@ -1318,22 +1327,22 @@ IRQNoFlags (IRQX) {} }) ENTER_CONFIG_MODE (7) - Store(IO2L, Local0) - Store(IO2H, Local1) - Store(IRQ1, Local2) + Local0 = IO2L + Local1 = IO2H + Local2 = IRQ1 EXIT_CONFIG_MODE () - Or(ShiftLeft(Local1, 8), Local0, Local0) + Local0 |= (Local1 << 8) CreateWordField (CRS, IO0._MIN, IMIN) CreateWordField (CRS, IO0._MAX, IMAX) - Store (Local0, IMIN) - Store (Local0, IMAX) + IMIN = Local0 + IMAX = Local0 If (Local2) { CreateWordField (CRS, IRQX._INT, IRQW) - Store (One, Local3) - ShiftLeft (Local3, Local2, IRQW) + Local3 = 1 + IRQW = Local3 << Local2 } Return (CRS) @@ -1346,9 +1355,9 @@ Method (SLED, 1) { ENTER_CONFIG_MODE (9) - Store(OPT4, Local0) - And(Local0, 63, Local0) - Or(Local0, ShiftLeft(And(Arg0, 0x03), 6), OPT4) + Local0 = OPT4 + Local0 &= 63 + OPT4 = Local0 | ((Arg0 & 0x03) << 6) EXIT_CONFIG_MODE () } @@ -1356,9 +1365,9 @@ Method (PLED, 1) { ENTER_CONFIG_MODE (8) - Store(OPT4, Local0) - And(Local0, 63, Local0) - Or(Local0, ShiftLeft(And(Arg0, 0x03), 6), OPT4) + Local0 = OPT4 + Local0 &= 63 + OPT4 = Local0 | ((Arg0 & 0x03) << 6) EXIT_CONFIG_MODE () } @@ -1372,14 +1381,14 @@ Method (_STA) { - Store (0x00, Local0) + Local0 = 0x00 ENTER_CONFIG_MODE (11) If (ACTR) { - Store (0x0F, Local0) + Local0 = 0x0F } - ElseIf (LOr (IO1H, IO1L)) + ElseIf (IO1H || IO1L) { - Store (0x0D, Local0) + Local0 = 0x0D } EXIT_CONFIG_MODE () Return (Local0) @@ -1387,10 +1396,10 @@ Method (_PSC) { - Store(^^_PSC (), Local0) + Local0 = ^^_PSC () If (Local0) { Return (Local0) } ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE) - Store (HWPW, Local0) + Local0 = HWPW EXIT_CONFIG_MODE () If (Local0) { Return (3) } Else { Return (0) } @@ -1399,14 +1408,14 @@ Method (_PS0) { ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE) - Store (One, HWPW) + HWPW = 1 EXIT_CONFIG_MODE () } Method (_PS3) { ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE) - Store (Zero, HWPW) + HWPW = 0 EXIT_CONFIG_MODE () } @@ -1417,22 +1426,22 @@ IRQNoFlags (IRQX) {} }) ENTER_CONFIG_MODE (11) - Store(IO1L, Local0) - Store(IO1H, Local1) - Store(IRQ1, Local2) + Local0 = IO1L + Local1 = IO1H + Local2 = IRQ1 EXIT_CONFIG_MODE () - Or(ShiftLeft(Local1, 8), Local0, Local0) + Local0 |= (Local1 << 8) CreateWordField (CRS, IO0._MIN, IMIN) CreateWordField (CRS, IO0._MAX, IMAX) - Store (Local0, IMIN) - Store (Local0, IMAX) + IMIN = Local0 + IMAX = Local0 If (Local2) { CreateWordField (CRS, IRQX._INT, IRQW) - Store (One, Local3) - ShiftLeft (Local3, Local2, IRQW) + Local3 = 1 + IRQW = Local3 << Local2 } Return (CRS) } @@ -1451,7 +1460,7 @@ Method (WAKS) { ENTER_CONFIG_MODE (10) - Store (CRE3, Local0) + Local0 = CRE3 EXIT_CONFIG_MODE () Return (Local0) } diff --git a/src/superio/winbond/w83977tf/acpi/superio.asl b/src/superio/winbond/w83977tf/acpi/superio.asl index 36d7681..291475a 100644 --- a/src/superio/winbond/w83977tf/acpi/superio.asl +++ b/src/superio/winbond/w83977tf/acpi/superio.asl @@ -80,7 +80,7 @@ /* PM: indicate IPD (Immediate Power Down) bit state as D0/D3 */ Method (_PSC) { ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE) - Store (IPD, Local0) + Local0 = IPD EXIT_CONFIG_MODE () If (Local0) { Return (3) } Else { Return (0) } @@ -118,11 +118,11 @@ PNP_READ_IO(PNP_IO0, BUF0, IO0) /* Store xx7 range first so the value isn't overwritten * for below */ - Add(IO0I, 7, IO1I) - Store(IO1I, IO1A) + IO1I += 7 + IO1A = IO1I /* Store xx2 range */ - Add(IO0I, 2, IO0I) - Store(IO0I, IO0A) + IO0I += 2 + IO0A = IO0I /* End OEM BIOS deficiency */ PNP_READ_IRQ(PNP_IRQ0, BUF0, Y08) PNP_READ_DMA(PNP_DMA0, BUF0, Y09) @@ -147,11 +147,11 @@ CreateByteField (Arg0, 0x15, DMAV) ENTER_CONFIG_MODE(W83977TF_FDC) /* FDC base port on 8-byte boundary. */ - And (IOLO, 0xF8, PNP_IO0_LOW_BYTE) - Store (IOHI, PNP_IO0_HIGH_BYTE) - Subtract (FindSetLeftBit (IRQW), 1, PNP_IRQ0) - Subtract (FindSetLeftBit (DMAV), 1, PNP_DMA0) - Store (One, PNP_DEVICE_ACTIVE) + PNP_IO0_LOW_BYTE = IOLO & 0xF8 + PNP_IO0_HIGH_BYTE = IOHI + PNP_IRQ0 = FindSetLeftBit (IRQW) - 1 + PNP_DMA0 = (FindSetLeftBit (DMAV) - 1 + PNP_DEVICE_ACTIVE = 1 EXIT_CONFIG_MODE() } } @@ -165,11 +165,11 @@ Method (_STA, 0, NotSerialized) { ENTER_CONFIG_MODE(W83977TF_PP) - And (OPT1, 0x02, Local0) - If (LOr (IO0H, IO0L)) + Local0 = OPT1 & 0x02 + If (IO0H || IO0L) { /* Report device not present if ECP is enabled */ - If (LEqual (Local0, 0x02)) + If (Local0 == 0x02) { EXIT_CONFIG_MODE() Return (0x00) @@ -239,10 +239,10 @@ CreateByteField (Arg0, 0x03, IOHI) CreateWordField (Arg0, 0x09, IRQW) ENTER_CONFIG_MODE(W83977TF_PP) - Store (IOLO, PNP_IO0_LOW_BYTE) - Store (IOHI, PNP_IO0_HIGH_BYTE) - Subtract (FindSetLeftBit (IRQW), 1, PNP_IRQ0) - Store (One, PNP_DEVICE_ACTIVE) + PNP_IO0_LOW_BYTE = IOLO + PNP_IO0_HIGH_BYTE = IOHI + PNP_IRQ0 = FindSetLeftBit (IRQW) - 1 + PNP_DEVICE_ACTIVE = 1 EXIT_CONFIG_MODE() } } @@ -254,10 +254,10 @@ Method (_STA, 0, NotSerialized) { ENTER_CONFIG_MODE(W83977TF_PP) - And (OPT1, 0x02, Local0) - If (LOr (IO0H, IO0L)) + Local0 = OPT1 & 0x02 + If (IO0H || IO0L) { - If (LEqual (Local0, 0x02)) + If (Local0 == 0x02) { If (PNP_DEVICE_ACTIVE) { @@ -339,11 +339,11 @@ CreateByteField (Arg0, 0x15, DMAC) ENTER_CONFIG_MODE(W83977TF_PP) - Store (IOLO, PNP_IO0_LOW_BYTE) - Store (IOHI, PNP_IO0_HIGH_BYTE) - Subtract (FindSetLeftBit (IRQW), 1, PNP_IRQ0) - Subtract (FindSetLeftBit (DMAC), 1, PNP_DMA0) - Store (One, PNP_DEVICE_ACTIVE) + PNP_IO0_LOW_BYTE = IOLO + PNP_IO0_HIGH_BYTE = IOHI + PNP_IRQ0 = FindSetLeftBit (IRQW) - 1 + PNP_DMA0 = FindSetLeftBit (DMAC) - 1 + PNP_DEVICE_ACTIVE = 1 EXIT_CONFIG_MODE() } } -- To view, visit https://review.coreboot.org/c/coreboot/+/45994 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I67e08a1099e41acb7031469069d9eddb274f7735 Gerrit-Change-Number: 45994 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

3 7

Change in coreboot[master]: mb/facebook: Convert to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 12 Oct '20

12 Oct '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46078 ) Change subject: mb/facebook: Convert to ASL 2.0 syntax ...................................................................... mb/facebook: Convert to ASL 2.0 syntax Change-Id: I91f65fecdcdf41dc41f136e8d66bbf730343aef3 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/facebook/monolith/acpi/ec.asl 1 file changed, 12 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/46078/1 diff --git a/src/mainboard/facebook/monolith/acpi/ec.asl b/src/mainboard/facebook/monolith/acpi/ec.asl index 8aff541..e729e01 100644 --- a/src/mainboard/facebook/monolith/acpi/ec.asl +++ b/src/mainboard/facebook/monolith/acpi/ec.asl @@ -36,8 +36,8 @@ Method (TSRD, 1, Serialized) { /* Prevent iasl remarks about unused parameters */ - Store(Arg0, Local0) - Store(Local0, Arg0) + Local0 = Arg0 + Arg0 = Local0 Return (\_SB.DPTF.CTOK (CPUT)) } @@ -45,27 +45,27 @@ Method (PAT0, 2, Serialized) { /* Prevent iasl remarks about unused parameters */ - Store(Arg0, Local0) - Store(Local0, Arg0) - Store(Arg1, Local0) - Store(Local0, Arg1) + Local0 = Arg0 + Arg0 = Local0 + Local0 = Arg1 + Arg1 = Local0 } /* Set Aux Trip Point 1 */ Method (PAT1, 2, Serialized) { /* Prevent iasl remarks about unused parameters */ - Store(Arg0, Local0) - Store(Local0, Arg0) - Store(Arg1, Local0) - Store(Local0, Arg1) + Local0 = Arg0 + Arg0 = Local0 + Local0 = Arg1 + Arg1 = Local0 } /* Disable Aux Trip Point */ Method (PATD, 1, Serialized) { /* Prevent iasl remarks about unused parameters */ - Store(Arg0, Local0) - Store(Local0, Arg0) + Local0 = Arg0 + Arg0 = Local0 } } -- To view, visit https://review.coreboot.org/c/coreboot/+/46078 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I91f65fecdcdf41dc41f136e8d66bbf730343aef3 Gerrit-Change-Number: 46078 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-MessageType: newchange

3 2

Change in coreboot[master]: mb/pcengines/apu2: Convert to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 12 Oct '20

12 Oct '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46213 ) Change subject: mb/pcengines/apu2: Convert to ASL 2.0 syntax ...................................................................... mb/pcengines/apu2: Convert to ASL 2.0 syntax Change-Id: Ie2b1b27c0715fc223e644c3df6c0e9cb876322c8 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/pcengines/apu2/acpi/sleep.asl 1 file changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/46213/1 diff --git a/src/mainboard/pcengines/apu2/acpi/sleep.asl b/src/mainboard/pcengines/apu2/acpi/sleep.asl index 39fe610..377f0de 100644 --- a/src/mainboard/pcengines/apu2/acpi/sleep.asl +++ b/src/mainboard/pcengines/apu2/acpi/sleep.asl @@ -30,9 +30,9 @@ /* DBGO("\n") */ /* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) - Store(7, UPWS) + WKST [0] = 0 + WKST [1] = 0 + UPWS = 7 \_SB.APTS(Arg0) } /* End Method(\_PTS) */ @@ -58,7 +58,7 @@ /* DBGO(" to S0\n") */ /* clear USB wake up signal */ - Store(1, USBS) + USBS = 1 \_SB.AWAK(Arg0) -- To view, visit https://review.coreboot.org/c/coreboot/+/46213 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie2b1b27c0715fc223e644c3df6c0e9cb876322c8 Gerrit-Change-Number: 46213 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-MessageType: newchange

4 3

Change in coreboot[master]: mb/pcengines/apu1: Convert to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 12 Oct '20

12 Oct '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46212 ) Change subject: mb/pcengines/apu1: Convert to ASL 2.0 syntax ...................................................................... mb/pcengines/apu1: Convert to ASL 2.0 syntax Change-Id: I15b332033f3d492f9e01bb5f1eb25892dee418de Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/pcengines/apu1/acpi/mainboard.asl M src/mainboard/pcengines/apu1/acpi/sata.asl M src/mainboard/pcengines/apu1/acpi/sleep.asl M src/mainboard/pcengines/apu1/acpi/usb_oc.asl 4 files changed, 75 insertions(+), 75 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/46212/1 diff --git a/src/mainboard/pcengines/apu1/acpi/mainboard.asl b/src/mainboard/pcengines/apu1/acpi/mainboard.asl index 9283191..5c0929a 100644 --- a/src/mainboard/pcengines/apu1/acpi/mainboard.asl +++ b/src/mainboard/pcengines/apu1/acpi/mainboard.asl @@ -18,20 +18,20 @@ Scope(\_SB) { Method(OSFL, 0){ - if(LNotEqual(OSVR, Ones)) {Return(OSVR)} /* OS version was already detected */ + if (OSVR != Ones) {Return (OSVR)} /* OS version was already detected */ if(CondRefOf(\_OSI)) { - Store(1, OSVR) /* Assume some form of XP */ + OSVR = 1 /* Assume some form of XP */ if (\_OSI("Windows 2006")) /* Vista */ { - Store(2, OSVR) + OSVR = 2 } } else { - If(WCMP(\_OS,"Linux")) { - Store(3, OSVR) /* Linux */ + If (WCMP(\_OS,"Linux")) { + OSVR = 3 /* Linux */ } Else { - Store(4, OSVR) /* Gotta be WinCE */ + OSVR = 4 /* Gotta be WinCE */ } } Return(OSVR) diff --git a/src/mainboard/pcengines/apu1/acpi/sata.asl b/src/mainboard/pcengines/apu1/acpi/sata.asl index 7f305fb..6d9ff03 100644 --- a/src/mainboard/pcengines/apu1/acpi/sata.asl +++ b/src/mainboard/pcengines/apu1/acpi/sata.asl @@ -35,7 +35,7 @@ Device(PMST) { Name(_ADR, 0) Method(_STA,0) { - if (LGreater(P0IS,0)) { + if (P0IS > 0) { return (0x0F) /* sata is visible */ } else { @@ -48,7 +48,7 @@ { Name(_ADR, 1) Method(_STA,0) { - if (LGreater(P1IS,0)) { + if (P1IS > 0) { return (0x0F) /* sata is visible */ } else { @@ -71,7 +71,7 @@ { Name(_ADR, 0) Method(_STA,0) { - if (LGreater(P2IS,0)) { + if (P2IS > 0) { return (0x0F) /* sata is visible */ } else { @@ -84,7 +84,7 @@ { Name(_ADR, 1) Method(_STA,0) { - if (LGreater(P3IS,0)) { + if (P3IS > 0) { return (0x0F) /* sata is visible */ } else { @@ -98,35 +98,35 @@ Scope(\_GPE) { Method(_L1F,0x0,NotSerialized) { if (\_SB.P0PR) { - if (LGreater(\_SB.P0IS,0)) { + if (\_SB.P0IS > 0) { sleep(32) } Notify(\_SB.PCI0.STCR.PMRY.PMST, 0x01) /* NOTIFY_DEVICE_CHECK */ - store(one, \_SB.P0PR) + \_SB.P0PR = 1 } if (\_SB.P1PR) { - if (LGreater(\_SB.P1IS,0)) { + if (\_SB.P1IS > 0) { sleep(32) } Notify(\_SB.PCI0.STCR.PMRY.PSLA, 0x01) /* NOTIFY_DEVICE_CHECK */ - store(one, \_SB.P1PR) + \_SB.P1PR = 1 } if (\_SB.P2PR) { - if (LGreater(\_SB.P2IS,0)) { + if (\_SB.P2IS > 0) { sleep(32) } Notify(\_SB.PCI0.STCR.SEDY.SMST, 0x01) /* NOTIFY_DEVICE_CHECK */ - store(one, \_SB.P2PR) + \_SB.P2PR = 1 } if (\_SB.P3PR) { - if (LGreater(\_SB.P3IS,0)) { + if (\_SB.P3IS > 0) { sleep(32) } Notify(\_SB.PCI0.STCR.SEDY.SSLA, 0x01) /* NOTIFY_DEVICE_CHECK */ - store(one, \_SB.P3PR) + \_SB.P3PR = 1 } } } diff --git a/src/mainboard/pcengines/apu1/acpi/sleep.asl b/src/mainboard/pcengines/apu1/acpi/sleep.asl index 76b5f9e..3b6fd02 100644 --- a/src/mainboard/pcengines/apu1/acpi/sleep.asl +++ b/src/mainboard/pcengines/apu1/acpi/sleep.asl @@ -26,23 +26,23 @@ /* DBGO("\n") */ /* Don't allow PCIRST# to reset USB */ - if (LEqual(Arg0,3)){ - Store(0,URRE) + if (Arg0 == 3){ + URRE = 0 } /* Clear sleep SMI status flag and enable sleep SMI trap. */ - /*Store(One, CSSM) - Store(One, SSEN)*/ + /*CSSM = 1 + SSEN = 1*/ /* On older chips, clear PciExpWakeDisEn */ - /*if (LLessEqual(\_SB.SBRI, 0x13)) { - * Store(0,\_SB.PWDE) + /*if (\_SB.SBRI <= 0x13) { + * \_SB.PWDE = 0 *} */ /* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) + WKST [0] = 0 + WKST [1] = 0 } /* End Method(\_PTS) */ /* @@ -67,21 +67,21 @@ /* DBGO(" to S0\n") */ /* Re-enable HPET */ - Store(1,HPDE) + HPDE = 1 /* Restore PCIRST# so it resets USB */ - if (LEqual(Arg0,3)){ - Store(1,URRE) + if (Arg0 == 3){ + URRE = 1 } /* Arbitrarily clear PciExpWakeStatus */ - Store(PWST, Local1) - Store(Local1, PWST) + Local1 = PWST + PWST = Local1 - /* if (DeRefOf(Index(WKST,0))) { - * Store(0, Index(WKST,1)) + /* if (DeRefOf(WKST [0])) { + * WKST [1] = 0 * } else { - * Store(Arg0, Index(WKST,1)) + * WKST [1] = Arg0 * } */ Return(WKST) diff --git a/src/mainboard/pcengines/apu1/acpi/usb_oc.asl b/src/mainboard/pcengines/apu1/acpi/usb_oc.asl index 4ecc52a..e4ed275 100644 --- a/src/mainboard/pcengines/apu1/acpi/usb_oc.asl +++ b/src/mainboard/pcengines/apu1/acpi/usb_oc.asl @@ -14,134 +14,134 @@ Method(UCOC, 0) { Sleep(20) - Store(0x13,CMTI) - Store(0,GPSL) + CMTI = 0x13 + GPSL = 0 } /* USB Port 0 overcurrent uses Gpm 0 */ -If(LLessEqual(UOM0,9)) { +If (UOM0 <= 9) { Scope (\_GPE) { Method (_L13) { UCOC() - if(LEqual(GPB0,PLC0)) { - Not(PLC0,PLC0) - Store(PLC0, \_SB.PT0D) + if (GPB0 == PLC0) { + PLC0 = ~PLC0 + \_SB.PT0D = PLC0 } } } } /* USB Port 1 overcurrent uses Gpm 1 */ -If (LLessEqual(UOM1,9)) { +If (UOM1 <= 9) { Scope (\_GPE) { Method (_L14) { UCOC() - if (LEqual(GPB1,PLC1)) { - Not(PLC1,PLC1) - Store(PLC1, \_SB.PT1D) + if (GPB1 == PLC1) { + PLC1 = ~PLC1 + \_SB.PT1D = PLC1 } } } } /* USB Port 2 overcurrent uses Gpm 2 */ -If (LLessEqual(UOM2,9)) { +If (UOM2 <= 9) { Scope (\_GPE) { Method (_L15) { UCOC() - if (LEqual(GPB2,PLC2)) { - Not(PLC2,PLC2) - Store(PLC2, \_SB.PT2D) + if (GPB2 == PLC2) { + PLC2 = ~PLC2 + \_SB.PT2D = PLC2 } } } } /* USB Port 3 overcurrent uses Gpm 3 */ -If (LLessEqual(UOM3,9)) { +If (UOM3 <= 9) { Scope (\_GPE) { Method (_L16) { UCOC() - if (LEqual(GPB3,PLC3)) { - Not(PLC3,PLC3) - Store(PLC3, \_SB.PT3D) + if (GPB3 == PLC3) { + PLC3 = ~PLC3 + \_SB.PT3D = PLC3 } } } } /* USB Port 4 overcurrent uses Gpm 4 */ -If (LLessEqual(UOM4,9)) { +If (UOM4 <= 9) { Scope (\_GPE) { Method (_L19) { UCOC() - if (LEqual(GPB4,PLC4)) { - Not(PLC4,PLC4) - Store(PLC4, \_SB.PT4D) + if (GPB4 == PLC4) { + PLC4 = ~PLC4 + \_SB.PT4D = PLC4 } } } } /* USB Port 5 overcurrent uses Gpm 5 */ -If (LLessEqual(UOM5,9)) { +If (UOM5 <= 9) { Scope (\_GPE) { Method (_L1A) { UCOC() - if (LEqual(GPB5,PLC5)) { - Not(PLC5,PLC5) - Store(PLC5, \_SB.PT5D) + if (GPB5 == PLC5) { + PLC5 = ~PLC5 + \_SB.PT5D = PLC5 } } } } /* USB Port 6 overcurrent uses Gpm 6 */ -If (LLessEqual(UOM6,9)) { +If (UOM6 <= 9) { Scope (\_GPE) { /* Method (_L1C) { */ Method (_L06) { UCOC() - if (LEqual(GPB6,PLC6)) { - Not(PLC6,PLC6) - Store(PLC6, \_SB.PT6D) + if (GPB6 == PLC6) { + PLC6 = ~PLC6 + \_SB.PT6D = PLC6 } } } } /* USB Port 7 overcurrent uses Gpm 7 */ -If (LLessEqual(UOM7,9)) { +If (UOM7 <= 9) { Scope (\_GPE) { /* Method (_L1D) { */ Method (_L07) { UCOC() - if (LEqual(GPB7,PLC7)) { - Not(PLC7,PLC7) - Store(PLC7, \_SB.PT7D) + if (GPB7 == PLC7) { + PLC7 = ~PLC7 + \_SB.PT7D = PLC7 } } } } /* USB Port 8 overcurrent uses Gpm 8 */ -If (LLessEqual(UOM8,9)) { +If (UOM8 <= 9) { Scope (\_GPE) { Method (_L17) { - if (LEqual(G8IS,PLC8)) { - Not(PLC8,PLC8) - Store(PLC8, \_SB.PT8D) + if (G8IS == PLC8) { + PLC8 = ~PLC8 + \_SB.PT8D = PLC8 } } } } /* USB Port 9 overcurrent uses Gpm 9 */ -If (LLessEqual(UOM9,9)) { +If (UOM9 <= 9) { Scope (\_GPE) { Method (_L0E) { - if (LEqual(G9IS,0)) { - Store(1,\_SB.PT9D) + if (G9IS == 0) { + \_SB.PT9D = 1 } } } -- To view, visit https://review.coreboot.org/c/coreboot/+/46212 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I15b332033f3d492f9e01bb5f1eb25892dee418de Gerrit-Change-Number: 46212 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

3 3

Change in coreboot[master]: soc/intel/jasperlake: Add the GpioOverride configuration
by Angel Pons (Code Review) 12 Oct '20

12 Oct '20

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45901 ) Change subject: soc/intel/jasperlake: Add the GpioOverride configuration ...................................................................... Patch Set 5: (1 comment) https://review.coreboot.org/c/coreboot/+/45901/5/src/soc/intel/jasperlake/r… File src/soc/intel/jasperlake/romstage/fsp_params.c: https://review.coreboot.org/c/coreboot/+/45901/5/src/soc/intel/jasperlake/r… PS5, Line 121: m_cfg->GpioOverride = config->GpioOverride; Please drop the devicetree setting. This option should always be enabled for coreboot. -- To view, visit https://review.coreboot.org/c/coreboot/+/45901 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia4036cf0be3a6036d70920743958dc327a652077 Gerrit-Change-Number: 45901 Gerrit-PatchSet: 5 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 12 Oct 2020 14:27:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: vendorcode/intel/fsp: Add Jasper Lake FSP headers for FSP v2376
by Angel Pons (Code Review) 12 Oct '20

12 Oct '20

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45899 ) Change subject: vendorcode/intel/fsp: Add Jasper Lake FSP headers for FSP v2376 ...................................................................... Patch Set 5: Code-Review+1 (1 comment) https://review.coreboot.org/c/coreboot/+/45899/5/src/vendorcode/intel/fsp/f… File src/vendorcode/intel/fsp/fsp2_0/jasperlake/FspmUpd.h: https://review.coreboot.org/c/coreboot/+/45899/5/src/vendorcode/intel/fsp/f… PS5, Line 2715: Level 1 Are there more levels? -- To view, visit https://review.coreboot.org/c/coreboot/+/45899 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I65c03d8eda11664541479983c7be11854410e1c6 Gerrit-Change-Number: 45899 Gerrit-PatchSet: 5 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 12 Oct 2020 14:24:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/skylake: Rename PcieRpAspm devicetree config
by Frans Hendriks (Code Review) 12 Oct '20

12 Oct '20

Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45001 ) Change subject: soc/intel/skylake: Rename PcieRpAspm devicetree config ...................................................................... Patch Set 3: Would suggest to keep naming consistant, use PcieRp_Aspm. -- To view, visit https://review.coreboot.org/c/coreboot/+/45001 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id74f043ecd549bde4501320bff1dc080bde64057 Gerrit-Change-Number: 45001 Gerrit-PatchSet: 3 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 12 Oct 2020 12:20:45 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit October 2020