coreboot-gerrit October 2020

coreboot-gerrit@coreboot.org

1 participants
3474 discussions

Change in coreboot[master]: drivers/wifi/generic: Drop the dependency on HAVE_ACPI_TABLES
by Furquan Shaikh (Code Review) 13 Oct '20

13 Oct '20

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46037 ) Change subject: drivers/wifi/generic: Drop the dependency on HAVE_ACPI_TABLES ...................................................................... drivers/wifi/generic: Drop the dependency on HAVE_ACPI_TABLES This change drops the dependency of DRIVERS_WIFI_GENERIC on HAVE_ACPI_TABLES as the driver provides operations other than the ACPI support for WiFi devices. Since the dependency is now dropped, ACPI operations in generic.c are guarded by CONFIG(HAVE_ACPI_TABLES). BUG=b:169802515 BRANCH=zork Change-Id: I16444a9d842a6742e3c97ef04c4f18e93e6cdaa9 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- M src/drivers/wifi/generic/Kconfig M src/drivers/wifi/generic/generic.c 2 files changed, 4 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/46037/1 diff --git a/src/drivers/wifi/generic/Kconfig b/src/drivers/wifi/generic/Kconfig index 049a952..ddd2be9 100644 --- a/src/drivers/wifi/generic/Kconfig +++ b/src/drivers/wifi/generic/Kconfig @@ -1,7 +1,6 @@ config DRIVERS_WIFI_GENERIC bool default n - depends on HAVE_ACPI_TABLES help When enabled, add identifiers in ACPI tables that are common to WiFi chipsets from multiple vendors. diff --git a/src/drivers/wifi/generic/generic.c b/src/drivers/wifi/generic/generic.c index b515f3c..97f5bda 100644 --- a/src/drivers/wifi/generic/generic.c +++ b/src/drivers/wifi/generic/generic.c @@ -37,6 +37,7 @@ */ #define WIFI_ACPI_NAME_MAX_LEN 5 +#if CONFIG(HAVE_ACPI_TABLES) __weak int get_wifi_sar_limits(struct wifi_sar_limits *sar_limits) { @@ -239,6 +240,7 @@ { wifi_generic_fill_ssdt(dev, dev->chip_info); } +#endif static void wifi_pci_dev_init(struct device *dev) { @@ -287,8 +289,10 @@ .enable_resources = pci_dev_enable_resources, .init = wifi_pci_dev_init, .ops_pci = &pci_dev_ops_pci, +#if CONFIG(HAVE_ACPI_TABLES) .acpi_name = wifi_generic_acpi_name, .acpi_fill_ssdt = wifi_generic_fill_ssdt_generator, +#endif #if CONFIG(GENERATE_SMBIOS_TABLES) .get_smbios_data = smbios_write_wifi, #endif -- To view, visit https://review.coreboot.org/c/coreboot/+/46037 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I16444a9d842a6742e3c97ef04c4f18e93e6cdaa9 Gerrit-Change-Number: 46037 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: newchange

5 12

Change in coreboot[master]: mb: Switch to using drivers/wifi/generic for Intel WiFi devices
by Furquan Shaikh (Code Review) 13 Oct '20

13 Oct '20

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46035 ) Change subject: mb: Switch to using drivers/wifi/generic for Intel WiFi devices ...................................................................... mb: Switch to using drivers/wifi/generic for Intel WiFi devices This change switches all mainboard devices to use drivers/wifi/generic instead of drivers/intel/wifi chip driver for Intel WiFi devices. There is no need for two separate chip drivers in coreboot to handle Intel and non-Intel WiFi devices since the differences can be handled at runtime using the PCI vendor ID. This also allows mainboard to easily multi-source WiFi chips and still use the same firmware image without having to distinguish between the chip drivers. BUG=b:169802515 BRANCH=zork Change-Id: Ieac603a970cb2c9bf835021d1fb0fd07fd535280 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- M src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb M src/mainboard/google/dedede/variants/baseboard/devicetree.cb M src/mainboard/google/dedede/variants/waddledoo/overridetree.cb M src/mainboard/google/deltaur/variants/baseboard/devicetree.cb M src/mainboard/google/drallion/variants/drallion/devicetree.cb M src/mainboard/google/eve/devicetree.cb M src/mainboard/google/fizz/variants/baseboard/devicetree.cb M src/mainboard/google/glados/devicetree.cb M src/mainboard/google/hatch/variants/baseboard/devicetree.cb M src/mainboard/google/octopus/variants/baseboard/devicetree.cb M src/mainboard/google/poppy/variants/atlas/devicetree.cb M src/mainboard/google/poppy/variants/baseboard/devicetree.cb M src/mainboard/google/poppy/variants/nami/devicetree.cb M src/mainboard/google/poppy/variants/nautilus/devicetree.cb M src/mainboard/google/poppy/variants/nocturne/devicetree.cb M src/mainboard/google/poppy/variants/rammus/devicetree.cb M src/mainboard/google/poppy/variants/soraka/devicetree.cb M src/mainboard/google/reef/variants/baseboard/devicetree.cb M src/mainboard/google/reef/variants/coral/devicetree.cb M src/mainboard/google/reef/variants/pyro/devicetree.cb M src/mainboard/google/reef/variants/sand/devicetree.cb M src/mainboard/google/reef/variants/snappy/devicetree.cb M src/mainboard/google/sarien/variants/arcada/devicetree.cb M src/mainboard/google/sarien/variants/sarien/devicetree.cb M src/mainboard/google/volteer/variants/baseboard/devicetree.cb M src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb M src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb M src/mainboard/intel/coffeelake_rvp/variants/cfl_s/overridetree.cb M src/mainboard/intel/coffeelake_rvp/variants/cfl_u/overridetree.cb M src/mainboard/intel/coffeelake_rvp/variants/cml_u/overridetree.cb M src/mainboard/intel/coffeelake_rvp/variants/whl_u/overridetree.cb M src/mainboard/intel/icelake_rvp/variants/icl_u/devicetree.cb M src/mainboard/intel/icelake_rvp/variants/icl_y/devicetree.cb M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb M src/mainboard/intel/kunimitsu/devicetree.cb M src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb M src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb M src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb M src/mainboard/system76/lemp9/devicetree.cb 39 files changed, 45 insertions(+), 45 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/46035/1 diff --git a/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb b/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb index 3ee20e9..8f256ad 100644 --- a/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb +++ b/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb @@ -89,7 +89,7 @@ register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A port 3 end device pci 14.1 off end # USB xDCI (OTG) - chip drivers/intel/wifi # CNVi wifi + chip drivers/wifi/generic # CNVi wifi register "wake" = "GPE0_PME_B0" device pci 14.3 on end end @@ -141,7 +141,7 @@ end device pci 1c.6 off end # PCI Express Port 7 device pci 1c.7 on # PCI Express Port 8 - chip drivers/intel/wifi + chip drivers/wifi/generic device pci 00.0 on end # x1 M.2/E 2230 (J_WLAN1) end register "PcieRpEnable[7]" = "1" diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb index 1f72eb1..dda358f 100644 --- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb @@ -288,7 +288,7 @@ end # USB xHCI device pci 14.1 off end # USB xDCI (OTG) device pci 14.2 off end # PMC SRAM - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "GPE0_PME_B0" device pci 14.3 on end # CNVi wifi end diff --git a/src/mainboard/google/dedede/variants/waddledoo/overridetree.cb b/src/mainboard/google/dedede/variants/waddledoo/overridetree.cb index 969bebb..c306b52 100644 --- a/src/mainboard/google/dedede/variants/waddledoo/overridetree.cb +++ b/src/mainboard/google/dedede/variants/waddledoo/overridetree.cb @@ -247,7 +247,7 @@ end end device pci 1c.7 on - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "GPE0_DW2_03" device pci 00.0 on end end diff --git a/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb b/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb index 52e689c..775c548 100644 --- a/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb @@ -245,7 +245,7 @@ device pci 14.1 off end # USB 3.2 1x1 xDCI HC device pci 14.2 on end # Shared SRAM - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "GPE0_PME_B0" device pci 14.3 on end # CNVi WiFi end diff --git a/src/mainboard/google/drallion/variants/drallion/devicetree.cb b/src/mainboard/google/drallion/variants/drallion/devicetree.cb index ed7eb95..aa6af87 100644 --- a/src/mainboard/google/drallion/variants/drallion/devicetree.cb +++ b/src/mainboard/google/drallion/variants/drallion/devicetree.cb @@ -328,7 +328,7 @@ end end # USB xHCI device pci 14.1 off end # USB xDCI (OTG) - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "PME_B0_EN_BIT" device pci 14.3 on end # CNVi wifi end diff --git a/src/mainboard/google/eve/devicetree.cb b/src/mainboard/google/eve/devicetree.cb index d941521..a2550bb 100644 --- a/src/mainboard/google/eve/devicetree.cb +++ b/src/mainboard/google/eve/devicetree.cb @@ -380,7 +380,7 @@ end end # I2C #4 device pci 1c.0 on - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "GPE0_PCI_EXP" device pci 00.0 on end end diff --git a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb index bc29dc6..9c11e80 100644 --- a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb @@ -400,7 +400,7 @@ end end # PCI Express Port 3 device pci 1c.3 on - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "GPE0_PCI_EXP" device pci 00.0 on end end diff --git a/src/mainboard/google/glados/devicetree.cb b/src/mainboard/google/glados/devicetree.cb index 98b678a..12312e9 100644 --- a/src/mainboard/google/glados/devicetree.cb +++ b/src/mainboard/google/glados/devicetree.cb @@ -118,7 +118,7 @@ device pci 19.1 off end # I2C #5 device pci 19.2 on end # I2C #4 device pci 1c.0 on - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "GPE0_DW0_16" device pci 00.0 on end end diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb index a4e07e9..10ad029 100644 --- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb @@ -297,7 +297,7 @@ end end # USB xHCI device pci 14.1 off end # USB xDCI (OTG) - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "GPE0_PME_B0" device pci 14.3 on end # CNVi wifi end @@ -333,7 +333,7 @@ device pci 1d.3 off end # PCI Express Port 12 device pci 1d.4 off end # PCI Express port 13 device pci 1d.5 on - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "GPE0_DW1_01" device pci 00.0 on end end diff --git a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb index 3fef757..6d77116 100644 --- a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb @@ -114,7 +114,7 @@ device pci 00.2 off end # - NPK device pci 02.0 on end # - Gen device pci 03.0 on end # - Gaussian Mixture Model (GMM) - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "GPE0A_CNVI_PME_STS" device pci 0c.0 on end # - CNVi end @@ -136,7 +136,7 @@ device pci 11.0 off end # - ISH device pci 12.0 off end # - SATA device pci 13.0 on - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "GPE0_DW3_11" device pci 00.0 on end end diff --git a/src/mainboard/google/poppy/variants/atlas/devicetree.cb b/src/mainboard/google/poppy/variants/atlas/devicetree.cb index 4496dd9..9f9d951 100644 --- a/src/mainboard/google/poppy/variants/atlas/devicetree.cb +++ b/src/mainboard/google/poppy/variants/atlas/devicetree.cb @@ -344,7 +344,7 @@ end end # I2C #4 - Audio device pci 1c.0 on - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "GPE0_DW1_07" # GPP_B7 device pci 00.0 on end end diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb index 14b8b09..0dc9131 100644 --- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb @@ -359,7 +359,7 @@ end # I2C #5 device pci 19.2 on end # I2C #4 device pci 1c.0 on - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "GPE0_DW0_00" device pci 00.0 on end end diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb index 57444a9..167bd03 100644 --- a/src/mainboard/google/poppy/variants/nami/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb @@ -427,7 +427,7 @@ device pci 1c.1 off end # PCI Express Port 2 device pci 1c.2 off end # PCI Express Port 3 device pci 1c.3 on - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "GPE0_DW2_22" # Wake pin = GPP_E22 device pci 00.0 on end end diff --git a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb index 025b82b..ed21492 100644 --- a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb @@ -388,7 +388,7 @@ end end # I2C #4 device pci 1c.0 on - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "GPE0_DW0_00" device pci 00.0 on end end diff --git a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb index 21f0b80..0a29601 100644 --- a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb @@ -402,7 +402,7 @@ end end # I2C #4 - Audio device pci 1c.0 on - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "GPE0_DW2_01" device pci 00.0 on end end diff --git a/src/mainboard/google/poppy/variants/rammus/devicetree.cb b/src/mainboard/google/poppy/variants/rammus/devicetree.cb index 0d31bca..591e0fb 100644 --- a/src/mainboard/google/poppy/variants/rammus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/rammus/devicetree.cb @@ -354,7 +354,7 @@ end # I2C #5 device pci 19.2 off end # I2C #4 device pci 1c.0 on - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "GPE0_DW0_00" # GPP_B0 device pci 00.0 on end end diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb index 477166a..b3570d7 100644 --- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb +++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb @@ -333,7 +333,7 @@ end # I2C #5 device pci 19.2 on end # I2C #4 device pci 1c.0 on - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "GPE0_PCI_EXP" device pci 00.0 on end end diff --git a/src/mainboard/google/reef/variants/baseboard/devicetree.cb b/src/mainboard/google/reef/variants/baseboard/devicetree.cb index da80b8e..a1b7a4c 100644 --- a/src/mainboard/google/reef/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/reef/variants/baseboard/devicetree.cb @@ -147,7 +147,7 @@ device pci 13.2 off end # - Root Port 4 - PCIe-A 2 device pci 13.3 off end # - Root Port 5 - PCIe-A 3 device pci 14.0 on - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "GPE0_DW3_00" device pci 00.0 on end end diff --git a/src/mainboard/google/reef/variants/coral/devicetree.cb b/src/mainboard/google/reef/variants/coral/devicetree.cb index f2fc3a6..fd456eb 100644 --- a/src/mainboard/google/reef/variants/coral/devicetree.cb +++ b/src/mainboard/google/reef/variants/coral/devicetree.cb @@ -147,7 +147,7 @@ device pci 13.2 off end # - Root Port 4 - PCIe-A 2 device pci 13.3 off end # - Root Port 5 - PCIe-A 3 device pci 14.0 on - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "GPE0_DW3_00" device pci 00.0 on end end diff --git a/src/mainboard/google/reef/variants/pyro/devicetree.cb b/src/mainboard/google/reef/variants/pyro/devicetree.cb index 920431b..0dbaa29 100644 --- a/src/mainboard/google/reef/variants/pyro/devicetree.cb +++ b/src/mainboard/google/reef/variants/pyro/devicetree.cb @@ -156,7 +156,7 @@ device pci 13.2 off end # - Root Port 4 - PCIe-A 2 device pci 13.3 off end # - Root Port 5 - PCIe-A 3 device pci 14.0 on - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "GPE0_DW3_00" device pci 00.0 on end end diff --git a/src/mainboard/google/reef/variants/sand/devicetree.cb b/src/mainboard/google/reef/variants/sand/devicetree.cb index aba1227..ba19369 100644 --- a/src/mainboard/google/reef/variants/sand/devicetree.cb +++ b/src/mainboard/google/reef/variants/sand/devicetree.cb @@ -143,7 +143,7 @@ device pci 13.2 off end # - Root Port 4 - PCIe-A 2 device pci 13.3 off end # - Root Port 5 - PCIe-A 3 device pci 14.0 on - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "GPE0_DW3_00" device pci 00.0 on end end diff --git a/src/mainboard/google/reef/variants/snappy/devicetree.cb b/src/mainboard/google/reef/variants/snappy/devicetree.cb index ad8c808..1a007e6 100644 --- a/src/mainboard/google/reef/variants/snappy/devicetree.cb +++ b/src/mainboard/google/reef/variants/snappy/devicetree.cb @@ -152,7 +152,7 @@ device pci 13.2 off end # - Root Port 4 - PCIe-A 2 device pci 13.3 off end # - Root Port 5 - PCIe-A 3 device pci 14.0 on - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "GPE0_DW3_00" device pci 00.0 on end end diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb index 9a4c6dd..b1d9a36 100644 --- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb +++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb @@ -305,7 +305,7 @@ end end # USB xHCI device pci 14.1 off end # USB xDCI (OTG) - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "PME_B0_EN_BIT" device pci 14.3 on end # CNVi wifi end diff --git a/src/mainboard/google/sarien/variants/sarien/devicetree.cb b/src/mainboard/google/sarien/variants/sarien/devicetree.cb index a76e2ed..e1ee6c9 100644 --- a/src/mainboard/google/sarien/variants/sarien/devicetree.cb +++ b/src/mainboard/google/sarien/variants/sarien/devicetree.cb @@ -317,7 +317,7 @@ end end # USB xHCI device pci 14.1 off end # USB xDCI (OTG) - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "PME_B0_EN_BIT" device pci 14.3 on end # CNVi wifi end diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index 7790230..bb49198 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -454,7 +454,7 @@ device pci 14.0 on end # USB3.1 xHCI 0xA0ED device pci 14.1 off end # USB3.1 xDCI 0xA0EE device pci 14.2 on end # Shared RAM 0xA0EF - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "GPE0_PME_B0" device pci 14.3 on end # CNVi: WiFi 0xA0F0 - A0F3 end diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb index f24e191..e100598 100644 --- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb +++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb @@ -94,7 +94,7 @@ device pci 12.6 off end # GSPI #2 device pci 14.0 on end # USB xHCI device pci 14.1 off end # USB xDCI (OTG) - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "PME_B0_EN_BIT" device pci 14.3 on end # CNVi wifi end diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb index 1bd4bfe..bf7aa1e 100644 --- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb +++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb @@ -75,7 +75,7 @@ device pci 12.6 off end # GSPI #2 device pci 14.0 on end # USB xHCI device pci 14.1 off end # USB xDCI (OTG) - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "PME_B0_EN_BIT" device pci 14.3 on end # CNVi wifi end diff --git a/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/overridetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/overridetree.cb index 37b86c6..77e475a 100644 --- a/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/overridetree.cb +++ b/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/overridetree.cb @@ -92,7 +92,7 @@ register "PcieClkSrcClkReq[10]" = "10" device domain 0 on - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "PME_B0_EN_BIT" device pci 14.3 on end # CNVi wifi end diff --git a/src/mainboard/intel/coffeelake_rvp/variants/cfl_u/overridetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/cfl_u/overridetree.cb index f48c9b4..433a03a 100644 --- a/src/mainboard/intel/coffeelake_rvp/variants/cfl_u/overridetree.cb +++ b/src/mainboard/intel/coffeelake_rvp/variants/cfl_u/overridetree.cb @@ -61,7 +61,7 @@ }" device domain 0 on - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "PME_B0_EN_BIT" device pci 14.3 on end # CNVi wifi end diff --git a/src/mainboard/intel/coffeelake_rvp/variants/cml_u/overridetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/cml_u/overridetree.cb index 28b33cf..560a7c2 100644 --- a/src/mainboard/intel/coffeelake_rvp/variants/cml_u/overridetree.cb +++ b/src/mainboard/intel/coffeelake_rvp/variants/cml_u/overridetree.cb @@ -80,7 +80,7 @@ register "sdcard_cd_gpio" = "GPP_G5" device domain 0 on - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "PME_B0_EN_BIT" device pci 14.3 on end # CNVi wifi end diff --git a/src/mainboard/intel/coffeelake_rvp/variants/whl_u/overridetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/whl_u/overridetree.cb index 89d6036..9592e90 100644 --- a/src/mainboard/intel/coffeelake_rvp/variants/whl_u/overridetree.cb +++ b/src/mainboard/intel/coffeelake_rvp/variants/whl_u/overridetree.cb @@ -65,7 +65,7 @@ register "sdcard_cd_gpio" = "GPP_G5" device domain 0 on - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "PME_B0_EN_BIT" device pci 14.3 on end # CNVi wifi end diff --git a/src/mainboard/intel/icelake_rvp/variants/icl_u/devicetree.cb b/src/mainboard/intel/icelake_rvp/variants/icl_u/devicetree.cb index 40f17ce..49303da 100644 --- a/src/mainboard/intel/icelake_rvp/variants/icl_u/devicetree.cb +++ b/src/mainboard/intel/icelake_rvp/variants/icl_u/devicetree.cb @@ -280,7 +280,7 @@ end # USB xHCI device pci 14.1 off end # USB xDCI (OTG) device pci 14.2 off end # PMC SRAM - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "GPE0_PME_B0" device pci 14.3 on end # CNVi wifi end @@ -309,7 +309,7 @@ device pci 19.2 on end # UART #2 device pci 1a.0 on end # eMMC device pci 1c.0 on - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "GPE0_PCI_EXP" device pci 00.0 on end end diff --git a/src/mainboard/intel/icelake_rvp/variants/icl_y/devicetree.cb b/src/mainboard/intel/icelake_rvp/variants/icl_y/devicetree.cb index b12c0f7..a1c32c9 100644 --- a/src/mainboard/intel/icelake_rvp/variants/icl_y/devicetree.cb +++ b/src/mainboard/intel/icelake_rvp/variants/icl_y/devicetree.cb @@ -280,7 +280,7 @@ end # USB xHCI device pci 14.1 off end # USB xDCI (OTG) device pci 14.2 off end # PMC SRAM - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "GPE0_PME_B0" device pci 14.3 on end # CNVi wifi end @@ -309,7 +309,7 @@ device pci 19.2 on end # UART #2 device pci 1a.0 on end # eMMC device pci 1c.0 on - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "GPE0_PCI_EXP" device pci 00.0 on end end diff --git a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb index fc96719..b9aec37 100644 --- a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb +++ b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb @@ -299,7 +299,7 @@ end # USB xHCI device pci 14.1 off end # USB xDCI (OTG) device pci 14.2 off end # PMC SRAM - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "GPE0_PME_B0" device pci 14.3 on end # CNVi wifi end diff --git a/src/mainboard/intel/kunimitsu/devicetree.cb b/src/mainboard/intel/kunimitsu/devicetree.cb index 2b7a0e3..3afff45 100644 --- a/src/mainboard/intel/kunimitsu/devicetree.cb +++ b/src/mainboard/intel/kunimitsu/devicetree.cb @@ -243,7 +243,7 @@ end end # I2C #4 device pci 1c.0 on - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "GPE0_DW0_16" device pci 00.0 on end end diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb index ad7eabe..fef0e90 100644 --- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb +++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb @@ -226,7 +226,7 @@ device pci 14.0 on end # USB3.1 xHCI 0xA0ED device pci 14.1 on end # USB3.1 xDCI 0xA0EE device pci 14.2 on end # Shared RAM 0xA0EF - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "GPE0_PME_B0" device pci 14.3 on end # CNVi: WiFi 0xA0F0 - A0F3 end diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb index 842ae68..a37daab 100644 --- a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb +++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb @@ -230,7 +230,7 @@ device pci 14.0 on end # USB3.1 xHCI 0xA0ED device pci 14.1 on end # USB3.1 xDCI 0xA0EE device pci 14.2 on end # Shared RAM 0xA0EF - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "GPE0_PME_B0" device pci 14.3 on end # CNVi: WiFi 0xA0F0 - A0F3 end diff --git a/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb b/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb index 01b9537..071fc5f 100644 --- a/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb +++ b/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb @@ -166,7 +166,7 @@ device pci 02.0 on # Integrated Graphics Device register "InternalGfx" = "1" end - chip drivers/intel/wifi + chip drivers/wifi/generic register "wake" = "PME_B0_EN_BIT" device pci 14.3 on end # CNVi wifi end diff --git a/src/mainboard/system76/lemp9/devicetree.cb b/src/mainboard/system76/lemp9/devicetree.cb index b189941..277570e 100644 --- a/src/mainboard/system76/lemp9/devicetree.cb +++ b/src/mainboard/system76/lemp9/devicetree.cb @@ -89,7 +89,7 @@ register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A port 3 end device pci 14.1 off end # USB xDCI (OTG) - chip drivers/intel/wifi # CNVi wifi + chip drivers/wifi/generic # CNVi wifi register "wake" = "GPE0_PME_B0" device pci 14.3 on end end @@ -148,7 +148,7 @@ register "PcieClkSrcUsage[2]" = "7" register "PcieClkSrcClkReq[2]" = "2" register "PcieRpSlotImplemented[7]" = "1" - chip drivers/intel/wifi + chip drivers/wifi/generic device pci 00.0 on end end smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230 (J_WLAN1)" "SlotDataBusWidth1X" -- To view, visit https://review.coreboot.org/c/coreboot/+/46035 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ieac603a970cb2c9bf835021d1fb0fd07fd535280 Gerrit-Change-Number: 46035 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-MessageType: newchange

5 9

Change in coreboot[master]: drivers/wifi/generic: Add support for generating SMBIOS data
by Furquan Shaikh (Code Review) 13 Oct '20

13 Oct '20

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46034 ) Change subject: drivers/wifi/generic: Add support for generating SMBIOS data ...................................................................... drivers/wifi/generic: Add support for generating SMBIOS data This change adds support in generic WiFi driver in coreboot to generate SMBIOS data for the WiFi device. Currently, this is used only for Intel WiFi devices and the function is copied over from Intel WiFi driver in coreboot. This change is done in preparation for getting rid of the separate chip driver for Intel WiFi in coreboot. BUG=b:169802515 BRANCH=zork Change-Id: If3c056718bdc57f6976ce8e3f8acc7665ec3ccd7 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- M src/drivers/wifi/generic/generic.c 1 file changed, 40 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/46034/1 diff --git a/src/drivers/wifi/generic/generic.c b/src/drivers/wifi/generic/generic.c index 903afdc..0fb4dc5 100644 --- a/src/drivers/wifi/generic/generic.c +++ b/src/drivers/wifi/generic/generic.c @@ -8,6 +8,7 @@ #include <device/pci_def.h> #include <elog.h> #include <sar.h> +#include <smbios.h> #include <string.h> #include <wrdd.h> #include "chip.h" @@ -243,6 +244,42 @@ pci_dev_log_wake(dev, ELOG_WAKE_SOURCE_PME_WIFI, 0); } +#if CONFIG(GENERATE_SMBIOS_TABLES) +static int smbios_write_intel_wifi(struct device *dev, int *handle, unsigned long *current) +{ + struct smbios_type_intel_wifi { + u8 type; + u8 length; + u16 handle; + u8 str; + u8 eos[2]; + } __packed; + + struct smbios_type_intel_wifi *t = (struct smbios_type_intel_wifi *)*current; + int len = sizeof(struct smbios_type_intel_wifi); + + memset(t, 0, sizeof(struct smbios_type_intel_wifi)); + t->type = 0x85; + t->length = len - 2; + t->handle = *handle; + /* Intel wifi driver expects this string to be in the table 0x85. */ + t->str = smbios_add_string(t->eos, "KHOIHGIUCCHHII"); + + len = t->length + smbios_string_table_len(t->eos); + *current += len; + *handle += 1; + return len; +} + +static int smbios_write_wifi(struct device *dev, int *handle, unsigned long *current) +{ + if (dev->vendor == PCI_VENDOR_ID_INTEL) + return smbios_write_intel_wifi(dev, handle, current); + + return 0; +} +#endif + struct device_operations wifi_generic_ops = { .read_resources = pci_dev_read_resources, .set_resources = pci_dev_set_resources, @@ -251,6 +288,9 @@ .ops_pci = &pci_dev_ops_pci, .acpi_name = wifi_generic_acpi_name, .acpi_fill_ssdt = wifi_generic_fill_ssdt_generator, +#if CONFIG(GENERATE_SMBIOS_TABLES) + .get_smbios_data = smbios_write_wifi, +#endif }; static void wifi_generic_enable(struct device *dev) -- To view, visit https://review.coreboot.org/c/coreboot/+/46034 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If3c056718bdc57f6976ce8e3f8acc7665ec3ccd7 Gerrit-Change-Number: 46034 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: newchange

5 19

Change in coreboot[master]: include/acpi/acpi.h: Add LEGACY_DSDT_REV macro
by HAOUAS Elyes (Code Review) 13 Oct '20

13 Oct '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45786 ) Change subject: include/acpi/acpi.h: Add LEGACY_DSDT_REV macro ...................................................................... include/acpi/acpi.h: Add LEGACY_DSDT_REV macro Change-Id: Ie044f786e5deae3a1317091de67dc03c74531bfb Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/include/acpi/acpi.h M src/mainboard/emulation/qemu-i440fx/dsdt.asl M src/mainboard/emulation/qemu-q35/dsdt.asl 3 files changed, 3 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/45786/1 diff --git a/src/include/acpi/acpi.h b/src/include/acpi/acpi.h index d190344..50d8d70 100644 --- a/src/include/acpi/acpi.h +++ b/src/include/acpi/acpi.h @@ -42,6 +42,7 @@ #define ACPI_TABLE_CREATOR "COREBOOT" /* Must be exactly 8 bytes long! */ #define OEM_ID "COREv4" /* Must be exactly 6 bytes long! */ #define CURRENT_DSDT_REV 0x02 /* DSDT revision: ACPI v2.0 and greater */ +#define LEGACY_DSDT_REV 0x01 /* DSDT revision: ACPI v1 */ #if !defined(__ASSEMBLER__) && !defined(__ACPI__) #include <commonlib/helpers.h> diff --git a/src/mainboard/emulation/qemu-i440fx/dsdt.asl b/src/mainboard/emulation/qemu-i440fx/dsdt.asl index 5a341b4..4bc3df2 100644 --- a/src/mainboard/emulation/qemu-i440fx/dsdt.asl +++ b/src/mainboard/emulation/qemu-i440fx/dsdt.asl @@ -5,7 +5,7 @@ DefinitionBlock ( "dsdt.aml", // Output Filename "DSDT", // Signature - 0x01, // DSDT Compliance Revision + LEGACY_DSDT_REV, OEM_ID, ACPI_TABLE_CREATOR, 0x1 // OEM Revision diff --git a/src/mainboard/emulation/qemu-q35/dsdt.asl b/src/mainboard/emulation/qemu-q35/dsdt.asl index a9c96be..d69384c 100644 --- a/src/mainboard/emulation/qemu-q35/dsdt.asl +++ b/src/mainboard/emulation/qemu-q35/dsdt.asl @@ -9,7 +9,7 @@ DefinitionBlock ( "dsdt.aml", // Output Filename "DSDT", // Signature - 0x01, // DSDT Compliance Revision + LEGACY_DSDT_REV, OEM_ID, ACPI_TABLE_CREATOR, 0x2 // OEM Revision -- To view, visit https://review.coreboot.org/c/coreboot/+/45786 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie044f786e5deae3a1317091de67dc03c74531bfb Gerrit-Change-Number: 45786 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

4 11

Change in coreboot[master]: soc/intel/skylake: Rename PcieRpAspm devicetree config
by Angel Pons (Code Review) 13 Oct '20

13 Oct '20

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45001 ) Change subject: soc/intel/skylake: Rename PcieRpAspm devicetree config ...................................................................... Patch Set 3: Code-Review+1 (1 comment) https://review.coreboot.org/c/coreboot/+/45001/3/src/soc/intel/skylake/chip… File src/soc/intel/skylake/chip.h: https://review.coreboot.org/c/coreboot/+/45001/3/src/soc/intel/skylake/chip… PS3, Line 265: } pcierp_aspm[CONFIG_MAX_ROOT_PORTS]; > The idea is to differ so it doesn't look like the plain UPD. Also, CamelCase […] This should be named `pcie_rp_aspm` -- To view, visit https://review.coreboot.org/c/coreboot/+/45001 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id74f043ecd549bde4501320bff1dc080bde64057 Gerrit-Change-Number: 45001 Gerrit-PatchSet: 3 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 13 Oct 2020 17:31:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/skylake: Rename PcieRpAspm devicetree config
by Nico Huber (Code Review) 13 Oct '20

13 Oct '20

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45001 ) Change subject: soc/intel/skylake: Rename PcieRpAspm devicetree config ...................................................................... Patch Set 3: (1 comment) Btw. there is some work going on to have a "chipset devicetree" that can declare devices and provide defaults. In theory, we could then have non-zero defaults and wouldn't need these off- by-one tricks anymore. https://review.coreboot.org/c/coreboot/+/45001/3/src/soc/intel/skylake/chip… File src/soc/intel/skylake/chip.h: https://review.coreboot.org/c/coreboot/+/45001/3/src/soc/intel/skylake/chip… PS3, Line 265: } pcierp_aspm[CONFIG_MAX_ROOT_PORTS]; > Would PcieRp_Aspem better match other element names? The idea is to differ so it doesn't look like the plain UPD. Also, CamelCase is usually not considered an option in coreboot. -- To view, visit https://review.coreboot.org/c/coreboot/+/45001 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id74f043ecd549bde4501320bff1dc080bde64057 Gerrit-Change-Number: 45001 Gerrit-PatchSet: 3 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 13 Oct 2020 17:25:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: superio/nuvoton/common: Collapse two if statements
by Paul Menzel (Code Review) 13 Oct '20

13 Oct '20

Paul Menzel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45970 ) Change subject: superio/nuvoton/common: Collapse two if statements ...................................................................... superio/nuvoton/common: Collapse two if statements There are more devices requiring this code, so avoid duplicating the if block over and over. Change-Id: Ib4f787e3c883b1fec941de77bc8e19ccf0d5224c Signed-off-by: Paul Menzel <pmenzel(a)molgen.mpg.de> --- M src/superio/nuvoton/common/early_serial.c 1 file changed, 2 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/45970/1 diff --git a/src/superio/nuvoton/common/early_serial.c b/src/superio/nuvoton/common/early_serial.c index 22d882e..cc21f40 100644 --- a/src/superio/nuvoton/common/early_serial.c +++ b/src/superio/nuvoton/common/early_serial.c @@ -52,11 +52,8 @@ nuvoton_pnp_enter_conf_state(dev); - if (CONFIG(SUPERIO_NUVOTON_NCT5539D_COM_A)) - /* Route COM A to GPIO8 pin group */ - pnp_write_config(dev, 0x2a, 0x40); - - if (CONFIG(SUPERIO_NUVOTON_NCT6776_COM_A)) + if (CONFIG(SUPERIO_NUVOTON_NCT5539D_COM_A) || + CONFIG(SUPERIO_NUVOTON_NCT6776_COM_A)) /* Route COM A to GPIO8 pin group */ pnp_write_config(dev, 0x2a, 0x40); -- To view, visit https://review.coreboot.org/c/coreboot/+/45970 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib4f787e3c883b1fec941de77bc8e19ccf0d5224c Gerrit-Change-Number: 45970 Gerrit-PatchSet: 1 Gerrit-Owner: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newchange

4 5

Change in coreboot[master]: libpayload/libpci: Add parent pointer to pci_dev
by Felix Singer (Code Review) 13 Oct '20

13 Oct '20

Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46346 ) Change subject: libpayload/libpci: Add parent pointer to pci_dev ...................................................................... libpayload/libpci: Add parent pointer to pci_dev Change-Id: I4c0aa4f23d4173c09cfc343f657be9eefc8038d1 Signed-off-by: Felix Singer <felix.singer(a)secunet.com> --- M payloads/libpayload/include/pci/pci.h M payloads/libpayload/libpci/libpci.c 2 files changed, 5 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/46346/1 diff --git a/payloads/libpayload/include/pci/pci.h b/payloads/libpayload/include/pci/pci.h index 8c11d6b..37aeafa 100644 --- a/payloads/libpayload/include/pci/pci.h +++ b/payloads/libpayload/include/pci/pci.h @@ -74,6 +74,7 @@ u16 domain; u8 bus, dev, func; u16 vendor_id, device_id; + struct pci_dev *parent; struct pci_dev *next; }; diff --git a/payloads/libpayload/libpci/libpci.c b/payloads/libpayload/libpci/libpci.c index 3e3513c..50cd228 100644 --- a/payloads/libpayload/libpci/libpci.c +++ b/payloads/libpayload/libpci/libpci.c @@ -170,7 +170,11 @@ val == 0x0000ffff || val == 0xffff0000) continue; + /* Create new child device */ dev->next = malloc(sizeof(struct pci_dev)); + dev->next->parent = dev; + + /* Configure new child device */ dev = dev->next; dev->domain = 0; dev->bus = bus; -- To view, visit https://review.coreboot.org/c/coreboot/+/46346 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4c0aa4f23d4173c09cfc343f657be9eefc8038d1 Gerrit-Change-Number: 46346 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: newchange

2 1

Change in coreboot[master]: libpayload/libpci: Return allocated memory directly
by Angel Pons (Code Review) 13 Oct '20

13 Oct '20

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46345 ) Change subject: libpayload/libpci: Return allocated memory directly ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/46345 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib2ee8dbfaabbf7a824b4fd75ad7c779393af2900 Gerrit-Change-Number: 46345 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 13 Oct 2020 17:12:02 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: superio/nuvoton: Add back Nuvoton NCT6776 support
by Angel Pons (Code Review) 13 Oct '20

13 Oct '20

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/16519 ) Change subject: superio/nuvoton: Add back Nuvoton NCT6776 support ...................................................................... Patch Set 9: (1 comment) https://review.coreboot.org/c/coreboot/+/16519/9/src/superio/nuvoton/nct677… File src/superio/nuvoton/nct6776/Kconfig: https://review.coreboot.org/c/coreboot/+/16519/9/src/superio/nuvoton/nct677… PS9, Line 23: default n > It looks like this wasn’t just a revert after all. […] Commit message says `with minor adaptations` -- To view, visit https://review.coreboot.org/c/coreboot/+/16519 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I546879285ad8336e81798d0fbdf94f72e1fa61a2 Gerrit-Change-Number: 16519 Gerrit-PatchSet: 9 Gerrit-Owner: Teo Boon Tiong <boon.tiong.teo(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Teo Boon Tiong <boon.tiong.teo(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Tue, 13 Oct 2020 17:01:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit October 2020