Hello Felix Singer, build bot (Jenkins), Nico Huber, Furquan Shaikh, Tim Wawrzynczak, Paul Menzel, Subrata Banik, Aamir Bohra, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#11).
Change subject: soc/intel/cnl: lock AES-NI feature if selected
......................................................................
soc/intel/cnl: lock AES-NI feature if selected
Lock AES-NI (MSR_FEATURE_CONFIG) to prevent unintended changes of
AES-NI enablement as precaution, as suggested in Intel document
325384-070US.
Locking is enabled by default (as already done in SKL and Arrandale) and
may be disabled by the newly introduced Kconfig in the parent change.
Tested by checking the MSR.
Change-Id: I79495bfbd3ebf3b712ce9ecf2040cecfd954178d
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
---
M src/soc/intel/cannonlake/cpu.c
1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/46273/11
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Hello Felix Singer, build bot (Jenkins), Nico Huber, Furquan Shaikh, Tim Wawrzynczak, Paul Menzel, Subrata Banik, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46277
to look at the new patch set (#8).
Change subject: cpu/intel/common: add a Kconfig to control AES-NI locking
......................................................................
cpu/intel/common: add a Kconfig to control AES-NI locking
Add a Kconfig to be able to disable locking of AES-NI for e.g debugging,
testing, ...
Change-Id: I4eaf8d7d187188ee6e78741b1ceb837c40c2c402
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
---
M src/cpu/intel/common/Kconfig
M src/cpu/intel/common/common_init.c
2 files changed, 11 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/46277/8
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Hello Felix Singer, build bot (Jenkins), Nico Huber, Furquan Shaikh, Tim Wawrzynczak, Subrata Banik, Aamir Bohra, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46276
to look at the new patch set (#8).
Change subject: cpu/intel/common: only lock AES-NI when supported
......................................................................
cpu/intel/common: only lock AES-NI when supported
Add a check to only lock AES-NI when AES is supported.
Change-Id: Ia7ffd5393a3e972f461ff7991b9c5bd363712361
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
---
M src/cpu/intel/common/common_init.c
1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/46276/8
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Gerrit-MessageType: newpatchset
Hello Felix Singer, build bot (Jenkins), Nico Huber, Furquan Shaikh, Tim Wawrzynczak, Subrata Banik, Aamir Bohra, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46275
to look at the new patch set (#8).
Change subject: cpu/intel/common: rework AES-NI locking
......................................................................
cpu/intel/common: rework AES-NI locking
Simplify the AES-NI code by using msr_set and correct the comment.
Change-Id: Ib2cda433bbec0192277839c02a1862b8f41340cb
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
---
M src/cpu/intel/common/common.h
M src/cpu/intel/common/common_init.c
M src/include/cpu/intel/msr.h
3 files changed, 7 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/46275/8
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Gerrit-MessageType: newpatchset
Hello Felix Singer, build bot (Jenkins), Nico Huber, Furquan Shaikh, Tim Wawrzynczak, Paul Menzel, Subrata Banik, Aamir Bohra, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46272
to look at the new patch set (#10).
Change subject: soc/intel/skl,cpu/intel: copy AES-NI locking to common cpu code
......................................................................
soc/intel/skl,cpu/intel: copy AES-NI locking to common cpu code
Copy the AES-NI locking function to common cpu code to be able to reuse
it.
This change only copies the code and adds the MSR header file. Any
further rework and later deduplication on the platforms code is done in
the follow-up changes.
Change-Id: I81ad5c0d4797b139435c57d3af0a95db94a5c15e
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
---
M src/cpu/intel/common/common.h
M src/cpu/intel/common/common_init.c
A src/include/cpu/intel/msr.h
3 files changed, 37 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/46272/10
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46276 )
Change subject: cpu/intel/common: only lock AES-NI when supported
......................................................................
Patch Set 7:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46276/7/src/cpu/intel/common/commo…
File src/cpu/intel/common/common_init.c:
https://review.coreboot.org/c/coreboot/+/46276/7/src/cpu/intel/common/commo…
PS7, Line 277: /* Lock AES-NI only if supported */
> oh not really, will drop that one
Done
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46272 )
Change subject: soc/intel/skl,cpu/intel: copy AES-NI locking to common cpu code
......................................................................
Patch Set 9:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46272/9//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/46272/9//COMMIT_MSG@9
PS9, Line 9: Copy the AES-NI locking function to common cpu code to be able to reuse it.
:
: This change only copies the code and adds the MSR header file. Any further
> ack
Done
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45952 )
Change subject: soc/intel/common: add Kconfig to enable/disable the ACPI PM timer
......................................................................
Patch Set 20:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45952/17/src/soc/intel/common/bloc…
File src/soc/intel/common/block/pmc/Kconfig:
https://review.coreboot.org/c/coreboot/+/45952/17/src/soc/intel/common/bloc…
PS17, Line 45: TCO
> Sorry for overlooking this. […]
"This timer is required for ACPI and for total cost of ownership (TCO),
[...]". IMO, that would hurt, badly. Explaining why the TCO block is
named TCO is really out of scope, and without explanation it's more
than confusing.
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