coreboot-gerrit January 2020

coreboot-gerrit@coreboot.org

1 participants
1869 discussions

Change in coreboot[master]: drivers/i2c/i2cmux: Drop unused i2c multiplex
by Kyösti Mälkki (Code Review) 04 Jan '20

04 Jan '20

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38159 ) Change subject: drivers/i2c/i2cmux: Drop unused i2c multiplex ...................................................................... drivers/i2c/i2cmux: Drop unused i2c multiplex There is no documentation what hardware this was compatible with. Change-Id: Ie8832f1d7f4ca2bc8121f84b1ee564403cc69026 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- D src/drivers/i2c/i2cmux/Kconfig D src/drivers/i2c/i2cmux/Makefile.inc D src/drivers/i2c/i2cmux/i2cmux.c 3 files changed, 0 insertions(+), 48 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/38159/1 diff --git a/src/drivers/i2c/i2cmux/Kconfig b/src/drivers/i2c/i2cmux/Kconfig deleted file mode 100644 index 57bb278..0000000 --- a/src/drivers/i2c/i2cmux/Kconfig +++ /dev/null @@ -1,2 +0,0 @@ -config DRIVERS_I2C_I2CMUX - bool diff --git a/src/drivers/i2c/i2cmux/Makefile.inc b/src/drivers/i2c/i2cmux/Makefile.inc deleted file mode 100644 index 64bbdce..0000000 --- a/src/drivers/i2c/i2cmux/Makefile.inc +++ /dev/null @@ -1 +0,0 @@ -ramstage-$(CONFIG_DRIVERS_I2C_I2CMUX) += i2cmux.c diff --git a/src/drivers/i2c/i2cmux/i2cmux.c b/src/drivers/i2c/i2cmux/i2cmux.c deleted file mode 100644 index 42b9d31..0000000 --- a/src/drivers/i2c/i2cmux/i2cmux.c +++ /dev/null @@ -1,45 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <device/device.h> -#include <device/smbus.h> - -static void i2cmux_set_link(struct device *dev, unsigned int link) -{ - if (dev->enabled && dev->path.type == DEVICE_PATH_I2C) { - if (ops_smbus_bus(get_pbus_smbus(dev))) { - smbus_write_byte(dev, 0x01, 1 << link); // output value - smbus_write_byte(dev, 0x03, 0); // all output - } - } -} - -static struct device_operations i2cmux_operations = { - .read_resources = DEVICE_NOOP, - .set_resources = DEVICE_NOOP, - .enable_resources = DEVICE_NOOP, - .init = DEVICE_NOOP, - .scan_bus = scan_smbus, - .set_link = i2cmux_set_link, -}; - -static void enable_dev(struct device *dev) -{ - if (dev->link_list != NULL) - dev->ops = &i2cmux_operations; -} - -struct chip_operations drivers_i2c_i2cmux_ops = { - CHIP_NAME("i2cmux") - .enable_dev = enable_dev, -}; -- To view, visit https://review.coreboot.org/c/coreboot/+/38159 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie8832f1d7f4ca2bc8121f84b1ee564403cc69026 Gerrit-Change-Number: 38159 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: newchange

2 2

Change in coreboot[master]: drivers/i2c/lm63: Drop unused hardware monitor support
by Kyösti Mälkki (Code Review) 04 Jan '20

04 Jan '20

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38158 ) Change subject: drivers/i2c/lm63: Drop unused hardware monitor support ...................................................................... drivers/i2c/lm63: Drop unused hardware monitor support Change-Id: Ie72f66a8fc93e4994df5463b8ff19ba118c88389 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- D src/drivers/i2c/lm63/Kconfig D src/drivers/i2c/lm63/Makefile.inc D src/drivers/i2c/lm63/lm63.c 3 files changed, 0 insertions(+), 50 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/38158/1 diff --git a/src/drivers/i2c/lm63/Kconfig b/src/drivers/i2c/lm63/Kconfig deleted file mode 100644 index 120ee0d..0000000 --- a/src/drivers/i2c/lm63/Kconfig +++ /dev/null @@ -1,2 +0,0 @@ -config DRIVERS_I2C_LM63 - bool diff --git a/src/drivers/i2c/lm63/Makefile.inc b/src/drivers/i2c/lm63/Makefile.inc deleted file mode 100644 index bd1c7ef..0000000 --- a/src/drivers/i2c/lm63/Makefile.inc +++ /dev/null @@ -1 +0,0 @@ -ramstage-$(CONFIG_DRIVERS_I2C_LM63) += lm63.c diff --git a/src/drivers/i2c/lm63/lm63.c b/src/drivers/i2c/lm63/lm63.c deleted file mode 100644 index 3da38d8..0000000 --- a/src/drivers/i2c/lm63/lm63.c +++ /dev/null @@ -1,47 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <device/device.h> -#include <device/smbus.h> - -static void lm63_init(struct device *dev) -{ - int result; - if (dev->enabled && dev->path.type == DEVICE_PATH_I2C) { - if (ops_smbus_bus(get_pbus_smbus(dev))) { - if (dev->bus->dev->path.type == DEVICE_PATH_I2C) - smbus_set_link(dev); // it is under mux - result = smbus_read_byte(dev, 0x03); -// result &= ~0x04; - result |= 0x04; - smbus_write_byte(dev, 0x03, result & 0xff); // config lm63 - } - } -} - -static struct device_operations lm63_operations = { - .read_resources = DEVICE_NOOP, - .set_resources = DEVICE_NOOP, - .enable_resources = DEVICE_NOOP, - .init = lm63_init, -}; - -static void enable_dev(struct device *dev) -{ - dev->ops = &lm63_operations; -} - -struct chip_operations drivers_i2c_lm63_ops = { - CHIP_NAME("National Semiconductor LM63") - .enable_dev = enable_dev, -}; -- To view, visit https://review.coreboot.org/c/coreboot/+/38158 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie72f66a8fc93e4994df5463b8ff19ba118c88389 Gerrit-Change-Number: 38158 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: newchange

2 2

Change in coreboot[master]: drivers/i2c/adm1027: Drop unused hardware monitor support
by Kyösti Mälkki (Code Review) 04 Jan '20

04 Jan '20

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38157 ) Change subject: drivers/i2c/adm1027: Drop unused hardware monitor support ...................................................................... drivers/i2c/adm1027: Drop unused hardware monitor support Change-Id: I8e0dbff67709841c6ae3ec6f6130805ac935f2ee Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- D src/drivers/i2c/adm1027/Kconfig D src/drivers/i2c/adm1027/Makefile.inc D src/drivers/i2c/adm1027/adm1027.c 3 files changed, 0 insertions(+), 80 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/38157/1 diff --git a/src/drivers/i2c/adm1027/Kconfig b/src/drivers/i2c/adm1027/Kconfig deleted file mode 100644 index c135726..0000000 --- a/src/drivers/i2c/adm1027/Kconfig +++ /dev/null @@ -1,2 +0,0 @@ -config DRIVERS_I2C_ADM1027 - bool diff --git a/src/drivers/i2c/adm1027/Makefile.inc b/src/drivers/i2c/adm1027/Makefile.inc deleted file mode 100644 index 2eb1038..0000000 --- a/src/drivers/i2c/adm1027/Makefile.inc +++ /dev/null @@ -1 +0,0 @@ -ramstage-$(CONFIG_DRIVERS_I2C_ADM1027) += adm1027.c diff --git a/src/drivers/i2c/adm1027/adm1027.c b/src/drivers/i2c/adm1027/adm1027.c deleted file mode 100644 index 397dd77..0000000 --- a/src/drivers/i2c/adm1027/adm1027.c +++ /dev/null @@ -1,77 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <console/console.h> -#include <device/device.h> -#include <device/smbus.h> - -#define ADM1027_REG_CONFIG1 0x40 -#define CFG1_STRT 0x01 -#define CFG1_LOCK 0x02 -#define CFG1_RDY 0x04 -#define CFG1_FSPD 0x08 -#define CFG1_VXI 0x10 -#define CFT1_FSPDIS 0x20 -#define CFG1_TODIS 0x40 -#define CFG1_VCC 0x80 -#define ADM1027_REG_CONFIG2 0x73 -#define ADM1027_REG_CONFIG3 0x78 - -static void adm1027_enable_monitoring(struct device *dev) -{ - int result; - - result = smbus_read_byte(dev, ADM1027_REG_CONFIG1); - - if (!(result & CFG1_RDY)) { - printk(BIOS_DEBUG, "ADM1027: monitoring not ready\n"); - return; - } - result = (result | CFG1_STRT); - result = smbus_write_byte(dev, ADM1027_REG_CONFIG1, result); - - result = smbus_read_byte(dev, ADM1027_REG_CONFIG1); - if (!(result & CFG1_STRT)) { - printk(BIOS_DEBUG, "ADM1027: monitoring would not enable\n"); - return; - } - printk(BIOS_DEBUG, "ADM1027: monitoring enabled\n"); -} - -static void adm1027_init(struct device *dev) -{ - if (dev->enabled && dev->path.type == DEVICE_PATH_I2C) { - if (ops_smbus_bus(get_pbus_smbus(dev))) { - if (dev->bus->dev->path.type == DEVICE_PATH_I2C) - smbus_set_link(dev); // it is under mux - adm1027_enable_monitoring(dev); - } - } -} - -static struct device_operations adm1027_operations = { - .read_resources = DEVICE_NOOP, - .set_resources = DEVICE_NOOP, - .enable_resources = DEVICE_NOOP, - .init = adm1027_init, -}; - -static void enable_dev(struct device *dev) -{ - dev->ops = &adm1027_operations; -} - -struct chip_operations drivers_i2c_adm1027_ops = { - CHIP_NAME("adm1027") - .enable_dev = enable_dev, -}; -- To view, visit https://review.coreboot.org/c/coreboot/+/38157 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8e0dbff67709841c6ae3ec6f6130805ac935f2ee Gerrit-Change-Number: 38157 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

2 2

Change in coreboot[master]: drivers/i2c/adm1026: Drop unused hardware monitor support
by Kyösti Mälkki (Code Review) 04 Jan '20

04 Jan '20

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38156 ) Change subject: drivers/i2c/adm1026: Drop unused hardware monitor support ...................................................................... drivers/i2c/adm1026: Drop unused hardware monitor support Change-Id: I4e2ebe4f2a90cc27f9a4de907b873df44718234d Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- D src/drivers/i2c/adm1026/Kconfig D src/drivers/i2c/adm1026/Makefile.inc D src/drivers/i2c/adm1026/adm1026.c 3 files changed, 0 insertions(+), 74 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/38156/1 diff --git a/src/drivers/i2c/adm1026/Kconfig b/src/drivers/i2c/adm1026/Kconfig deleted file mode 100644 index 8168b29..0000000 --- a/src/drivers/i2c/adm1026/Kconfig +++ /dev/null @@ -1,2 +0,0 @@ -config DRIVERS_I2C_ADM1026 - bool diff --git a/src/drivers/i2c/adm1026/Makefile.inc b/src/drivers/i2c/adm1026/Makefile.inc deleted file mode 100644 index 7652a75..0000000 --- a/src/drivers/i2c/adm1026/Makefile.inc +++ /dev/null @@ -1 +0,0 @@ -ramstage-$(CONFIG_DRIVERS_I2C_ADM1026) += adm1026.c diff --git a/src/drivers/i2c/adm1026/adm1026.c b/src/drivers/i2c/adm1026/adm1026.c deleted file mode 100644 index c1bd905..0000000 --- a/src/drivers/i2c/adm1026/adm1026.c +++ /dev/null @@ -1,71 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <console/console.h> -#include <device/device.h> -#include <device/smbus.h> - -#define ADM1026_DEVICE 0x2d /* Either 0x2c or 0x2d or 0x2e */ -#define ADM1026_REG_CONFIG1 0x00 -#define CFG1_MONITOR 0x01 -#define CFG1_INT_ENABLE 0x02 -#define CFG1_INT_CLEAR 0x04 -#define CFG1_AIN8_9 0x08 -#define CFG1_THERM_HOT 0x10 -#define CFT1_DAC_AFC 0x20 -#define CFG1_PWM_AFC 0x40 -#define CFG1_RESET 0x80 -#define ADM1026_REG_CONFIG2 0x01 -#define ADM1026_REG_CONFIG3 0x07 - -static void adm1026_enable_monitoring(struct device *dev) -{ - int result; - result = smbus_read_byte(dev, ADM1026_REG_CONFIG1); - - result = (result | CFG1_MONITOR) & ~(CFG1_INT_CLEAR | CFG1_RESET); - result = smbus_write_byte(dev, ADM1026_REG_CONFIG1, result); - - result = smbus_read_byte(dev, ADM1026_REG_CONFIG1); - if (!(result & CFG1_MONITOR)) { - printk(BIOS_DEBUG, "ADM1026: monitoring would not enable"); - } -} - -static void adm1026_init(struct device *dev) -{ - if (dev->enabled && dev->path.type == DEVICE_PATH_I2C) { - if (ops_smbus_bus(get_pbus_smbus(dev))) { - if (dev->bus->dev->path.type == DEVICE_PATH_I2C) - smbus_set_link(dev); // it is under mux - adm1026_enable_monitoring(dev); - } - } -} - -static struct device_operations adm1026_operations = { - .read_resources = DEVICE_NOOP, - .set_resources = DEVICE_NOOP, - .enable_resources = DEVICE_NOOP, - .init = adm1026_init, -}; - -static void enable_dev(struct device *dev) -{ - dev->ops = &adm1026_operations; -} - -struct chip_operations drivers_i2c_adm1026_ops = { - CHIP_NAME("adm1026") - .enable_dev = enable_dev, -}; -- To view, visit https://review.coreboot.org/c/coreboot/+/38156 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4e2ebe4f2a90cc27f9a4de907b873df44718234d Gerrit-Change-Number: 38156 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

2 2

Change in coreboot[master]: device/smbus: Drop SMBUS_HAS_AUX_CHANNELS
by Kyösti Mälkki (Code Review) 04 Jan '20

04 Jan '20

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38153 ) Change subject: device/smbus: Drop SMBUS_HAS_AUX_CHANNELS ...................................................................... device/smbus: Drop SMBUS_HAS_AUX_CHANNELS The guarded prototypes are no longer implemented in the tree. Change-Id: I5bfedde2aaf691826e7537eceb8578a855800ea2 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/device/Kconfig M src/include/device/smbus.h 2 files changed, 0 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/38153/1 diff --git a/src/device/Kconfig b/src/device/Kconfig index 9ae3bbd..f694c14 100644 --- a/src/device/Kconfig +++ b/src/device/Kconfig @@ -477,10 +477,6 @@ endmenu # "Display" -config SMBUS_HAS_AUX_CHANNELS - bool - default n - config PCI bool default n diff --git a/src/include/device/smbus.h b/src/include/device/smbus.h index 863bc80..094ad42 100644 --- a/src/include/device/smbus.h +++ b/src/include/device/smbus.h @@ -53,9 +53,4 @@ int smbus_block_read(struct device *dev, u8 cmd, u8 bytes, u8 *buffer); int smbus_block_write(struct device *dev, u8 cmd, u8 bytes, const u8 *buffer); -#if CONFIG(SMBUS_HAS_AUX_CHANNELS) -void smbus_switch_to_channel(uint8_t channel_number); -uint8_t smbus_get_current_channel(void); -#endif - #endif /* DEVICE_SMBUS_H */ -- To view, visit https://review.coreboot.org/c/coreboot/+/38153 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5bfedde2aaf691826e7537eceb8578a855800ea2 Gerrit-Change-Number: 38153 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

4 4

Change in coreboot[master]: drivers/i2c/w83795: Drop unused hardware monitor support
by Kyösti Mälkki (Code Review) 04 Jan '20

04 Jan '20

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38152 ) Change subject: drivers/i2c/w83795: Drop unused hardware monitor support ...................................................................... drivers/i2c/w83795: Drop unused hardware monitor support Change-Id: I254f62c9a94838f70d624dadf32cb42c2370123d Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- D src/drivers/i2c/w83795/Kconfig D src/drivers/i2c/w83795/Makefile.inc D src/drivers/i2c/w83795/chip.h D src/drivers/i2c/w83795/w83795.c D src/drivers/i2c/w83795/w83795.h 5 files changed, 0 insertions(+), 622 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/38152/1 diff --git a/src/drivers/i2c/w83795/Kconfig b/src/drivers/i2c/w83795/Kconfig deleted file mode 100644 index 80856e2..0000000 --- a/src/drivers/i2c/w83795/Kconfig +++ /dev/null @@ -1,2 +0,0 @@ -config DRIVERS_I2C_W83795 - bool diff --git a/src/drivers/i2c/w83795/Makefile.inc b/src/drivers/i2c/w83795/Makefile.inc deleted file mode 100644 index 330f6a7..0000000 --- a/src/drivers/i2c/w83795/Makefile.inc +++ /dev/null @@ -1 +0,0 @@ -ramstage-$(CONFIG_DRIVERS_I2C_W83795) += w83795.c diff --git a/src/drivers/i2c/w83795/chip.h b/src/drivers/i2c/w83795/chip.h deleted file mode 100644 index ff1de81..0000000 --- a/src/drivers/i2c/w83795/chip.h +++ /dev/null @@ -1,145 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <stdint.h> - -struct drivers_i2c_w83795_config { - uint8_t fanin_ctl1; - uint8_t fanin_ctl2; - - uint8_t temp_ctl1; - uint8_t temp_ctl2; - uint8_t temp_dtse; - - uint8_t volt_ctl1; - uint8_t volt_ctl2; - - uint8_t temp1_fan_select; - uint8_t temp2_fan_select; - uint8_t temp3_fan_select; - uint8_t temp4_fan_select; - uint8_t temp5_fan_select; - uint8_t temp6_fan_select; - - uint8_t temp1_source_select; - uint8_t temp2_source_select; - uint8_t temp3_source_select; - uint8_t temp4_source_select; - uint8_t temp5_source_select; - uint8_t temp6_source_select; - - uint32_t vcore1_high_limit_mv; /* mV */ - uint32_t vcore1_low_limit_mv; /* mV */ - uint32_t vcore2_high_limit_mv; /* mV */ - uint32_t vcore2_low_limit_mv; /* mV */ - uint32_t vtt_high_limit_mv; /* mV */ - uint32_t vtt_low_limit_mv; /* mV */ - uint32_t vsen3_high_limit_mv; /* mV */ - uint32_t vsen3_low_limit_mv; /* mV */ - uint32_t vsen4_high_limit_mv; /* mV */ - uint32_t vsen4_low_limit_mv; /* mV */ - uint32_t vsen5_high_limit_mv; /* mV */ - uint32_t vsen5_low_limit_mv; /* mV */ - uint32_t vsen6_high_limit_mv; /* mV */ - uint32_t vsen6_low_limit_mv; /* mV */ - uint32_t vsen7_high_limit_mv; /* mV */ - uint32_t vsen7_low_limit_mv; /* mV */ - uint32_t vsen8_high_limit_mv; /* mV */ - uint32_t vsen8_low_limit_mv; /* mV */ - uint32_t vsen9_high_limit_mv; /* mV */ - uint32_t vsen9_low_limit_mv; /* mV */ - uint32_t vsen10_high_limit_mv; /* mV */ - uint32_t vsen10_low_limit_mv; /* mV */ - uint32_t vsen11_high_limit_mv; /* mV */ - uint32_t vsen11_low_limit_mv; /* mV */ - uint32_t vsen12_high_limit_mv; /* mV */ - uint32_t vsen12_low_limit_mv; /* mV */ - uint32_t vsen13_high_limit_mv; /* mV */ - uint32_t vsen13_low_limit_mv; /* mV */ - uint32_t vdd_high_limit_mv; /* mV */ - uint32_t vdd_low_limit_mv; /* mV */ - uint32_t vsb_high_limit_mv; /* mV */ - uint32_t vsb_low_limit_mv; /* mV */ - uint32_t vbat_high_limit_mv; /* mV */ - uint32_t vbat_low_limit_mv; /* mV */ - - int8_t tr1_critical_temperature; /* °C */ - int8_t tr1_critical_hysteresis; /* °C */ - int8_t tr1_warning_temperature; /* °C */ - int8_t tr1_warning_hysteresis; /* °C */ - int8_t tr2_critical_temperature; /* °C */ - int8_t tr2_critical_hysteresis; /* °C */ - int8_t tr2_warning_temperature; /* °C */ - int8_t tr2_warning_hysteresis; /* °C */ - int8_t tr3_critical_temperature; /* °C */ - int8_t tr3_critical_hysteresis; /* °C */ - int8_t tr3_warning_temperature; /* °C */ - int8_t tr3_warning_hysteresis; /* °C */ - int8_t tr4_critical_temperature; /* °C */ - int8_t tr4_critical_hysteresis; /* °C */ - int8_t tr4_warning_temperature; /* °C */ - int8_t tr4_warning_hysteresis; /* °C */ - int8_t tr5_critical_temperature; /* °C */ - int8_t tr5_critical_hysteresis; /* °C */ - int8_t tr5_warning_temperature; /* °C */ - int8_t tr5_warning_hysteresis; /* °C */ - int8_t tr6_critical_temperature; /* °C */ - int8_t tr6_critical_hysteresis; /* °C */ - int8_t tr6_warning_temperature; /* °C */ - int8_t tr6_warning_hysteresis; /* °C */ - int8_t dts_critical_temperature; /* °C */ - int8_t dts_critical_hysteresis; /* °C */ - int8_t dts_warning_temperature; /* °C */ - int8_t dts_warning_hysteresis; /* °C */ - - int8_t temp1_critical_temperature; /* °C */ - int8_t temp2_critical_temperature; /* °C */ - int8_t temp3_critical_temperature; /* °C */ - int8_t temp4_critical_temperature; /* °C */ - int8_t temp5_critical_temperature; /* °C */ - int8_t temp6_critical_temperature; /* °C */ - - int8_t temp1_target_temperature; /* °C */ - int8_t temp2_target_temperature; /* °C */ - int8_t temp3_target_temperature; /* °C */ - int8_t temp4_target_temperature; /* °C */ - int8_t temp5_target_temperature; /* °C */ - int8_t temp6_target_temperature; /* °C */ - - uint8_t fan1_nonstop; /* % of full speed (0-100) */ - uint8_t fan2_nonstop; /* % of full speed (0-100) */ - uint8_t fan3_nonstop; /* % of full speed (0-100) */ - uint8_t fan4_nonstop; /* % of full speed (0-100) */ - uint8_t fan5_nonstop; /* % of full speed (0-100) */ - uint8_t fan6_nonstop; /* % of full speed (0-100) */ - uint8_t fan7_nonstop; /* % of full speed (0-100) */ - uint8_t fan8_nonstop; /* % of full speed (0-100) */ - - uint8_t default_speed; /* % of full speed (0-100) */ - - uint8_t fan1_duty; /* % of full speed (0-100) */ - uint8_t fan2_duty; /* % of full speed (0-100) */ - uint8_t fan3_duty; /* % of full speed (0-100) */ - uint8_t fan4_duty; /* % of full speed (0-100) */ - uint8_t fan5_duty; /* % of full speed (0-100) */ - uint8_t fan6_duty; /* % of full speed (0-100) */ - uint8_t fan7_duty; /* % of full speed (0-100) */ - uint8_t fan8_duty; /* % of full speed (0-100) */ - - uint8_t smbus_aux; /* 0 == device located on primary SMBUS, - * 1 == device located on first auxiliary - * SMBUS channel, - * <n> == device located on <n> auxiliary - * SMBUS channel - */ -}; diff --git a/src/drivers/i2c/w83795/w83795.c b/src/drivers/i2c/w83795/w83795.c deleted file mode 100644 index 16cd813..0000000 --- a/src/drivers/i2c/w83795/w83795.c +++ /dev/null @@ -1,386 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <stdint.h> -#include <arch/cpu.h> -#include <console/console.h> -#include <device/device.h> -#include "w83795.h" -#include <device/smbus.h> -#include "chip.h" - -static int w83795_set_bank(struct device *dev, uint8_t bank) -{ - return smbus_write_byte(dev, W83795_REG_BANKSEL, bank); -} - -static uint8_t w83795_read(struct device *dev, uint16_t reg) -{ - int ret; - - ret = w83795_set_bank(dev, reg >> 8); - if (ret < 0) { - printk(BIOS_DEBUG, "read failed to set bank %x\n", reg >> 8); - return -1; - } - - ret = smbus_read_byte(dev, reg & 0xff); - return ret; -} - -static uint8_t w83795_write(struct device *dev, uint16_t reg, uint8_t value) -{ - int err; - - err = w83795_set_bank(dev, reg >> 8); - if (err < 0) { - printk(BIOS_DEBUG, "write failed to set bank %x\n", reg >> 8); - return -1; - } - - err = smbus_write_byte(dev, reg & 0xff, value); - return err; -} - -/* - * Configure Digital Temperature Sensor - */ -static void w83795_dts_configure(struct device *dev, uint8_t dts_src) -{ - u8 val; - - /* DIS */ - val = w83795_read(dev, W83795_REG_DTSC) & ~0x1; - val |= dts_src & 0x1; - w83795_write(dev, W83795_REG_DTSC, val); - - /* TODO - * Determine if DTS interface needs to be reset - * (W83795_REG_DTSC bit 7) before operation. - */ -} - -static u32 w83795_set_fan_mode(struct device *dev, w83795_fan_mode_t mode) -{ - if (mode == SPEED_CRUISE_MODE) { - w83795_write(dev, W83795_REG_FCMS1, 0xFF); - printk(BIOS_INFO, "W83795G/ADG work in Speed Cruise Mode\n"); - } else { - w83795_write(dev, W83795_REG_FCMS1, 0x00); - if (mode == THERMAL_CRUISE_MODE) { - w83795_write(dev, W83795_REG_FCMS2, 0x00); - printk(BIOS_INFO, "W83795G/ADG work in Thermal Cruise Mode\n"); - } else if (mode == SMART_FAN_MODE) { - w83795_write(dev, W83795_REG_FCMS2, 0x3F); - printk(BIOS_INFO, "W83795G/ADG work in Smart Fan Mode\n"); - } else { - printk(BIOS_INFO, "W83795G/ADG work in Manual Mode\n"); - return -1; - } - } - - return 0; -} - -static void w83795_set_fan(struct device *dev, w83795_fan_mode_t mode) -{ - /* set fan output controlled mode (FCMS)*/ - w83795_set_fan_mode(dev, mode); - - if (mode == SMART_FAN_MODE) { - /* Set the Relative Register-at SMART FAN IV Control Mode Table */ - //SFIV TODO - } - - /* Set Hysteresis of Temperature (HT) */ - //TODO -} - -static uint8_t fan_pct_to_cfg_val(uint8_t percent) -{ - uint16_t cfg = (((unsigned int)percent * 10000) / 3922); - if (cfg > 0xff) - cfg = 0xff; - return cfg; -} - -static uint8_t millivolts_to_limit_value_type1(int millivolts) -{ - /* Datasheet v1.41 pages 44 and 70 (VSEN1 - VSEN11, VTT) */ - return ((millivolts / 2) >> 2); -} - -static uint8_t millivolts_to_limit_value_type2(int millivolts) -{ - /* Datasheet v1.41 page pages 44 and 70 (3VSB, 3VDD, VBAT) */ - return ((millivolts / 6) >> 2); -} - -static uint16_t millivolts_to_limit_value_type3(int millivolts) -{ - /* Datasheet v1.41 page 45 (VSEN12, VSEN13, VDSEN14 - VDSEN17) */ - return (millivolts / 2); -} - -static void w83795_init(struct device *dev, w83795_fan_mode_t mode, u8 dts_src) -{ - struct drivers_i2c_w83795_config *config = dev->chip_info; - uint8_t i; - uint8_t val; - uint16_t limit_value; - -#if CONFIG(SMBUS_HAS_AUX_CHANNELS) - uint8_t smbus_aux_channel_prev = smbus_get_current_channel(); - smbus_switch_to_channel(config->smbus_aux); - printk(BIOS_DEBUG, "Set SMBUS controller to channel %d\n", config->smbus_aux); -#endif - - if (smbus_read_byte(dev, 0x00) < 0) { -#if CONFIG(SMBUS_HAS_AUX_CHANNELS) - /* Restore SMBUS channel setting */ - smbus_switch_to_channel(smbus_aux_channel_prev); - printk(BIOS_DEBUG, "Set SMBUS controller to channel %d\n", smbus_aux_channel_prev); -#endif - printk(BIOS_ERR, "W83795G/ADG Nuvoton H/W Monitor not found\n"); - return; - } - val = w83795_read(dev, W83795_REG_CONFIG); - if ((val & W83795_REG_CONFIG_CONFIG48) == 0) - printk(BIOS_INFO, "Found 64 pin W83795G Nuvoton H/W Monitor\n"); - else - printk(BIOS_INFO, "Found 48 pin W83795ADG Nuvoton H/W Monitor\n"); - - /* Reset */ - val |= W83795_REG_CONFIG_INIT; - w83795_write(dev, W83795_REG_CONFIG, val); - - /* Fan monitor settings */ - w83795_write(dev, W83795_REG_FANIN_CTRL1, config->fanin_ctl1); - w83795_write(dev, W83795_REG_FANIN_CTRL2, config->fanin_ctl2); - - /* Temperature thresholds */ - w83795_write(dev, W83795_REG_TEMP_CRIT(0), config->tr1_critical_temperature); - w83795_write(dev, W83795_REG_TEMP_CRIT_HYSTER(0), config->tr1_critical_hysteresis); - w83795_write(dev, W83795_REG_TEMP_WARN(0), config->tr1_warning_temperature); - w83795_write(dev, W83795_REG_TEMP_WARN_HYSTER(0), config->tr1_warning_hysteresis); - w83795_write(dev, W83795_REG_TEMP_CRIT(1), config->tr2_critical_temperature); - w83795_write(dev, W83795_REG_TEMP_CRIT_HYSTER(1), config->tr2_critical_hysteresis); - w83795_write(dev, W83795_REG_TEMP_WARN(1), config->tr2_warning_temperature); - w83795_write(dev, W83795_REG_TEMP_WARN_HYSTER(1), config->tr2_warning_hysteresis); - w83795_write(dev, W83795_REG_TEMP_CRIT(2), config->tr3_critical_temperature); - w83795_write(dev, W83795_REG_TEMP_CRIT_HYSTER(2), config->tr3_critical_hysteresis); - w83795_write(dev, W83795_REG_TEMP_WARN(2), config->tr3_warning_temperature); - w83795_write(dev, W83795_REG_TEMP_WARN_HYSTER(2), config->tr3_warning_hysteresis); - w83795_write(dev, W83795_REG_TEMP_CRIT(3), config->tr4_critical_temperature); - w83795_write(dev, W83795_REG_TEMP_CRIT_HYSTER(3), config->tr4_critical_hysteresis); - w83795_write(dev, W83795_REG_TEMP_WARN(3), config->tr4_warning_temperature); - w83795_write(dev, W83795_REG_TEMP_WARN_HYSTER(3), config->tr4_warning_hysteresis); - w83795_write(dev, W83795_REG_TEMP_CRIT(4), config->tr5_critical_temperature); - w83795_write(dev, W83795_REG_TEMP_CRIT_HYSTER(4), config->tr5_critical_hysteresis); - w83795_write(dev, W83795_REG_TEMP_WARN(4), config->tr5_warning_temperature); - w83795_write(dev, W83795_REG_TEMP_WARN_HYSTER(4), config->tr5_warning_hysteresis); - w83795_write(dev, W83795_REG_TEMP_CRIT(5), config->tr6_critical_temperature); - w83795_write(dev, W83795_REG_TEMP_CRIT_HYSTER(5), config->tr6_critical_hysteresis); - w83795_write(dev, W83795_REG_TEMP_WARN(5), config->tr6_warning_temperature); - w83795_write(dev, W83795_REG_TEMP_WARN_HYSTER(5), config->tr6_warning_hysteresis); - - /* DTS temperature thresholds */ - w83795_write(dev, W83795_REG_DTS_CRIT, config->dts_critical_temperature); - w83795_write(dev, W83795_REG_DTS_CRIT_HYSTER, config->dts_critical_hysteresis); - w83795_write(dev, W83795_REG_DTS_WARN, config->dts_warning_temperature); - w83795_write(dev, W83795_REG_DTS_WARN_HYSTER, config->dts_warning_hysteresis); - - /* Configure DTS registers in bank3 before enabling DTS */ - w83795_dts_configure(dev, dts_src); - - /* DTS enable */ - w83795_write(dev, W83795_REG_DTSE, config->temp_dtse); - - /* Temperature monitor settings */ - w83795_write(dev, W83795_REG_TEMP_CTRL1, config->temp_ctl1); - w83795_write(dev, W83795_REG_TEMP_CTRL2, config->temp_ctl2); - - /* Temperature to fan mappings */ - w83795_write(dev, W83795_REG_TFMR(0), config->temp1_fan_select); - w83795_write(dev, W83795_REG_TFMR(1), config->temp2_fan_select); - w83795_write(dev, W83795_REG_TFMR(2), config->temp3_fan_select); - w83795_write(dev, W83795_REG_TFMR(3), config->temp4_fan_select); - w83795_write(dev, W83795_REG_TFMR(4), config->temp5_fan_select); - w83795_write(dev, W83795_REG_TFMR(5), config->temp6_fan_select); - - /* Temperature data source to temperature mappings */ - w83795_write(dev, W83795_REG_T12TSS, ((config->temp2_source_select & 0x0f) << 4) | (config->temp1_source_select & 0x0f)); - w83795_write(dev, W83795_REG_T34TSS, ((config->temp4_source_select & 0x0f) << 4) | (config->temp3_source_select & 0x0f)); - w83795_write(dev, W83795_REG_T56TSS, ((config->temp6_source_select & 0x0f) << 4) | (config->temp5_source_select & 0x0f)); - - /* Set critical temperatures - * If any sensor exceeds the associated critical temperature, - * all fans will be forced to full speed. - */ - w83795_write(dev, W83795_REG_CTFS(0), config->temp1_critical_temperature); - w83795_write(dev, W83795_REG_CTFS(1), config->temp2_critical_temperature); - w83795_write(dev, W83795_REG_CTFS(2), config->temp3_critical_temperature); - w83795_write(dev, W83795_REG_CTFS(3), config->temp4_critical_temperature); - w83795_write(dev, W83795_REG_CTFS(4), config->temp5_critical_temperature); - w83795_write(dev, W83795_REG_CTFS(5), config->temp6_critical_temperature); - - /* Set fan control target temperatures */ - w83795_write(dev, W83795_REG_TTTI(0), config->temp1_target_temperature); - w83795_write(dev, W83795_REG_TTTI(1), config->temp2_target_temperature); - w83795_write(dev, W83795_REG_TTTI(2), config->temp3_target_temperature); - w83795_write(dev, W83795_REG_TTTI(3), config->temp4_target_temperature); - w83795_write(dev, W83795_REG_TTTI(4), config->temp5_target_temperature); - w83795_write(dev, W83795_REG_TTTI(5), config->temp6_target_temperature); - - /* Set fan stall prevention parameters */ - w83795_write(dev, W83795_REG_FAN_NONSTOP(0), config->fan1_nonstop); - w83795_write(dev, W83795_REG_FAN_NONSTOP(1), config->fan2_nonstop); - w83795_write(dev, W83795_REG_FAN_NONSTOP(2), config->fan3_nonstop); - w83795_write(dev, W83795_REG_FAN_NONSTOP(3), config->fan4_nonstop); - w83795_write(dev, W83795_REG_FAN_NONSTOP(4), config->fan5_nonstop); - w83795_write(dev, W83795_REG_FAN_NONSTOP(5), config->fan6_nonstop); - w83795_write(dev, W83795_REG_FAN_NONSTOP(6), config->fan7_nonstop); - w83795_write(dev, W83795_REG_FAN_NONSTOP(7), config->fan8_nonstop); - - /* Set fan default speed */ - w83795_write(dev, W83795_REG_DFSP, fan_pct_to_cfg_val(config->default_speed)); - - /* Set initial fan speeds */ - w83795_write(dev, W83795_REG_FAN_MANUAL_SPEED(0), fan_pct_to_cfg_val(config->fan1_duty)); - w83795_write(dev, W83795_REG_FAN_MANUAL_SPEED(1), fan_pct_to_cfg_val(config->fan2_duty)); - w83795_write(dev, W83795_REG_FAN_MANUAL_SPEED(2), fan_pct_to_cfg_val(config->fan3_duty)); - w83795_write(dev, W83795_REG_FAN_MANUAL_SPEED(3), fan_pct_to_cfg_val(config->fan4_duty)); - w83795_write(dev, W83795_REG_FAN_MANUAL_SPEED(4), fan_pct_to_cfg_val(config->fan5_duty)); - w83795_write(dev, W83795_REG_FAN_MANUAL_SPEED(5), fan_pct_to_cfg_val(config->fan6_duty)); - w83795_write(dev, W83795_REG_FAN_MANUAL_SPEED(6), fan_pct_to_cfg_val(config->fan7_duty)); - w83795_write(dev, W83795_REG_FAN_MANUAL_SPEED(7), fan_pct_to_cfg_val(config->fan8_duty)); - - /* Voltage monitor settings */ - w83795_write(dev, W83795_REG_VOLT_CTRL1, config->volt_ctl1); - w83795_write(dev, W83795_REG_VOLT_CTRL2, config->volt_ctl2); - - /* Voltage high/low limits */ - w83795_write(dev, W83795_REG_VOLT_LIM_HIGH(0), millivolts_to_limit_value_type1(config->vcore1_high_limit_mv)); - w83795_write(dev, W83795_REG_VOLT_LIM_LOW(0), millivolts_to_limit_value_type1(config->vcore1_low_limit_mv)); - w83795_write(dev, W83795_REG_VOLT_LIM_HIGH(1), millivolts_to_limit_value_type1(config->vcore2_high_limit_mv)); - w83795_write(dev, W83795_REG_VOLT_LIM_LOW(1), millivolts_to_limit_value_type1(config->vcore2_low_limit_mv)); - w83795_write(dev, W83795_REG_VOLT_LIM_HIGH(2), millivolts_to_limit_value_type1(config->vsen3_high_limit_mv)); - w83795_write(dev, W83795_REG_VOLT_LIM_LOW(2), millivolts_to_limit_value_type1(config->vsen3_low_limit_mv)); - w83795_write(dev, W83795_REG_VOLT_LIM_HIGH(3), millivolts_to_limit_value_type1(config->vsen4_high_limit_mv)); - w83795_write(dev, W83795_REG_VOLT_LIM_LOW(3), millivolts_to_limit_value_type1(config->vsen4_low_limit_mv)); - w83795_write(dev, W83795_REG_VOLT_LIM_HIGH(4), millivolts_to_limit_value_type1(config->vsen5_high_limit_mv)); - w83795_write(dev, W83795_REG_VOLT_LIM_LOW(4), millivolts_to_limit_value_type1(config->vsen5_low_limit_mv)); - w83795_write(dev, W83795_REG_VOLT_LIM_HIGH(5), millivolts_to_limit_value_type1(config->vsen6_high_limit_mv)); - w83795_write(dev, W83795_REG_VOLT_LIM_LOW(5), millivolts_to_limit_value_type1(config->vsen6_low_limit_mv)); - w83795_write(dev, W83795_REG_VOLT_LIM_HIGH(6), millivolts_to_limit_value_type1(config->vsen7_high_limit_mv)); - w83795_write(dev, W83795_REG_VOLT_LIM_LOW(6), millivolts_to_limit_value_type1(config->vsen7_low_limit_mv)); - w83795_write(dev, W83795_REG_VOLT_LIM_HIGH(7), millivolts_to_limit_value_type1(config->vsen8_high_limit_mv)); - w83795_write(dev, W83795_REG_VOLT_LIM_LOW(7), millivolts_to_limit_value_type1(config->vsen8_low_limit_mv)); - w83795_write(dev, W83795_REG_VOLT_LIM_HIGH(8), millivolts_to_limit_value_type1(config->vsen9_high_limit_mv)); - w83795_write(dev, W83795_REG_VOLT_LIM_LOW(8), millivolts_to_limit_value_type1(config->vsen9_low_limit_mv)); - w83795_write(dev, W83795_REG_VOLT_LIM_HIGH(9), millivolts_to_limit_value_type1(config->vsen10_high_limit_mv)); - w83795_write(dev, W83795_REG_VOLT_LIM_LOW(9), millivolts_to_limit_value_type1(config->vsen10_low_limit_mv)); - w83795_write(dev, W83795_REG_VOLT_LIM_HIGH(10), millivolts_to_limit_value_type1(config->vsen11_high_limit_mv)); - w83795_write(dev, W83795_REG_VOLT_LIM_LOW(10), millivolts_to_limit_value_type1(config->vsen11_low_limit_mv)); - w83795_write(dev, W83795_REG_VOLT_LIM_HIGH(11), millivolts_to_limit_value_type1(config->vtt_high_limit_mv)); - w83795_write(dev, W83795_REG_VOLT_LIM_LOW(11), millivolts_to_limit_value_type1(config->vtt_low_limit_mv)); - w83795_write(dev, W83795_REG_VOLT_LIM_HIGH(12), millivolts_to_limit_value_type2(config->vdd_high_limit_mv)); - w83795_write(dev, W83795_REG_VOLT_LIM_LOW(12), millivolts_to_limit_value_type2(config->vdd_low_limit_mv)); - w83795_write(dev, W83795_REG_VOLT_LIM_HIGH(13), millivolts_to_limit_value_type2(config->vsb_high_limit_mv)); - w83795_write(dev, W83795_REG_VOLT_LIM_LOW(13), millivolts_to_limit_value_type2(config->vsb_low_limit_mv)); - w83795_write(dev, W83795_REG_VOLT_LIM_HIGH(14), millivolts_to_limit_value_type2(config->vbat_high_limit_mv)); - w83795_write(dev, W83795_REG_VOLT_LIM_LOW(14), millivolts_to_limit_value_type2(config->vbat_low_limit_mv)); - - /* VSEN12 limits */ - if (config->temp_ctl1 & 0x2) { - limit_value = millivolts_to_limit_value_type3(config->vsen12_high_limit_mv); - w83795_write(dev, W83795_REG_VOLT_LIM_HIGH_2_M(4), limit_value >> 2); - w83795_write(dev, W83795_REG_VOLT_LIM_HIGH_2_L(4), limit_value & 0x3); - limit_value = millivolts_to_limit_value_type3(config->vsen12_low_limit_mv); - w83795_write(dev, W83795_REG_VOLT_LIM_LOW_2_M(4), limit_value >> 2); - w83795_write(dev, W83795_REG_VOLT_LIM_LOW_2_L(4), limit_value & 0x3); - } - - /* VSEN13 limits */ - if (config->temp_ctl1 & 0x8) { - limit_value = millivolts_to_limit_value_type3(config->vsen13_high_limit_mv); - w83795_write(dev, W83795_REG_VOLT_LIM_HIGH_2_M(5), limit_value >> 2); - w83795_write(dev, W83795_REG_VOLT_LIM_HIGH_2_L(5), limit_value & 0x3); - limit_value = millivolts_to_limit_value_type3(config->vsen13_low_limit_mv); - w83795_write(dev, W83795_REG_VOLT_LIM_LOW_2_M(5), limit_value >> 2); - w83795_write(dev, W83795_REG_VOLT_LIM_LOW_2_L(5), limit_value & 0x3); - } - - w83795_set_fan(dev, mode); - - /* Show current fan control settings */ - printk(BIOS_INFO, "Fan\tCTFS(celsius)\tTTTI(celsius)\n"); - for (i = 0; i < 6; i++) { - val = w83795_read(dev, W83795_REG_CTFS(i)); - printk(BIOS_INFO, " %x\t%d", i + 1, val); - val = w83795_read(dev, W83795_REG_TTTI(i)); - printk(BIOS_INFO, "\t%d\n", val); - } - - /* Show current temperatures */ - for (i = 0; i < 8; i++) { - val = w83795_read(dev, W83795_REG_DTS(i)); - printk(BIOS_DEBUG, "DTS%x current value: %x\n", i + 1, val); - } - - /* Start monitoring / fan control */ - val = w83795_read(dev, W83795_REG_CONFIG); - val |= W83795_REG_CONFIG_START; - w83795_write(dev, W83795_REG_CONFIG, val); - -#if CONFIG(SMBUS_HAS_AUX_CHANNELS) - /* Restore SMBUS channel setting */ - smbus_switch_to_channel(smbus_aux_channel_prev); - printk(BIOS_DEBUG, "Set SMBUS controller to channel %d\n", smbus_aux_channel_prev); -#endif -} - -static void w83795_hwm_init(struct device *dev) -{ - struct device *cpu; - struct cpu_info *info; - - info = cpu_info(); - cpu = info->cpu; - if (!cpu) - die("CPU: missing CPU device structure"); - - if (cpu->vendor == X86_VENDOR_AMD) - w83795_init(dev, THERMAL_CRUISE_MODE, DTS_SRC_AMD_SBTSI); - else if (cpu->vendor == X86_VENDOR_INTEL) - w83795_init(dev, THERMAL_CRUISE_MODE, DTS_SRC_INTEL_PECI); - else - printk(BIOS_ERR, "Neither AMD nor INTEL CPU detected\n"); -} - -static struct device_operations w83795_operations = { - .read_resources = DEVICE_NOOP, - .set_resources = DEVICE_NOOP, - .enable_resources = DEVICE_NOOP, - .init = w83795_hwm_init, -}; - -static void enable_dev(struct device *dev) -{ - dev->ops = &w83795_operations; -} - -struct chip_operations drivers_i2c_w83795_ops = { - CHIP_NAME("Nuvoton W83795G/ADG Hardware Monitor") - .enable_dev = enable_dev, -}; diff --git a/src/drivers/i2c/w83795/w83795.h b/src/drivers/i2c/w83795/w83795.h deleted file mode 100644 index f3dd176..0000000 --- a/src/drivers/i2c/w83795/w83795.h +++ /dev/null @@ -1,88 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef _W83795_H_ -#define _W83795_H_ - -#define W83795_REG_I2C_ADDR 0xFC -#define W83795_REG_BANKSEL 0x00 -#define W83795_REG_CONFIG 0x01 -#define W83795_REG_CONFIG_START 0x01 -#define W83795_REG_CONFIG_CONFIG48 0x04 -#define W83795_REG_CONFIG_INIT 0x80 - -#define W83795_REG_VOLT_CTRL1 0x02 -#define W83795_REG_VOLT_CTRL2 0x03 -#define W83795_REG_TEMP_CTRL1 0x04 /* Temperature Monitoring Control Register */ -#define W83795_REG_TEMP_CTRL2 0x05 /* Temperature Monitoring Control Register */ -#define W83795_REG_FANIN_CTRL1 0x06 -#define W83795_REG_FANIN_CTRL2 0x07 -#define W83795_REG_TEMP_CTRL1_EN_DTS 0x20 /* Enable DTS (Digital Temperature Sensor) interface from INTEL PECI or AMD SB-TSI. */ -#define DTS_SRC_INTEL_PECI (0 << 0) -#define DTS_SRC_AMD_SBTSI (1 << 0) - -#define W83795_REG_TTTI(n) (0x260 + (n)) /* Target temperature W83795G/ADG will try to tune the fan output to keep */ -#define W83795_REG_CTFS(n) (0x268 + (n)) /* Critical Temperature to Full Speed all fan */ -#define W83795_REG_DTSC 0x301 /* Digital Temperature Sensor Configuration */ - -#define W83795_REG_DTSE 0x302 /* Digital Temperature Sensor Enable */ -#define W83795_REG_DTS(n) (0x26 + (n)) -#define W83795_REG_VRLSB 0x3C - -#define W83795_REG_TEMP_TR1 0x21 -#define W83795_REG_TEMP_TR2 0x22 -#define W83795_REG_TEMP_TR3 0x23 -#define W83795_REG_TEMP_TR4 0x24 -#define W83795_REG_TEMP_TR5 0x1F -#define W83795_REG_TEMP_TR6 0x20 - -#define W83795_REG_VOLT_LIM_HIGH(n) (0x70 + (n * 2)) /* Voltage high limit (0 == VSEN1) */ -#define W83795_REG_VOLT_LIM_LOW(n) (0x71 + (n * 2)) /* Voltage low limit (0 == VSEN1) */ -#define W83795_REG_VOLT_LIM_HIGH_2_M(n) (0x96 + (n * 4)) /* Voltage high limit MSB (0 == VDSEN14) */ -#define W83795_REG_VOLT_LIM_LOW_2_M(n) (0x97 + (n * 4)) /* Voltage low limit MSB (0 == VDSEN14) */ -#define W83795_REG_VOLT_LIM_HIGH_2_L(n) (0x98 + (n * 4)) /* Voltage high limit LSB (0 == VDSEN14) */ -#define W83795_REG_VOLT_LIM_LOW_2_L(n) (0x99 + (n * 4)) /* Voltage low limit LSB (0 == VDSEN14) */ - -#define W83795_REG_TEMP_CRIT(n) (0x96 + (n * 4)) /* Temperature critical limit */ -#define W83795_REG_TEMP_CRIT_HYSTER(n) (0x97 + (n * 4)) /* Temperature critical limit hysteresis */ -#define W83795_REG_TEMP_WARN(n) (0x98 + (n * 4)) /* Temperature warning limit */ -#define W83795_REG_TEMP_WARN_HYSTER(n) (0x99 + (n * 4)) /* Temperature warning limit hysteresis */ - -#define W83795_REG_DTS_CRIT 0xB2 /* Temperature critical limit */ -#define W83795_REG_DTS_CRIT_HYSTER 0xB3 /* Temperature critical limit hysteresis */ -#define W83795_REG_DTS_WARN 0xB4 /* Temperature warning limit */ -#define W83795_REG_DTS_WARN_HYSTER 0xB5 /* Temperature warning limit hysteresis */ - -#define W83795_REG_FCMS1 0x201 -#define W83795_REG_FCMS2 0x208 -#define W83795_REG_TFMR(n) (0x202 + (n)) /* Temperature to fan mapping */ -#define W83795_REG_T12TSS 0x209 /* Temperature Source Selection Register 1 */ -#define W83795_REG_T34TSS 0x20A /* Temperature Source Selection Register 2 */ -#define W83795_REG_T56TSS 0x20B /* Temperature Source Selection Register 3 */ -#define W83795_REG_FAN_MANUAL_SPEED(n) (0x210 + n) -#define W83795_REG_DFSP 0x20C - -#define W83795_REG_FAN_NONSTOP(n) (0x228 + (n)) /* Fan Nonstop Value */ - -#define W83795_REG_FTSH(n) (0x240 + (n) * 2) -#define W83795_REG_FTSL(n) (0x241 + (n) * 2) -#define W83795_REG_TFTS 0x250 - -typedef enum w83795_fan_mode { - SPEED_CRUISE_MODE = 0, ///< Fan Speed Cruise mode keeps the fan speed in a specified range - THERMAL_CRUISE_MODE = 1, ///< Thermal Cruise mode is an algorithm to control the fan speed to keep the temperature source around the TTTI - SMART_FAN_MODE = 2, ///< Smart Fan mode offers 6 slopes to control the fan speed - MANUAL_MODE = 3, ///< control manually -} w83795_fan_mode_t; - -#endif -- To view, visit https://review.coreboot.org/c/coreboot/+/38152 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I254f62c9a94838f70d624dadf32cb42c2370123d Gerrit-Change-Number: 38152 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

3 4

Change in coreboot[master]: vc/amd/agesa/[...]/Proc/Mem: Comment out unused function
by Name of user not set (Code Review) 04 Jan '20

04 Jan '20

awokd(a)danwin1210.me has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38173 ) Change subject: vc/amd/agesa/[...]/Proc/Mem: Comment out unused function ...................................................................... vc/amd/agesa/[...]/Proc/Mem: Comment out unused function The MemNTrainingFlowNb function is not in use, but is creating a Coverity warning. Comment it and its declaration out. Change-Id: Ib56fb6d98f5afa0a73004c29d05647683e7a63d9 Signed-off-by: Joe Moore <awokd(a)danwin1210.me> Found-by: Coverity CID 1357451 --- M src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mn.c M src/vendorcode/amd/agesa/f14/Proc/Mem/mn.h M src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mn.c M src/vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h 4 files changed, 8 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/38173/1 diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mn.c b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mn.c index 6afc3d0..f149d9b 100644 --- a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mn.c +++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mn.c @@ -296,7 +296,7 @@ * The DDR3 mode bit must be set prior to calling this function * * @param[in,out] *NBPtr - Pointer to the MEM_NB_BLOCK - */ + BOOLEAN MemNTrainingFlowNb ( IN OUT MEM_NB_BLOCK *NBPtr @@ -309,6 +309,7 @@ } return TRUE; } +*/ /*-----------------------------------------------------------------------------*/ /** diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/mn.h b/src/vendorcode/amd/agesa/f14/Proc/Mem/mn.h index e25c938..ec6cbc2 100644 --- a/src/vendorcode/amd/agesa/f14/Proc/Mem/mn.h +++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/mn.h @@ -1023,10 +1023,12 @@ IN OUT MEM_NB_BLOCK *NBPtr ); +/* BOOLEAN MemNTrainingFlowNb ( IN OUT MEM_NB_BLOCK *NBPtr ); +*/ VOID MemNRecTrainingFlowNb ( diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mn.c b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mn.c index 63195e0..03f05f0 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mn.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mn.c @@ -292,7 +292,7 @@ * The DDR3 mode bit must be set prior to calling this function * * @param[in,out] *NBPtr - Pointer to the MEM_NB_BLOCK - */ + BOOLEAN MemNTrainingFlowNb ( IN OUT MEM_NB_BLOCK *NBPtr @@ -305,6 +305,7 @@ } return TRUE; } +*/ /*-----------------------------------------------------------------------------*/ /** diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h index 4be78a3..b409ac5 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h +++ b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h @@ -1127,10 +1127,12 @@ IN OUT MEM_NB_BLOCK *NBPtr ); +/* BOOLEAN MemNTrainingFlowNb ( IN OUT MEM_NB_BLOCK *NBPtr ); +*/ VOID MemNRecTrainingFlowNb ( -- To view, visit https://review.coreboot.org/c/coreboot/+/38173 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib56fb6d98f5afa0a73004c29d05647683e7a63d9 Gerrit-Change-Number: 38173 Gerrit-PatchSet: 1 Gerrit-Owner: awokd(a)danwin1210.me Gerrit-MessageType: newchange

1 2

Change in coreboot[master]: [WIP] [Untested] Add Razer Blade Stealth IceLake Mercury White (late ...
by Angel Pons (Code Review) 04 Jan '20

04 Jan '20

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37565 ) Change subject: [WIP] [Untested] Add Razer Blade Stealth IceLake Mercury White (late 2019) ...................................................................... Patch Set 3: (22 comments) Ice Lake /o\ https://review.coreboot.org/c/coreboot/+/37565/3//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/37565/3//COMMIT_MSG@11 PS3, Line 11: SuperIO ITE website disagrees: IT8320 : Highly Integrated Embedded Controller Sure, ITE ECs also have a SuperIO-like interface, but they are ECs. https://review.coreboot.org/c/coreboot/+/37565/3//COMMIT_MSG@13 PS3, Line 13: Two Only two LPDDR4 chips? https://review.coreboot.org/c/coreboot/+/37565/3/src/mainboard/razer/blade_… File src/mainboard/razer/blade_stealth_icl/Kconfig: https://review.coreboot.org/c/coreboot/+/37565/3/src/mainboard/razer/blade_… PS3, Line 37: UART_FOR_CONSOLE Where is the UART routed to? https://review.coreboot.org/c/coreboot/+/37565/3/src/mainboard/razer/blade_… File src/mainboard/razer/blade_stealth_icl/Makefile.inc: https://review.coreboot.org/c/coreboot/+/37565/3/src/mainboard/razer/blade_… PS3, Line 22: CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB This is enforced by the mainboard selection. https://review.coreboot.org/c/coreboot/+/37565/3/src/mainboard/razer/blade_… File src/mainboard/razer/blade_stealth_icl/acpi/mainboard.asl: PS3: Is this file needed, or is it a stub? https://review.coreboot.org/c/coreboot/+/37565/3/src/mainboard/razer/blade_… File src/mainboard/razer/blade_stealth_icl/acpi_tables.c: PS3: There's a change dropping these empty files https://review.coreboot.org/c/coreboot/+/37565/3/src/mainboard/razer/blade_… File src/mainboard/razer/blade_stealth_icl/devicetree.cb: https://review.coreboot.org/c/coreboot/+/37565/3/src/mainboard/razer/blade_… PS3, Line 39: Pch nit: PCH https://review.coreboot.org/c/coreboot/+/37565/3/src/mainboard/razer/blade_… PS3, Line 164: Enable Really? https://review.coreboot.org/c/coreboot/+/37565/3/src/mainboard/razer/blade_… PS3, Line 189: end Please align these `end`. That way, it looks prettier :D https://review.coreboot.org/c/coreboot/+/37565/3/src/mainboard/razer/blade_… PS3, Line 298: end Another misalignment around here https://review.coreboot.org/c/coreboot/+/37565/3/src/mainboard/razer/blade_… File src/mainboard/razer/blade_stealth_icl/dsdt.asl: https://review.coreboot.org/c/coreboot/+/37565/3/src/mainboard/razer/blade_… PS3, Line 28: // Some generic macros I got rid of these comments recently! Please don't add them again https://review.coreboot.org/c/coreboot/+/37565/3/src/mainboard/razer/blade_… PS3, Line 34: // CPU This comment doesn't really add any value, does it? https://review.coreboot.org/c/coreboot/+/37565/3/src/mainboard/razer/blade_… PS3, Line 36: : Scope (\_SB) { : Device (PCI0) Device (\_SB.PCI0) https://review.coreboot.org/c/coreboot/+/37565/3/src/mainboard/razer/blade_… PS3, Line 45: // Chipset specific sleep states I removed these comments as well. The sleepstates are no longer specific to each chipset. https://review.coreboot.org/c/coreboot/+/37565/3/src/mainboard/razer/blade_… PS3, Line 49: #include "acpi/mainboard.asl" If you don't use that file, this can be dropped https://review.coreboot.org/c/coreboot/+/37565/3/src/mainboard/razer/blade_… File src/mainboard/razer/blade_stealth_icl/hda_verb.h: https://review.coreboot.org/c/coreboot/+/37565/3/src/mainboard/razer/blade_… PS3, Line 22: /* ALC 700 */ : 0x10EC0700, 0xFFFFFFFF, 0x00000023, You can add comments to these values. Also, please use lowercase for hex constants. The third number is a length value, so it should be decimal: 0x10ec0700, /* Realtek ALC700 */ 0xffffffff, /* Subsystem ID */ 35, /* Number of four-dword sets */ https://review.coreboot.org/c/coreboot/+/37565/3/src/mainboard/razer/blade_… PS3, Line 25: AZALIA_PIN_CFG(0, 0x01, 0x00000000), Looks bogus. NID 0x01 is the subsystem ID, AFAIK, so it shouldn't have any pin_cfg macro https://review.coreboot.org/c/coreboot/+/37565/3/src/mainboard/razer/blade_… PS3, Line 25: 0x10EC10F2 You can also put this value in place of the 0xffffffff above https://review.coreboot.org/c/coreboot/+/37565/3/src/mainboard/razer/blade_… PS3, Line 26: AZALIA_PIN_CFG(0, 0x12, 0x40000000), AZALIA_PIN_CFG(0, 0x13, 0x40000000), : AZALIA_PIN_CFG(0, 0x14, 0x411111F0), AZALIA_PIN_CFG(0, 0x15, 0x411111F0), : AZALIA_PIN_CFG(0, 0x16, 0x411111F0), AZALIA_PIN_CFG(0, 0x17, 0x90170110), : AZALIA_PIN_CFG(0, 0x18, 0x411111F0), AZALIA_PIN_CFG(0, 0x19, 0x04A11030), : AZALIA_PIN_CFG(0, 0x1A, 0x411111F0), AZALIA_PIN_CFG(0, 0x1B, 0x411111F0), : AZALIA_PIN_CFG(0, 0x1D, 0x40622005), AZALIA_PIN_CFG(0, 0x1E, 0x411111F0), : AZALIA_PIN_CFG(0, 0x1F, 0x411111F0), AZALIA_PIN_CFG(0, 0x21, 0x04211020), : AZALIA_PIN_CFG(0, 0x29, 0x411111F0), Please put these on individual lines. Also, please use lowercase for the hex values https://review.coreboot.org/c/coreboot/+/37565/3/src/mainboard/razer/blade_… PS3, Line 40: // Widget node 0X20 for ALC1305 20160603 update Are all of these hex spells applicable to the ALC700? If so, please group them in quadruples (groups of four). That way, one can easily check if there are actually 35 groups. https://review.coreboot.org/c/coreboot/+/37565/3/src/mainboard/razer/blade_… File src/mainboard/razer/blade_stealth_icl/hda_verb.c: https://review.coreboot.org/c/coreboot/+/37565/3/src/mainboard/razer/blade_… PS3, Line 15: #include "hda_verb.h" Why don't you just put the hda_verb.h contents here? https://review.coreboot.org/c/coreboot/+/37565/3/src/mainboard/razer/blade_… File src/mainboard/razer/blade_stealth_icl/romstage.c: https://review.coreboot.org/c/coreboot/+/37565/3/src/mainboard/razer/blade_… PS3, Line 28: // Only one memory setup exists Please use consistent comment styles -- To view, visit https://review.coreboot.org/c/coreboot/+/37565 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5711cbcd69813832d9bacc9563f651ab8702554a Gerrit-Change-Number: 37565 Gerrit-PatchSet: 3 Gerrit-Owner: Mimoja <coreboot(a)mimoja.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Mimoja <coreboot(a)mimoja.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Sat, 04 Jan 2020 14:49:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/common/basecode: Implement CSE update flow
by Sridhar Siricilla (Code Review) 04 Jan '20

04 Jan '20

Hello Patrick Rudolph, Subrata Banik, Balaji Manigandan, Aamir Bohra, Sridhar Siricilla, Rizwan Qureshi, build bot (Jenkins), Patrick Georgi, Furquan Shaikh, V Sowmya, Andrey Petrov, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/35403 to look at the new patch set (#38). Change subject: soc/intel/common/basecode: Implement CSE update flow ...................................................................... soc/intel/common/basecode: Implement CSE update flow This is the core patch that implement CSE FW update flow. To enable the FW update flow the following are required: * Descriptor change to accommodate a larger CSME region The CSME size is 4.1MB. * FMAP changes to accommodate ME update binary in RW CBFSes & larger CSE binary. Due to the increased CSME binary size and to accommodate the extra CSME RW binaries (which are ~2.5 MB) in RW CBFSes, the board FMAP has to be modified. * The new CSE binary with new partitions and respective RW area binaries. The following changes have been done in this patch: * Implement Update flow Get the partition info containing version of ME RW using GET_BOOT_PARTITION_INFO HECI command Get the me_rw.version from the currently selected RW slot. If the version from the above 2 locations don't match start the update - Set the CSE's next boot partition to RO using SET_BOOT_PARTITION HECI command. - Send global reset command to reset only the CSME - Wait for CSME to enter SOFT_TEMP_DISABLE operation mode (indicated by HFSTS1 register bit 19:16) - Enable HMRFPO (Host ME Region Flash Protection Override) using the HMRFPO_ENABLE HECI command - Erase and Copy the CBFS ME RW to ME RW partition - Set the CSE's next boot partition to RW using SET_BOOT_PARTITION HECI command - Trigger global reset The system should boot with the Updated ME Verified basic update flows on Cometlake RVP and hatch. BUG=b:111330995 Change-Id: I12f6bba3324069d65edabaccd234006b0840e700 Signed-off-by: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Signed-off-by: V Sowmya <v.sowmya(a)intel.com> Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com> --- A Documentation/soc/intel/cse_fw_update/Layout_after.svg A Documentation/soc/intel/cse_fw_update/Layout_before.svg A Documentation/soc/intel/cse_fw_update/cse_fw_update.md M Documentation/soc/intel/index.md A src/soc/intel/common/basecode/fw_update/Kconfig A src/soc/intel/common/basecode/fw_update/Makefile.inc A src/soc/intel/common/basecode/fw_update/cse_update.c A src/soc/intel/common/basecode/include/intelbasecode/cse_update.h 8 files changed, 854 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/35403/38 -- To view, visit https://review.coreboot.org/c/coreboot/+/35403 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I12f6bba3324069d65edabaccd234006b0840e700 Gerrit-Change-Number: 35403 Gerrit-PatchSet: 38 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: [WIP] [Untested] Add Razer Blade Stealth IceLake Mercury White (late ...
by Mimoja (Code Review) 04 Jan '20

04 Jan '20

Hello build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/37565 to look at the new patch set (#3). Change subject: [WIP] [Untested] Add Razer Blade Stealth IceLake Mercury White (late 2019) ...................................................................... [WIP] [Untested] Add Razer Blade Stealth IceLake Mercury White (late 2019) The Razer Blade Stealth Mercury White is a IceLake system using: - Intel i7-1065G7 (IceLake with Iris Plus GPU) - ITE IT8320VG SuperIO - Samsung M981 MZ-VLKB2560 256GB NVMe SSD - Two Samsung K4UBE3D4AM-GHCL LPDDR4 chips - Integrated TitanRidge Thunderbolt 3 controller - ??? USB-PD power switch / multiplexer Change-Id: I5711cbcd69813832d9bacc9563f651ab8702554a Signed-off-by: Johanna Schander <coreboot(a)mimoja.de> --- A src/mainboard/razer/blade_stealth_icl/Kconfig A src/mainboard/razer/blade_stealth_icl/Kconfig.name A src/mainboard/razer/blade_stealth_icl/Makefile.inc A src/mainboard/razer/blade_stealth_icl/acpi/mainboard.asl A src/mainboard/razer/blade_stealth_icl/acpi_tables.c A src/mainboard/razer/blade_stealth_icl/board_info.txt A src/mainboard/razer/blade_stealth_icl/bootblock.c A src/mainboard/razer/blade_stealth_icl/devicetree.cb A src/mainboard/razer/blade_stealth_icl/dsdt.asl A src/mainboard/razer/blade_stealth_icl/ec.h A src/mainboard/razer/blade_stealth_icl/gpio.h A src/mainboard/razer/blade_stealth_icl/hda_verb.c A src/mainboard/razer/blade_stealth_icl/hda_verb.h A src/mainboard/razer/blade_stealth_icl/ramstage.c A src/mainboard/razer/blade_stealth_icl/romstage.c A src/mainboard/razer/blade_stealth_icl/spd/Makefile.inc A src/mainboard/razer/blade_stealth_icl/spd/samsung_K4F6E304HBMGCJ.spd.hex A src/mainboard/razer/blade_stealth_icl/spd/spd.h A src/mainboard/razer/blade_stealth_icl/spd/spd_util.c 19 files changed, 1,192 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/37565/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/37565 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5711cbcd69813832d9bacc9563f651ab8702554a Gerrit-Change-Number: 37565 Gerrit-PatchSet: 3 Gerrit-Owner: Mimoja <coreboot(a)mimoja.de> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Mimoja <coreboot(a)mimoja.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit January 2020