coreboot-gerrit September 2019

coreboot-gerrit@coreboot.org

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Change in ...coreboot[master]: {cpu,device,drivers}: Remove unused include <device/pci_ops.h>
by HAOUAS Elyes (Code Review) 15 Sep '19

15 Sep '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33527 Change subject: {cpu,device,drivers}: Remove unused include <device/pci_ops.h> ...................................................................... {cpu,device,drivers}: Remove unused include <device/pci_ops.h> Change-Id: I68da75e3afa2f66aff9961728d4a76bc3e175fce Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/cpu/amd/pi/amd_late_init.c M src/cpu/intel/fsp_model_406dx/bootblock.c M src/device/azalia_device.c M src/drivers/aspeed/ast2050/ast2050.c M src/drivers/intel/gma/intel_ddi.c 5 files changed, 0 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/33527/1 diff --git a/src/cpu/amd/pi/amd_late_init.c b/src/cpu/amd/pi/amd_late_init.c index 8c0da9d..e105892 100644 --- a/src/cpu/amd/pi/amd_late_init.c +++ b/src/cpu/amd/pi/amd_late_init.c @@ -17,7 +17,6 @@ #include <bootstate.h> #include <device/device.h> #include <device/pci_def.h> -#include <device/pci_ops.h> #include <northbridge/amd/pi/agesawrapper.h> #include <northbridge/amd/pi/agesawrapper_call.h> diff --git a/src/cpu/intel/fsp_model_406dx/bootblock.c b/src/cpu/intel/fsp_model_406dx/bootblock.c index 14cfad9..c43124a 100644 --- a/src/cpu/intel/fsp_model_406dx/bootblock.c +++ b/src/cpu/intel/fsp_model_406dx/bootblock.c @@ -20,7 +20,6 @@ #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> #include <arch/io.h> -#include <device/pci_ops.h> #include <southbridge/intel/fsp_rangeley/soc.h> #include "model_406dx.h" diff --git a/src/device/azalia_device.c b/src/device/azalia_device.c index a2849b7..9727eb6 100644 --- a/src/device/azalia_device.c +++ b/src/device/azalia_device.c @@ -16,7 +16,6 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ops.h> #include <device/azalia_device.h> #include <device/mmio.h> #include <delay.h> diff --git a/src/drivers/aspeed/ast2050/ast2050.c b/src/drivers/aspeed/ast2050/ast2050.c index 21af5c7..59659b8 100644 --- a/src/drivers/aspeed/ast2050/ast2050.c +++ b/src/drivers/aspeed/ast2050/ast2050.c @@ -20,7 +20,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <device/pci_ops.h> #include <pc80/vga.h> #include "../common/aspeed_coreboot.h" diff --git a/src/drivers/intel/gma/intel_ddi.c b/src/drivers/intel/gma/intel_ddi.c index 471a5d2..b475b5e 100644 --- a/src/drivers/intel/gma/intel_ddi.c +++ b/src/drivers/intel/gma/intel_ddi.c @@ -30,7 +30,6 @@ #include <stdlib.h> #include <device/device.h> #include <device/pci_def.h> -#include <device/pci_ops.h> #include <console/console.h> #include <arch/acpi.h> #include <arch/interrupt.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/33527 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I68da75e3afa2f66aff9961728d4a76bc3e175fce Gerrit-Change-Number: 33527 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: src/mainboard: Remove not used #include <elog.h>
by HAOUAS Elyes (Code Review) 15 Sep '19

15 Sep '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33729 Change subject: src/mainboard: Remove not used #include <elog.h> ...................................................................... src/mainboard: Remove not used #include <elog.h> Change-Id: I901cb35488e08f58cdf97f3a8d0f5a8d03560f86 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/google/beltino/smihandler.c M src/mainboard/google/glados/smihandler.c M src/mainboard/google/jecht/smihandler.c M src/mainboard/google/nyan/mainboard.c M src/mainboard/google/nyan_big/mainboard.c M src/mainboard/google/nyan_blaze/mainboard.c M src/mainboard/google/oak/mainboard.c M src/mainboard/google/veyron/mainboard.c M src/mainboard/google/veyron_mickey/mainboard.c M src/mainboard/google/veyron_rialto/mainboard.c M src/mainboard/intel/kblrvp/smihandler.c M src/mainboard/intel/kunimitsu/smihandler.c 12 files changed, 0 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/33729/1 diff --git a/src/mainboard/google/beltino/smihandler.c b/src/mainboard/google/beltino/smihandler.c index e786ef5..d2f923a 100644 --- a/src/mainboard/google/beltino/smihandler.c +++ b/src/mainboard/google/beltino/smihandler.c @@ -21,7 +21,6 @@ #include <southbridge/intel/lynxpoint/me.h> #include <southbridge/intel/lynxpoint/nvs.h> #include <southbridge/intel/lynxpoint/pch.h> -#include <elog.h> #include <superio/ite/it8772f/it8772f.h> #include "onboard.h" diff --git a/src/mainboard/google/glados/smihandler.c b/src/mainboard/google/glados/smihandler.c index a4a1cca..8e4cada 100644 --- a/src/mainboard/google/glados/smihandler.c +++ b/src/mainboard/google/glados/smihandler.c @@ -18,7 +18,6 @@ #include <baseboard/variant.h> #include <console/console.h> #include <cpu/x86/smm.h> -#include <elog.h> #include <ec/google/chromeec/smm.h> #include <gpio.h> #include <soc/iomap.h> diff --git a/src/mainboard/google/jecht/smihandler.c b/src/mainboard/google/jecht/smihandler.c index 9475361..8e8c9d4 100644 --- a/src/mainboard/google/jecht/smihandler.c +++ b/src/mainboard/google/jecht/smihandler.c @@ -19,7 +19,6 @@ #include <cpu/x86/smm.h> #include <soc/pm.h> #include <soc/smm.h> -#include <elog.h> #include <ec/google/chromeec/ec.h> #include <soc/gpio.h> #include <soc/iomap.h> diff --git a/src/mainboard/google/nyan/mainboard.c b/src/mainboard/google/nyan/mainboard.c index 807cec3..3e9f9fa 100644 --- a/src/mainboard/google/nyan/mainboard.c +++ b/src/mainboard/google/nyan/mainboard.c @@ -15,7 +15,6 @@ #include <device/mmio.h> #include <device/device.h> -#include <elog.h> #include <boot/coreboot_tables.h> #include <gpio.h> #include <soc/addressmap.h> diff --git a/src/mainboard/google/nyan_big/mainboard.c b/src/mainboard/google/nyan_big/mainboard.c index c8bb813..9c4e943 100644 --- a/src/mainboard/google/nyan_big/mainboard.c +++ b/src/mainboard/google/nyan_big/mainboard.c @@ -16,7 +16,6 @@ #include <device/mmio.h> #include <boot/coreboot_tables.h> #include <device/device.h> -#include <elog.h> #include <gpio.h> #include <soc/addressmap.h> #include <soc/clk_rst.h> diff --git a/src/mainboard/google/nyan_blaze/mainboard.c b/src/mainboard/google/nyan_blaze/mainboard.c index 97d0576..7f8abab 100644 --- a/src/mainboard/google/nyan_blaze/mainboard.c +++ b/src/mainboard/google/nyan_blaze/mainboard.c @@ -16,7 +16,6 @@ #include <device/mmio.h> #include <boot/coreboot_tables.h> #include <device/device.h> -#include <elog.h> #include <gpio.h> #include <soc/addressmap.h> #include <soc/clock.h> diff --git a/src/mainboard/google/oak/mainboard.c b/src/mainboard/google/oak/mainboard.c index fde2bd0..3397a50 100644 --- a/src/mainboard/google/oak/mainboard.c +++ b/src/mainboard/google/oak/mainboard.c @@ -22,8 +22,6 @@ #include <device/device.h> #include <drivers/parade/ps8640/ps8640.h> #include <edid.h> - -#include <elog.h> #include <gpio.h> #include <soc/da9212.h> #include <soc/ddp.h> diff --git a/src/mainboard/google/veyron/mainboard.c b/src/mainboard/google/veyron/mainboard.c index 5243dc9..8aa20aa 100644 --- a/src/mainboard/google/veyron/mainboard.c +++ b/src/mainboard/google/veyron/mainboard.c @@ -20,7 +20,6 @@ #include <device/device.h> #include <device/i2c_simple.h> #include <edid.h> -#include <elog.h> #include <gpio.h> #include <soc/display.h> #include <soc/grf.h> diff --git a/src/mainboard/google/veyron_mickey/mainboard.c b/src/mainboard/google/veyron_mickey/mainboard.c index 9024b6c..2de720c 100644 --- a/src/mainboard/google/veyron_mickey/mainboard.c +++ b/src/mainboard/google/veyron_mickey/mainboard.c @@ -19,7 +19,6 @@ #include <device/device.h> #include <device/i2c_simple.h> #include <edid.h> -#include <elog.h> #include <gpio.h> #include <soc/display.h> #include <soc/grf.h> diff --git a/src/mainboard/google/veyron_rialto/mainboard.c b/src/mainboard/google/veyron_rialto/mainboard.c index 6259955..52ecbf6 100644 --- a/src/mainboard/google/veyron_rialto/mainboard.c +++ b/src/mainboard/google/veyron_rialto/mainboard.c @@ -20,7 +20,6 @@ #include <device/device.h> #include <device/i2c_simple.h> #include <edid.h> -#include <elog.h> #include <gpio.h> #include <soc/display.h> #include <soc/grf.h> diff --git a/src/mainboard/intel/kblrvp/smihandler.c b/src/mainboard/intel/kblrvp/smihandler.c index ba8458b..ba68df2 100644 --- a/src/mainboard/intel/kblrvp/smihandler.c +++ b/src/mainboard/intel/kblrvp/smihandler.c @@ -16,7 +16,6 @@ #include <console/console.h> #include <cpu/x86/smm.h> -#include <elog.h> #include <ec/google/chromeec/smm.h> #include <soc/iomap.h> #include <soc/nvs.h> diff --git a/src/mainboard/intel/kunimitsu/smihandler.c b/src/mainboard/intel/kunimitsu/smihandler.c index df02601..e65b153 100644 --- a/src/mainboard/intel/kunimitsu/smihandler.c +++ b/src/mainboard/intel/kunimitsu/smihandler.c @@ -17,7 +17,6 @@ #include <arch/acpi.h> #include <console/console.h> #include <cpu/x86/smm.h> -#include <elog.h> #include <ec/google/chromeec/smm.h> #include <soc/iomap.h> #include <soc/nvs.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/33729 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I901cb35488e08f58cdf97f3a8d0f5a8d03560f86 Gerrit-Change-Number: 33729 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: nb/i945: Remove unused include <cpu/cpu.h>
by HAOUAS Elyes (Code Review) 15 Sep '19

15 Sep '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35384 ) Change subject: nb/i945: Remove unused include <cpu/cpu.h> ...................................................................... nb/i945: Remove unused include <cpu/cpu.h> Change-Id: I5dff9b7c157b2aba596e95b5fb18a84f7c4e9365 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/northbridge/intel/i945/northbridge.c 1 file changed, 0 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/35384/1 diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c index dd4e8ac..dde1b11 100644 --- a/src/northbridge/intel/i945/northbridge.c +++ b/src/northbridge/intel/i945/northbridge.c @@ -21,7 +21,6 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <stdlib.h> -#include <cpu/cpu.h> #include <arch/acpi.h> #include <cpu/intel/smm_reloc.h> #include "i945.h" -- To view, visit https://review.coreboot.org/c/coreboot/+/35384 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5dff9b7c157b2aba596e95b5fb18a84f7c4e9365 Gerrit-Change-Number: 35384 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: util/inteltool: Add Intel HD 4400 (Haswell IGD)
by Christoph Pomaska (Code Review) 15 Sep '19

15 Sep '19

Christoph Pomaska has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34588 ) Change subject: util/inteltool: Add Intel HD 4400 (Haswell IGD) ...................................................................... util/inteltool: Add Intel HD 4400 (Haswell IGD) Add the 8086:041e integrated graphics controller to the list of definitions. Adding the definition makes the Intel HD 4400 graphics recognized by inteltool. It is found in e.g. the Intel i3-4130 CPU: https://ark.intel.com/content/www/us/en/ark/products/77480/intel-core-i3-41… Change-Id: I6d6b2eaa7cc5aa3912592ed3fcb73751b224eede Signed-off-by: Sellerie <sellerie(a)aufmachen.jetzt> --- M util/inteltool/inteltool.c M util/inteltool/inteltool.h 2 files changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/34588/1 diff --git a/util/inteltool/inteltool.c b/util/inteltool/inteltool.c index 76b1abe..b068d41 100644 --- a/util/inteltool/inteltool.c +++ b/util/inteltool/inteltool.c @@ -358,6 +358,8 @@ "Intel(R) HD 4000 Graphics" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HD_4000_2, "Intel(R) HD 4000 Graphics" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HD_4400, + "Intel(R) HD 4400 Graphics" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HD_4600, "Intel(R) HD 4600 Graphics" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HD_4600_1, diff --git a/util/inteltool/inteltool.h b/util/inteltool/inteltool.h index 483c930..c3481e0 100644 --- a/util/inteltool/inteltool.h +++ b/util/inteltool/inteltool.h @@ -314,6 +314,7 @@ #define PCI_DEVICE_ID_INTEL_HD_4000 0x0162 #define PCI_DEVICE_ID_INTEL_HD_4000_1 0x0166 #define PCI_DEVICE_ID_INTEL_HD_4000_2 0x016A +#define PCI_DEVICE_ID_INTEL_HD_4400 0x041e #define PCI_DEVICE_ID_INTEL_HD_4600 0x0412 #define PCI_DEVICE_ID_INTEL_HD_4600_1 0x0416 #define PCI_DEVICE_ID_INTEL_HD_5000 0x0422 -- To view, visit https://review.coreboot.org/c/coreboot/+/34588 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6d6b2eaa7cc5aa3912592ed3fcb73751b224eede Gerrit-Change-Number: 34588 Gerrit-PatchSet: 1 Gerrit-Owner: Christoph Pomaska <github(a)aufmachen.jetzt> Gerrit-MessageType: newchange

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Change in coreboot[master]: Add Razer Blade Stealth (2016) H2U
by Jonathan Neuschäfer (Code Review) 15 Sep '19

15 Sep '19

Jonathan Neuschäfer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34475 ) Change subject: Add Razer Blade Stealth (2016) H2U ...................................................................... Patch Set 41: Code-Review+1 Looks good -- To view, visit https://review.coreboot.org/c/coreboot/+/34475 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7ede881d631e1863f07f5130f84bc3b8ca61a350 Gerrit-Change-Number: 34475 Gerrit-PatchSet: 41 Gerrit-Owner: Mimoja <coreboot(a)mimoja.de> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christoph Pomaska <github(a)aufmachen.jetzt> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Mimoja <coreboot(a)mimoja.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Sun, 15 Sep 2019 12:35:43 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: Add Razer Blade Stealth (2016) H2U
by build bot (Jenkins) (Code Review) 15 Sep '19

15 Sep '19

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34475 ) Change subject: Add Razer Blade Stealth (2016) H2U ...................................................................... Patch Set 41: (2 comments) https://review.coreboot.org/c/coreboot/+/34475/41/src/mainboard/razer/blade… File src/mainboard/razer/blade_stealth_kbl/spd/spd_util.c: https://review.coreboot.org/c/coreboot/+/34475/41/src/mainboard/razer/blade… PS41, Line 26: {0x33, 0xCC, 0x00, 0xCC, 0x33, 0xCC, 0x33, 0x00, 0xFF, 0x00, 0xFF, 0x00}}; space required after that close brace '}' https://review.coreboot.org/c/coreboot/+/34475/41/src/mainboard/razer/blade… PS41, Line 33: const u8 dqs_map[2][8] = {{0, 1, 3, 2, 4, 5, 6, 7}, {1, 0, 4, 5, 2, 3, 6, 7}}; space required after that close brace '}' -- To view, visit https://review.coreboot.org/c/coreboot/+/34475 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7ede881d631e1863f07f5130f84bc3b8ca61a350 Gerrit-Change-Number: 34475 Gerrit-PatchSet: 41 Gerrit-Owner: Mimoja <coreboot(a)mimoja.de> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christoph Pomaska <github(a)aufmachen.jetzt> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Mimoja <coreboot(a)mimoja.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Sun, 15 Sep 2019 12:26:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/emulation/qemu: Show splashscreen on bochs VGA
by Mimoja (Code Review) 15 Sep '19

15 Sep '19

Mimoja has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34599 ) Change subject: drivers/emulation/qemu: Show splashscreen on bochs VGA ...................................................................... drivers/emulation/qemu: Show splashscreen on bochs VGA Show the coreboot bootsplash in qemu when running with bochs vga. By default the framebuffer will be initialized in 800x600@32. This can be overwriten by configuration. The same code does not work on the cirrus vga, as it only shows a white screen - more investigation will be required. This was tested in 1280x1024 by setting CONFIG_DRIVERS_EMULATION_QEMU_BOCHS_{X,Y}RES Change-Id: I4bec06d22423627e8f429c4b47e0dc9920f1464e Signed-off-by: Johanna Schander <coreboot(a)mimoja.de> --- M src/device/Kconfig M src/drivers/emulation/qemu/bochs.c 2 files changed, 18 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/34599/1 diff --git a/src/device/Kconfig b/src/device/Kconfig index e605bc2..75b25a1 100644 --- a/src/device/Kconfig +++ b/src/device/Kconfig @@ -392,18 +392,6 @@ default 0x11A if FRAMEBUFFER_VESA_MODE_11A default 0x11B if FRAMEBUFFER_VESA_MODE_11B default 0x118 if FRAMEBUFFER_VESA_MODE_USER - -config BOOTSPLASH - prompt "Show graphical bootsplash" - bool - help - This option shows a graphical bootsplash screen. The graphics are - loaded from the CBFS file bootsplash.jpg. - - You can either specify the location and file name of the - image in the 'General' section or add it manually to CBFS, using, - for example, cbfstool. - endif # FRAMEBUFFER_SET_VESA_MODE choice @@ -447,6 +435,21 @@ def_bool y depends on VBE_LINEAR_FRAMEBUFFER || GENERIC_LINEAR_FRAMEBUFFER +config BOOTSPLASH + prompt "Show graphical bootsplash" + bool + depends on LINEAR_FRAMEBUFFER + help + This option shows a graphical bootsplash screen. The graphics are + loaded from the CBFS file bootsplash.jpg. + + You can either specify the location and file name of the + image in the 'General' section or add it manually to CBFS, using, + for example, cbfstool. + + It might not be implemented for every framebuffer initialization platform. + + config LINEAR_FRAMEBUFFER_MAX_WIDTH int "Maximum width in pixels" depends on LINEAR_FRAMEBUFFER && MAINBOARD_USE_LIBGFXINIT diff --git a/src/drivers/emulation/qemu/bochs.c b/src/drivers/emulation/qemu/bochs.c index 22095ef..c15255e 100644 --- a/src/drivers/emulation/qemu/bochs.c +++ b/src/drivers/emulation/qemu/bochs.c @@ -15,6 +15,7 @@ #include <edid.h> #include <stdlib.h> #include <arch/io.h> +#include <bootsplash.h> #include <boot/coreboot_tables.h> #include <console/console.h> #include <device/device.h> @@ -122,6 +123,8 @@ edid.panel_bits_per_pixel = 24; edid_set_framebuffer_bits_per_pixel(&edid, 32, 0); set_vbe_mode_info_valid(&edid, addr); + if (CONFIG(BOOTSPLASH)) + set_bootsplash((unsigned char *)addr, width, height, 32); } static void bochs_init_text_mode(struct device *dev) -- To view, visit https://review.coreboot.org/c/coreboot/+/34599 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4bec06d22423627e8f429c4b47e0dc9920f1464e Gerrit-Change-Number: 34599 Gerrit-PatchSet: 1 Gerrit-Owner: Mimoja <coreboot(a)mimoja.de> Gerrit-MessageType: newchange

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Change in coreboot[master]: Add Razer Blade Stealth (2016) H2U
by Mimoja (Code Review) 15 Sep '19

15 Sep '19

Hello Alexander Couzens, Christoph Pomaska, Angel Pons, Jonathan Neuschäfer, Felix Singer, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/34475 to look at the new patch set (#40). Change subject: Add Razer Blade Stealth (2016) H2U ...................................................................... Add Razer Blade Stealth (2016) H2U The Razer Blade Stealth H2U is a KabyLake System using: - Intel KBL 7500U - ITE8528E SuperIO - Intel 600P Series NVMe SSD - Either four MT52L1G32D4PG (16GB) or MT52L512MB32D4PG (8GB) of soldered memory in dualchannel mode - (Optional) Touchscreen - HDMI 2.0a via DP-1: Paradetech PS175 - AlpineRidge Thunderbolt 3 controller - TPS65982 USB-PD power switch / multiplexer Even though it has a 16MB chip equipped (W25Q128.V) only the first 8MB are used and mapped via IFD. The rest is left empty (0xFF). The flash is not secured in any way and can be read via flashrom. It should be the source for this port's IFD and ME blobs. Working: - USB-A Ports left and right - Speakers - Touchscreen (USB) - Onboard Keyboard in Linux - NVMe SSD - SeaBIOS, Tianocore and Grub Payloads - Webcam - Powersaving Modes - Battery state and LID switch, sometimes slow to update. - Touchpad (I2C-HID) - Headphones Not part of this commit: - Thunderbolt / USB-C (Requires advanced EC signaling) - Full HDMI support (Currently requires plugged connection at boot) Change-Id: I7ede881d631e1863f07f5130f84bc3b8ca61a350 Signed-off-by: Johanna Schander <coreboot(a)mimoja.de> --- A src/mainboard/razer/Kconfig A src/mainboard/razer/Kconfig.name A src/mainboard/razer/blade_stealth_kbl/Kconfig A src/mainboard/razer/blade_stealth_kbl/Kconfig.name A src/mainboard/razer/blade_stealth_kbl/Makefile.inc A src/mainboard/razer/blade_stealth_kbl/acpi/ac.asl A src/mainboard/razer/blade_stealth_kbl/acpi/battery.asl A src/mainboard/razer/blade_stealth_kbl/acpi/ec.asl A src/mainboard/razer/blade_stealth_kbl/acpi/mainboard.asl A src/mainboard/razer/blade_stealth_kbl/acpi/superio.asl A src/mainboard/razer/blade_stealth_kbl/acpi_tables.c A src/mainboard/razer/blade_stealth_kbl/board_info.txt A src/mainboard/razer/blade_stealth_kbl/devicetree.cb A src/mainboard/razer/blade_stealth_kbl/dsdt.asl A src/mainboard/razer/blade_stealth_kbl/gma-mainboard.ads A src/mainboard/razer/blade_stealth_kbl/gpio.h A src/mainboard/razer/blade_stealth_kbl/hda_verb.c A src/mainboard/razer/blade_stealth_kbl/mainboard.c A src/mainboard/razer/blade_stealth_kbl/ramstage.c A src/mainboard/razer/blade_stealth_kbl/romstage.c A src/mainboard/razer/blade_stealth_kbl/spd/Makefile.inc A src/mainboard/razer/blade_stealth_kbl/spd/micron_dimm_MT52L1G32D4PG-107.spd.hex A src/mainboard/razer/blade_stealth_kbl/spd/micron_dimm_MT52L512M32D2PF-107.spd.hex A src/mainboard/razer/blade_stealth_kbl/spd/spd.h A src/mainboard/razer/blade_stealth_kbl/spd/spd_util.c 25 files changed, 1,268 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/34475/40 -- To view, visit https://review.coreboot.org/c/coreboot/+/34475 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7ede881d631e1863f07f5130f84bc3b8ca61a350 Gerrit-Change-Number: 34475 Gerrit-PatchSet: 40 Gerrit-Owner: Mimoja <coreboot(a)mimoja.de> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christoph Pomaska <github(a)aufmachen.jetzt> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Mimoja <coreboot(a)mimoja.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/amd/common: Remove Picasso display HDA from list
by Marshall Dawson (Code Review) 15 Sep '19

15 Sep '19

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35272 ) Change subject: soc/amd/common: Remove Picasso display HDA from list ...................................................................... soc/amd/common: Remove Picasso display HDA from list Change-Id: I306a806dc510e3a4ee3d9c0663306dc93b1d936d Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- M src/soc/amd/common/block/hda/hda.c 1 file changed, 0 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/35272/1 diff --git a/src/soc/amd/common/block/hda/hda.c b/src/soc/amd/common/block/hda/hda.c index 49fc1a6..df3dc5e 100644 --- a/src/soc/amd/common/block/hda/hda.c +++ b/src/soc/amd/common/block/hda/hda.c @@ -21,7 +21,6 @@ static const unsigned short pci_device_ids[] = { PCI_DEVICE_ID_AMD_SB900_HDA, PCI_DEVICE_ID_AMD_CZ_HDA, - PCI_DEVICE_ID_AMD_PCO_HDA0, PCI_DEVICE_ID_AMD_PCO_HDA1, 0 }; -- To view, visit https://review.coreboot.org/c/coreboot/+/35272 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I306a806dc510e3a4ee3d9c0663306dc93b1d936d Gerrit-Change-Number: 35272 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-MessageType: newchange

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Change in gerrit-avatars[master]: Add my avatar
by Patrick Georgi (Code Review) 14 Sep '19

14 Sep '19

Patrick Georgi has uploaded this change for review. ( https://review.coreboot.org/c/gerrit-avatars/+/35407 ) Change subject: Add my avatar ...................................................................... Add my avatar Signed-off-by: Patrick Georgi <patrick(a)georgi.software> Change-Id: Ibba3d2af05a92e9c644b531ee252aa7bd8d5cdb3 --- A 1000000.jpg 1 file changed, 0 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/gerrit-avatars refs/changes/07/35407/1 diff --git a/1000000.jpg b/1000000.jpg new file mode 100644 index 0000000..f9c6bc2 --- /dev/null +++ b/1000000.jpg Binary files differ -- To view, visit https://review.coreboot.org/c/gerrit-avatars/+/35407 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: gerrit-avatars Gerrit-Branch: master Gerrit-Change-Id: Ibba3d2af05a92e9c644b531ee252aa7bd8d5cdb3 Gerrit-Change-Number: 35407 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: newchange

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coreboot-gerrit September 2019