coreboot-gerrit June 2019

coreboot-gerrit@coreboot.org

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1454 discussions

Change in ...coreboot[master]: cpu/intel/speedstep: Add Netburst
by HAOUAS Elyes (Code Review) 30 Jun '19

30 Jun '19

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/22604 ) Change subject: cpu/intel/speedstep: Add Netburst ...................................................................... Patch Set 73: Code-Review-1 -- To view, visit https://review.coreboot.org/c/coreboot/+/22604 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I06e162d3260dedeb3b16583460633507fbcbd52a Gerrit-Change-Number: 22604 Gerrit-PatchSet: 73 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 30 Jun 2019 10:29:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: src/cpu/intel: Add model_f6x
by HAOUAS Elyes (Code Review) 30 Jun '19

30 Jun '19

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/25565 ) Change subject: src/cpu/intel: Add model_f6x ...................................................................... Patch Set 31: Code-Review-1 -- To view, visit https://review.coreboot.org/c/coreboot/+/25565 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6003ec0f4d4245ce5fc9c1f38e555bfcfa1c22b5 Gerrit-Change-Number: 25565 Gerrit-PatchSet: 31 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Sun, 30 Jun 2019 10:29:09 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: device/pci_rom: Fix redundant pci_rom_probe() calls
by Patrick Rudolph (Code Review) 30 Jun '19

30 Jun '19

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33909 ) Change subject: device/pci_rom: Fix redundant pci_rom_probe() calls ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/33909 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0ea893a9ac7ba480840ebf5570d8fe0d9e20938f Gerrit-Change-Number: 33909 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Mike Banon <mikebdp2(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 30 Jun 2019 10:28:19 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: [WIP] add i945G based mainboard
by HAOUAS Elyes (Code Review) 30 Jun '19

30 Jun '19

Hello Kyösti Mälkki, Patrick Rudolph, Arthur Heymans, Idwer Vollering, Paul Menzel, build bot (Jenkins), Nico Huber, Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/25509 to look at the new patch set (#28). Change subject: [WIP] add i945G based mainboard ...................................................................... [WIP] add i945G based mainboard 82945GC - 82801Gx - W83627EHG CPU: CPUID 0f65.Mmicrocode loaded correctly. DDR2: Supports Up to 4 DIMM. S3: working properly. Issues: 1) It will not boot when using RAM 533MHz. I believe that there is a problem with time/clock or something related to clock when RAM 533 is used. 2) It will not boot if channel 0 is not populated at all. 3) HWM is not working. The FAN is running at high speed. Change-Id: I5398b990c26d087afb20e4b1028a7a1cad4b3ee3 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- A src/mainboard/nec/945g-m4/Kconfig A src/mainboard/nec/945g-m4/Kconfig.name A src/mainboard/nec/945g-m4/Makefile.inc A src/mainboard/nec/945g-m4/acpi/ec.asl A src/mainboard/nec/945g-m4/acpi/ich7_pci_irqs.asl A src/mainboard/nec/945g-m4/acpi/mainboard.asl A src/mainboard/nec/945g-m4/acpi/platform.asl A src/mainboard/nec/945g-m4/acpi/superio.asl A src/mainboard/nec/945g-m4/acpi/thermal.asl A src/mainboard/nec/945g-m4/acpi/video.asl A src/mainboard/nec/945g-m4/acpi_tables.c A src/mainboard/nec/945g-m4/board_info.txt A src/mainboard/nec/945g-m4/cmos.default A src/mainboard/nec/945g-m4/cmos.layout A src/mainboard/nec/945g-m4/cstates.c A src/mainboard/nec/945g-m4/devicetree.cb A src/mainboard/nec/945g-m4/dsdt.asl A src/mainboard/nec/945g-m4/gpio.c A src/mainboard/nec/945g-m4/hda_verb.c A src/mainboard/nec/945g-m4/mainboard.c A src/mainboard/nec/945g-m4/romstage.c A src/mainboard/nec/945g-m4/superio_hwm.c A src/mainboard/nec/945g-m4/superio_hwm.h A src/mainboard/nec/Kconfig A src/mainboard/nec/Kconfig.name M src/northbridge/intel/i945/early_init.c M src/northbridge/intel/i945/gma.c 27 files changed, 1,416 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/25509/28 -- To view, visit https://review.coreboot.org/c/coreboot/+/25509 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5398b990c26d087afb20e4b1028a7a1cad4b3ee3 Gerrit-Change-Number: 25509 Gerrit-PatchSet: 28 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: device/pci_rom: Fix on-board optionrom address
by Patrick Rudolph (Code Review) 30 Jun '19

30 Jun '19

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33908 ) Change subject: device/pci_rom: Fix on-board optionrom address ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/33908 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I14374954af09201494bf2f13e5a6e4dc640c05ee Gerrit-Change-Number: 33908 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Mike Banon <mikebdp2(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 30 Jun 2019 10:24:36 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: [NOTFORMERGE] PCI accessor testcases
by Kyösti Mälkki (Code Review) 30 Jun '19

30 Jun '19

Kyösti Mälkki has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/31811 ) Change subject: [NOTFORMERGE] PCI accessor testcases ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/31811 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0ca4d5556d2ac80986a909cf4df029ee575f3940 Gerrit-Change-Number: 31811 Gerrit-PatchSet: 4 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: abandon

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Change in ...coreboot[master]: sb/intel/lynxpoint/acpi: Use get_acpi_table_revision(SSDT)
by HAOUAS Elyes (Code Review) 30 Jun '19

30 Jun '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33576 Change subject: sb/intel/lynxpoint/acpi: Use get_acpi_table_revision(SSDT) ...................................................................... sb/intel/lynxpoint/acpi: Use get_acpi_table_revision(SSDT) Change-Id: Ia735267010ec6d3532217cf2a805bd1d3c9371e1 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/southbridge/intel/lynxpoint/acpi.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/33576/1 diff --git a/src/southbridge/intel/lynxpoint/acpi.c b/src/southbridge/intel/lynxpoint/acpi.c index 8d4c4e6..83c455f 100644 --- a/src/southbridge/intel/lynxpoint/acpi.c +++ b/src/southbridge/intel/lynxpoint/acpi.c @@ -74,7 +74,7 @@ /* Fill the SSDT header */ memset((void *)ssdt, 0, sizeof(acpi_header_t)); memcpy(&ssdt->signature, "SSDT", 4); - ssdt->revision = 2; + ssdt->revision = get_acpi_table_revision(SSDT); memcpy(&ssdt->oem_id, OEM_ID, 6); memcpy(&ssdt->oem_table_id, "SERIALIO", 8); ssdt->oem_revision = 43; -- To view, visit https://review.coreboot.org/c/coreboot/+/33576 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia735267010ec6d3532217cf2a805bd1d3c9371e1 Gerrit-Change-Number: 33576 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: {mb,sb}/fadt.c: Use sizeof(acpi_fadt_t) for header length
by HAOUAS Elyes (Code Review) 30 Jun '19

30 Jun '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33429 Change subject: {mb,sb}/fadt.c: Use sizeof(acpi_fadt_t) for header length ...................................................................... {mb,sb}/fadt.c: Use sizeof(acpi_fadt_t) for header length Change-Id: I671daab8a654b690cec4c872e800b196f7975b9d Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/amd/serengeti_cheetah_fam10/fadt.c M src/mainboard/amd/torpedo/fadt.c M src/southbridge/amd/sb700/fadt.c M src/southbridge/amd/sb800/fadt.c M src/southbridge/intel/i82371eb/fadt.c M src/southbridge/nvidia/ck804/fadt.c 6 files changed, 6 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/33429/1 diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/fadt.c b/src/mainboard/amd/serengeti_cheetah_fam10/fadt.c index 845af71..9f6d48c 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/fadt.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/fadt.c @@ -35,7 +35,7 @@ /* Prepare the header */ memset((void *)fadt,0,sizeof(acpi_fadt_t)); memcpy(header->signature,"FACP",4); - header->length = 244; + header->length = sizeof(acpi_fadt_t); header->revision = get_acpi_table_revision(FADT); memcpy(header->oem_id,OEM_ID,6); memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); diff --git a/src/mainboard/amd/torpedo/fadt.c b/src/mainboard/amd/torpedo/fadt.c index 9e33c07..3400fcb 100644 --- a/src/mainboard/amd/torpedo/fadt.c +++ b/src/mainboard/amd/torpedo/fadt.c @@ -49,7 +49,7 @@ /* Prepare the header */ memset((void *)fadt, 0, sizeof(acpi_fadt_t)); memcpy(header->signature, "FACP", 4); - header->length = 244; + header->length = sizeof(acpi_fadt_t); header->revision = 1; memcpy(header->oem_id, OEM_ID, 6); memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); diff --git a/src/southbridge/amd/sb700/fadt.c b/src/southbridge/amd/sb700/fadt.c index 4a5746c..c81e644 100644 --- a/src/southbridge/amd/sb700/fadt.c +++ b/src/southbridge/amd/sb700/fadt.c @@ -36,7 +36,7 @@ /* Prepare the header */ memset((void *)fadt, 0, sizeof(acpi_fadt_t)); memcpy(header->signature, "FACP", 4); - header->length = 244; + header->length = sizeof(acpi_fadt_t); header->revision = get_acpi_table_revision(FADT); memcpy(header->oem_id, OEM_ID, 6); memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); diff --git a/src/southbridge/amd/sb800/fadt.c b/src/southbridge/amd/sb800/fadt.c index 71bdf23..acda6db 100644 --- a/src/southbridge/amd/sb800/fadt.c +++ b/src/southbridge/amd/sb800/fadt.c @@ -36,7 +36,7 @@ /* Prepare the header */ memset((void *)fadt, 0, sizeof(acpi_fadt_t)); memcpy(header->signature, "FACP", 4); - header->length = 244; + header->length = sizeof(acpi_fadt_t); header->revision = get_acpi_table_revision(FADT); memcpy(header->oem_id, OEM_ID, 6); memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); diff --git a/src/southbridge/intel/i82371eb/fadt.c b/src/southbridge/intel/i82371eb/fadt.c index 9515c01..7669761 100644 --- a/src/southbridge/intel/i82371eb/fadt.c +++ b/src/southbridge/intel/i82371eb/fadt.c @@ -38,7 +38,7 @@ memset((void *) fadt, 0, sizeof(acpi_fadt_t)); memcpy(header->signature, "FACP", 4); - header->length = 244; + header->length = sizeof(acpi_fadt_t); header->revision = 1; memcpy(header->oem_id, OEM_ID, 6); memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); diff --git a/src/southbridge/nvidia/ck804/fadt.c b/src/southbridge/nvidia/ck804/fadt.c index f6ad479..ee0adf4 100644 --- a/src/southbridge/nvidia/ck804/fadt.c +++ b/src/southbridge/nvidia/ck804/fadt.c @@ -34,7 +34,7 @@ memset((void *)fadt, 0, sizeof(acpi_fadt_t)); memcpy(header->signature, "FACP", 4); #ifdef LONG_FADT - header->length = 244; + header->length = sizeof(acpi_fadt_t); header->revision = get_acpi_table_revision(FADT); #else header->length = 0x74; -- To view, visit https://review.coreboot.org/c/coreboot/+/33429 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I671daab8a654b690cec4c872e800b196f7975b9d Gerrit-Change-Number: 33429 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: util/superiotool/nuvoton.c: add NCT5539D register dump
by Pavel Sayekat (Code Review) 30 Jun '19

30 Jun '19

Pavel Sayekat has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33421 Change subject: util/superiotool/nuvoton.c: add NCT5539D register dump ...................................................................... util/superiotool/nuvoton.c: add NCT5539D register dump Values taken from NCT5539D datasheet V1.1 (June 30th, 2015). Tested on ASUS-H110M-E/M.2 mainboard. Signed-off-by: pavelsayekat <pavelsayekat(a)gmail.com> Change-Id: Ib55068035ca574b22d0fea81e1a291f7cf0329d3 --- M util/superiotool/nuvoton.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/33421/1 diff --git a/util/superiotool/nuvoton.c b/util/superiotool/nuvoton.c index 01d195c..f79b2e2 100644 --- a/util/superiotool/nuvoton.c +++ b/util/superiotool/nuvoton.c @@ -582,7 +582,7 @@ {0x30,0xe0,0xe1,0xe2,0xe3,EOT}, {0x20,0x20,0x04,0x05,0x01,EOT}}, {EOT}}}, - {0xd121, "NCT5539D (not all LDNs supported)", { + {0xd121, "NCT5539D", { {NOLDN, NULL, {0x07,0x10,0x11,0x13,0x14,0x1a,0x1b,0x1c,0x1d,0x20,0x21,0x22,0x24,0x25,0x26,0x27,0x28,0x2a,0x2b,0x2c,0x2d,0x2f,EOT}, {0x00,0xff,0xff,0x00,0x00,0x30,0x50,0x10,0x00,0xd1,0x21,0xff,0x04,0x00,MISC,0x03,0x00,0xc0,0x00,0x01,MISC,MISC,EOT}}, -- To view, visit https://review.coreboot.org/c/coreboot/+/33421 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib55068035ca574b22d0fea81e1a291f7cf0329d3 Gerrit-Change-Number: 33421 Gerrit-PatchSet: 1 Gerrit-Owner: Pavel Sayekat Gerrit-MessageType: newchange

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Change in ...coreboot[master]: device/pci_rom: Fix redundant pci_rom_probe() calls
by Kyösti Mälkki (Code Review) 30 Jun '19

30 Jun '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33909 ) Change subject: device/pci_rom: Fix redundant pci_rom_probe() calls ...................................................................... Patch Set 1: I don't have a good testcase, just came across this in some logs sent to me. -- To view, visit https://review.coreboot.org/c/coreboot/+/33909 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0ea893a9ac7ba480840ebf5570d8fe0d9e20938f Gerrit-Change-Number: 33909 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Mike Banon <mikebdp2(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Sun, 30 Jun 2019 04:07:58 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit June 2019