Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33859
Change subject: Kconfig: Enable RAMPAYLOAD for x86
......................................................................
Kconfig: Enable RAMPAYLOAD for x86
This patch makes CONFIG_RAMPAYLOAD default enable upon selection
of HAVE_RAMPAYLOAD kconfig from mainboard for x86 platform.
Without this CL, CONFIG_RAMPAYLOAD is still disable although
mainboard has selected CONFIG_HAVE_RAMPAYLOAD.
Change-Id: I40308bbf970a0dbe5f7e2086ed8a7a70c2a3a32c
Signed-off-by: Subrata Banik <subrata.banik(a)intel.com>
---
M src/Kconfig
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/33859/1
diff --git a/src/Kconfig b/src/Kconfig
index 72d826f..919d257 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -290,7 +290,7 @@
config RAMPAYLOAD
bool "Enable coreboot flow without executing ramstage"
- default n
+ default y if ARCH_X86
depends on HAVE_RAMPAYLOAD
help
If this option is enabled, coreboot flow will skip ramstage
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I40308bbf970a0dbe5f7e2086ed8a7a70c2a3a32c
Gerrit-Change-Number: 33859
Gerrit-PatchSet: 1
Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com>
Gerrit-MessageType: newchange
Frans Hendriks has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33415
Change subject: security/tpm/tss/tcg-2.0/tss.c: Add debug message to tlcl_lib_init()
......................................................................
security/tpm/tss/tcg-2.0/tss.c: Add debug message to tlcl_lib_init()
No message is reported in tlcl_lib_init() when tis_init() or tis_open()
returned an error value.
Add debug string.
BUG=N/A
TEST=Build binary and verified logging on Facebook FBG-1701
Change-Id: I522e488ddd3a1bd94a1a8c8470c757bd79c6d5c5
Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com>
---
M src/security/tpm/tss/tcg-2.0/tss.c
1 file changed, 7 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/33415/1
diff --git a/src/security/tpm/tss/tcg-2.0/tss.c b/src/security/tpm/tss/tcg-2.0/tss.c
index e579bff..c4b5538 100644
--- a/src/security/tpm/tss/tcg-2.0/tss.c
+++ b/src/security/tpm/tss/tcg-2.0/tss.c
@@ -181,10 +181,15 @@
if (done)
return VB2_SUCCESS;
- if (tis_init())
+ if (tis_init()) {
+ printk(BIOS_ERR, "%s: tis_init returned error\n", __func__);
return VB2_ERROR_UNKNOWN;
- if (tis_open())
+ }
+
+ if (tis_open()) {
+ printk(BIOS_ERR, "%s: tis_open returned error\n", __func__);
return VB2_ERROR_UNKNOWN;
+ }
car_set_var(tlcl_init_done, 1);
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I522e488ddd3a1bd94a1a8c8470c757bd79c6d5c5
Gerrit-Change-Number: 33415
Gerrit-PatchSet: 1
Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com>
Gerrit-MessageType: newchange