coreboot-gerrit June 2019

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Change in ...coreboot[master]: drivers/ipmi: Fix coding style
by Patrick Rudolph (Code Review) 16 Jun '19

16 Jun '19

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33492 Change subject: drivers/ipmi: Fix coding style ...................................................................... drivers/ipmi: Fix coding style Fix 'do not use assignment in if condition'. Change-Id: I6e1b81a1b87de4315391618968c59cc3d3a66a77 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/drivers/ipmi/ipmi_kcs.c 1 file changed, 12 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/33492/1 diff --git a/src/drivers/ipmi/ipmi_kcs.c b/src/drivers/ipmi/ipmi_kcs.c index 8d106837..d17a1f9 100644 --- a/src/drivers/ipmi/ipmi_kcs.c +++ b/src/drivers/ipmi/ipmi_kcs.c @@ -144,34 +144,40 @@ { int ret; - if ((ret = ipmi_kcs_send_cmd_byte(port, IPMI_KCS_START_WRITE))) { + ret = ipmi_kcs_send_cmd_byte(port, IPMI_KCS_START_WRITE); + if (ret) { printk(BIOS_ERR, "IPMI START WRITE failed\n"); return ret; } - if ((ret = ipmi_kcs_send_data_byte(port, (netfn << 2) | (lun & 3)))) { + ret = ipmi_kcs_send_data_byte(port, (netfn << 2) | (lun & 3)); + if (ret) { printk(BIOS_ERR, "IPMI NETFN failed\n"); return ret; } - if ((ret = ipmi_kcs_send_data_byte(port, cmd))) { + ret = ipmi_kcs_send_data_byte(port, cmd); + if (ret) { printk(BIOS_ERR, "IPMI CMD failed\n"); return ret; } while (len-- > 1) { - if ((ret = ipmi_kcs_send_data_byte(port, *msg++))) { + ret = ipmi_kcs_send_data_byte(port, *msg++); + if (ret) { printk(BIOS_ERR, "IPMI BYTE WRITE failed\n"); return ret; } } - if ((ret = ipmi_kcs_send_cmd_byte(port, IPMI_KCS_END_WRITE))) { + ret = ipmi_kcs_send_cmd_byte(port, IPMI_KCS_END_WRITE); + if (ret) { printk(BIOS_ERR, "IPMI END WRITE failed\n"); return ret; } - if ((ret = ipmi_kcs_send_last_data_byte(port, *msg++))) { + ret = ipmi_kcs_send_last_data_byte(port, *msg++); + if (ret) { printk(BIOS_ERR, "IPMI BYTE WRITE failed\n"); return ret; } -- To view, visit https://review.coreboot.org/c/coreboot/+/33492 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6e1b81a1b87de4315391618968c59cc3d3a66a77 Gerrit-Change-Number: 33492 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: [test] -Wlogical-op
by HAOUAS Elyes (Code Review) 16 Jun '19

16 Jun '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33359 Change subject: [test] -Wlogical-op ...................................................................... [test] -Wlogical-op Change-Id: I15e2d816eaf8e7d0f32d3dfc737c4d2ab9170069 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M Makefile.inc 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/33359/1 diff --git a/Makefile.inc b/Makefile.inc index 81f6b3b..d499be3 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -400,7 +400,7 @@ CFLAGS_common += -pipe -g -nostdinc -std=gnu11 CFLAGS_common += -nostdlib -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes -CFLAGS_common += -Wwrite-strings -Wredundant-decls -Wno-trigraphs +CFLAGS_common += -Wwrite-strings -Wredundant-decls -Wno-trigraphs -Wlogical-op CFLAGS_common += -Wstrict-aliasing -Wshadow -Wdate-time -Wtype-limits CFLAGS_common += -fno-common -ffreestanding -fno-builtin -fomit-frame-pointer CFLAGS_common += -ffunction-sections -fdata-sections -fno-pie -- To view, visit https://review.coreboot.org/c/coreboot/+/33359 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I15e2d816eaf8e7d0f32d3dfc737c4d2ab9170069 Gerrit-Change-Number: 33359 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: src/mb/gigabyte/ga-h61m-s2pv: Correct devicetree
by Angel Pons (Code Review) 16 Jun '19

16 Jun '19

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33522 ) Change subject: src/mb/gigabyte/ga-h61m-s2pv: Correct devicetree ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/#/c/33522/2/src/mainboard/gigabyte/ga-h61m-s2pv… File src/mainboard/gigabyte/ga-h61m-s2pv/devicetree.cb: https://review.coreboot.org/#/c/33522/2/src/mainboard/gigabyte/ga-h61m-s2pv… PS2, Line 96: irq 0xf1 = 0x40 > Ack, it seems the PNP_MSCx are only necessary for warnings when […] Right now it's "vendor used this, if I use it I don't think anything will short out". Not ideal, most of these don't make much sense. At least this isn't using 'io' on the wrong places anymore ('io' sets two bytes). -- To view, visit https://review.coreboot.org/c/coreboot/+/33522 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ieb9dd8c835bc3652e7a3a118feca5551196bb81b Gerrit-Change-Number: 33522 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 16 Jun 2019 11:26:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in ...coreboot[master]: src/mb/gigabyte/ga-h61m-s2pv: Correct devicetree
by Nico Huber (Code Review) 16 Jun '19

16 Jun '19

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33522 ) Change subject: src/mb/gigabyte/ga-h61m-s2pv: Correct devicetree ...................................................................... Patch Set 2: Code-Review+1 (1 comment) https://review.coreboot.org/#/c/33522/2/src/mainboard/gigabyte/ga-h61m-s2pv… File src/mainboard/gigabyte/ga-h61m-s2pv/devicetree.cb: https://review.coreboot.org/#/c/33522/2/src/mainboard/gigabyte/ga-h61m-s2pv… PS2, Line 96: irq 0xf1 = 0x40 > I asked superiotool and these irq settings have been set as described here. Ack, it seems the PNP_MSCx are only necessary for warnings when they are left unset. Though, it would be nice to have a comment for each non-standard register here about what you set. -- To view, visit https://review.coreboot.org/c/coreboot/+/33522 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ieb9dd8c835bc3652e7a3a118feca5551196bb81b Gerrit-Change-Number: 33522 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 16 Jun 2019 11:01:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in ...coreboot[master]: src/mb/gigabyte/ga-h61m-s2pv: Correct devicetree
by Angel Pons (Code Review) 16 Jun '19

16 Jun '19

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33522 ) Change subject: src/mb/gigabyte/ga-h61m-s2pv: Correct devicetree ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/#/c/33522/2/src/mainboard/gigabyte/ga-h61m-s2pv… File src/mainboard/gigabyte/ga-h61m-s2pv/devicetree.cb: https://review.coreboot.org/#/c/33522/2/src/mainboard/gigabyte/ga-h61m-s2pv… PS2, Line 96: irq 0xf1 = 0x40 > I don't think these fake `irq` settings work, can you test? […] I asked superiotool and these irq settings have been set as described here. -- To view, visit https://review.coreboot.org/c/coreboot/+/33522 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ieb9dd8c835bc3652e7a3a118feca5551196bb81b Gerrit-Change-Number: 33522 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 16 Jun 2019 10:52:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in ...coreboot[master]: src/mb/gigabyte/ga-h61m-s2pv: Correct devicetree
by Nico Huber (Code Review) 16 Jun '19

16 Jun '19

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33522 ) Change subject: src/mb/gigabyte/ga-h61m-s2pv: Correct devicetree ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/#/c/33522/2/src/mainboard/gigabyte/ga-h61m-s2pv… File src/mainboard/gigabyte/ga-h61m-s2pv/devicetree.cb: https://review.coreboot.org/#/c/33522/2/src/mainboard/gigabyte/ga-h61m-s2pv… PS2, Line 96: irq 0xf1 = 0x40 I don't think these fake `irq` settings work, can you test? For the usual miscellaneous registers 0xf0..0xfe, we have specific hints in the code `PNP_MSC0..PNP_MSCE` but not even the `PNP_MSC1` flag for 0xf1 is set for this LDN. I think for the global registers it is worth to add `chip.h` settings and write readable init code. Don't know what to do about 0xcb. GPIO settings shouldn't this cryptic, though. -- To view, visit https://review.coreboot.org/c/coreboot/+/33522 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ieb9dd8c835bc3652e7a3a118feca5551196bb81b Gerrit-Change-Number: 33522 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 16 Jun 2019 10:24:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: src/mb/gigabyte/ga-h61m-s2pv: Correct devicetree
by Arthur Heymans (Code Review) 16 Jun '19

16 Jun '19

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33522 ) Change subject: src/mb/gigabyte/ga-h61m-s2pv: Correct devicetree ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/33522 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ieb9dd8c835bc3652e7a3a118feca5551196bb81b Gerrit-Change-Number: 33522 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 16 Jun 2019 09:30:21 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: mb/lenovo/t420s/smihandler: Remove unused include
by Peter Lemenkov (Code Review) 16 Jun '19

16 Jun '19

Peter Lemenkov has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33510 Change subject: mb/lenovo/t420s/smihandler: Remove unused include ...................................................................... mb/lenovo/t420s/smihandler: Remove unused include All usage of pci_read_config8 was removed in commit d44d4f0f with Change-Id Ia959eb5b747846048396e66d4c926c96c27f3878 ("mb/lenovo/*: Remove useless smihandler code"). So we don't need this include anymore. Change-Id: Ic4f038c80e17799016ae7e92a5675cfe7c71e400 Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> --- M src/mainboard/lenovo/t420s/smihandler.c 1 file changed, 0 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/33510/1 diff --git a/src/mainboard/lenovo/t420s/smihandler.c b/src/mainboard/lenovo/t420s/smihandler.c index 2713725..bc72a12 100644 --- a/src/mainboard/lenovo/t420s/smihandler.c +++ b/src/mainboard/lenovo/t420s/smihandler.c @@ -16,7 +16,6 @@ */ #include <arch/io.h> -#include <device/pci_ops.h> #include <console/console.h> #include <cpu/x86/smm.h> #include <ec/acpi/ec.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/33510 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic4f038c80e17799016ae7e92a5675cfe7c71e400 Gerrit-Change-Number: 33510 Gerrit-PatchSet: 1 Gerrit-Owner: Peter Lemenkov <lemenkov(a)gmail.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: soc/intel/common: Fix booting issue without default IGD enabled
by Subrata Banik (Code Review) 16 Jun '19

16 Jun '19

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33449 Change subject: soc/intel/common: Fix booting issue without default IGD enabled ...................................................................... soc/intel/common: Fix booting issue without default IGD enabled This patch ensures to boot platform without onboard GFX (PCI B0:D2:F0) enabled. TEST=Previously platform was dying at "GMADR is not programmed!" with IGD disabled. Change-Id: I8c907ee25db4538a84890f2ccc3187afa86604b8 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/soc/intel/common/block/graphics/graphics.c 1 file changed, 21 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/33449/1 diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c index 4cea21b..ed9ae00 100644 --- a/src/soc/intel/common/block/graphics/graphics.c +++ b/src/soc/intel/common/block/graphics/graphics.c @@ -33,15 +33,18 @@ pci_dev_init(dev); } -static uintptr_t graphics_get_bar(unsigned long index) +static int is_graphics_disabled(struct device *dev) { - struct device *dev = SA_DEV_IGD; - struct resource *gm_res; - assert(dev != NULL); - /* Check if Graphics PCI device is disabled */ if (!dev || !dev->enabled) - return 0; + return 1; + + return 0; +} + +static uintptr_t graphics_get_bar(struct device *dev, unsigned long index) +{ + struct resource *gm_res; gm_res = find_resource(dev, index); if (!gm_res) @@ -52,11 +55,16 @@ uintptr_t graphics_get_memory_base(void) { + uintptr_t memory_base; + struct device *dev = SA_DEV_IGD; + + if (is_graphics_disabled(dev)) + return 0; /* * GFX PCI config space offset 0x18 know as Graphics * Memory Range Address (GMADR) */ - uintptr_t memory_base = graphics_get_bar(PCI_BASE_ADDRESS_2); + memory_base = graphics_get_bar(dev, PCI_BASE_ADDRESS_2); if (!memory_base) die_with_post_code(POST_HW_INIT_FAILURE, "GMADR is not programmed!"); @@ -66,14 +74,18 @@ static uintptr_t graphics_get_gtt_base(void) { + static uintptr_t gtt_base; + struct device *dev = SA_DEV_IGD; + + if (is_graphics_disabled(dev)) + die("IGD is disabled!"); /* * GFX PCI config space offset 0x10 know as Graphics * Translation Table Memory Mapped Range Address * (GTTMMADR) */ - static uintptr_t gtt_base; if (!gtt_base) { - gtt_base = graphics_get_bar(PCI_BASE_ADDRESS_0); + gtt_base = graphics_get_bar(dev, PCI_BASE_ADDRESS_0); if (!gtt_base) die_with_post_code(POST_HW_INIT_FAILURE, "GTTMMADR is not programmed!"); -- To view, visit https://review.coreboot.org/c/coreboot/+/33449 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8c907ee25db4538a84890f2ccc3187afa86604b8 Gerrit-Change-Number: 33449 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: add kasan init
by Abdullah Zafar (Code Review) 16 Jun '19

16 Jun '19

Abdullah Zafar has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/33352 ) Change subject: add kasan init ...................................................................... Abandoned added to newer patch -- To view, visit https://review.coreboot.org/c/coreboot/+/33352 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iadb4b15a542392793acfb24609ae6ff1832962ca Gerrit-Change-Number: 33352 Gerrit-PatchSet: 1 Gerrit-Owner: Abdullah Zafar <abdullahzafar4876(a)yahoo.com> Gerrit-Reviewer: Abdullah Zafar <abdullahzafar4876(a)yahoo.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: abandon

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coreboot-gerrit June 2019