coreboot-gerrit May 2019

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Change in ...coreboot[master]: nb/intel/x4x/early_init.c: Remove variable set but not used
by HAOUAS Elyes (Code Review) 23 May '19

23 May '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32896 Change subject: nb/intel/x4x/early_init.c: Remove variable set but not used ...................................................................... nb/intel/x4x/early_init.c: Remove variable set but not used Change-Id: I8d0ab8bdc506592ef1d731e557b2397481aed725 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/northbridge/intel/x4x/early_init.c 1 file changed, 6 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/32896/1 diff --git a/src/northbridge/intel/x4x/early_init.c b/src/northbridge/intel/x4x/early_init.c index d019ffd..a58f2ba 100644 --- a/src/northbridge/intel/x4x/early_init.c +++ b/src/northbridge/intel/x4x/early_init.c @@ -150,7 +150,6 @@ static void init_dmi(void) { u32 reg32; - u16 reg16; /* Assume IGD present */ @@ -224,9 +223,11 @@ /* ASPM on DMI link */ RCBA16(0x1a8) &= ~0x3; - reg16 = RCBA16(0x1a8); + /* FIXME: Do we need to read RCBA16(0x1a8)? */ + RCBA16(0x1a8); RCBA32(0x2010) = (RCBA32(0x2010) & ~(0x3 << 10)) | (1 << 10); - reg32 = RCBA32(0x2010); + /* FIXME: Do we need to read RCBA32(0x2010)? */ + RCBA32(0x2010); /* Set up VC1 max time */ RCBA32(0x1c) = (RCBA32(0x1c) & ~0x7f0000) | 0x120000; @@ -240,7 +241,8 @@ DMIBAR16(0x210) = (DMIBAR16(0x210) & ~(0xff7)) | 0x101; DMIBAR32(0x88) &= ~0x3; DMIBAR32(0x88) |= 0x3; - reg16 = DMIBAR16(0x88); + /* FIXME: Do we need to read RCBA16(0x88)? */ + DMIBAR16(0x88); } static void x4x_prepare_resume(int s3resume) -- To view, visit https://review.coreboot.org/c/coreboot/+/32896 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8d0ab8bdc506592ef1d731e557b2397481aed725 Gerrit-Change-Number: 32896 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: nb/intel/haswell: Remove variable set but not used
by HAOUAS Elyes (Code Review) 23 May '19

23 May '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32895 Change subject: nb/intel/haswell: Remove variable set but not used ...................................................................... nb/intel/haswell: Remove variable set but not used Change-Id: I4e7f74f67f03131fae205a93dae3d61eca9cc0c7 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/northbridge/intel/haswell/raminit.c 1 file changed, 3 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/32895/1 diff --git a/src/northbridge/intel/haswell/raminit.c b/src/northbridge/intel/haswell/raminit.c index 050dbd1..713692f 100644 --- a/src/northbridge/intel/haswell/raminit.c +++ b/src/northbridge/intel/haswell/raminit.c @@ -185,7 +185,7 @@ void setup_sdram_meminfo(struct pei_data *pei_data) { - u32 addr_decoder_common, addr_decode_ch[2]; + u32 addr_decode_ch[2]; struct memory_info* mem_info; struct dimm_info *dimm; int ddr_frequency; @@ -198,7 +198,8 @@ die("Failed to add memory info to CBMEM.\n"); memset(mem_info, 0, sizeof(struct memory_info)); - addr_decoder_common = MCHBAR32(0x5000); + /* FIXME: Do we need to read MCHBAR32(0x5000) ? */ + MCHBAR32(0x5000); addr_decode_ch[0] = MCHBAR32(0x5004); addr_decode_ch[1] = MCHBAR32(0x5008); -- To view, visit https://review.coreboot.org/c/coreboot/+/32895 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4e7f74f67f03131fae205a93dae3d61eca9cc0c7 Gerrit-Change-Number: 32895 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: soc/intel/denverton_ns: Remove variable set but not used
by HAOUAS Elyes (Code Review) 23 May '19

23 May '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32913 Change subject: soc/intel/denverton_ns: Remove variable set but not used ...................................................................... soc/intel/denverton_ns: Remove variable set but not used Change-Id: Ic04231525c1aaaf3afc8c11cddc409b1f5b46743 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/intel/denverton_ns/cpu.c 1 file changed, 0 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/32913/1 diff --git a/src/soc/intel/denverton_ns/cpu.c b/src/soc/intel/denverton_ns/cpu.c index 2a63171..fc1024a 100644 --- a/src/soc/intel/denverton_ns/cpu.c +++ b/src/soc/intel/denverton_ns/cpu.c @@ -38,7 +38,6 @@ static void dnv_configure_mca(void) { msr_t msr; - int num_banks; struct cpuid_result cpuid_regs; /* Check feature flag in CPUID.(EAX=1):EDX[7]==1 MCE @@ -48,7 +47,6 @@ return; msr = rdmsr(IA32_MCG_CAP); - num_banks = msr.lo & IA32_MCG_CAP_COUNT_MASK; if (msr.lo & IA32_MCG_CAP_CTL_P_MASK) { /* Enable all error logging */ msr.lo = msr.hi = 0xffffffff; -- To view, visit https://review.coreboot.org/c/coreboot/+/32913 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic04231525c1aaaf3afc8c11cddc409b1f5b46743 Gerrit-Change-Number: 32913 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: cpu/amd/quadcore: Remove variable set but not used
by HAOUAS Elyes (Code Review) 23 May '19

23 May '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32893 Change subject: cpu/amd/quadcore: Remove variable set but not used ...................................................................... cpu/amd/quadcore: Remove variable set but not used Change-Id: I73f35ea80976ab445c797c4800b1e2fd24d34fdf Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/cpu/amd/quadcore/quadcore.c 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/32893/1 diff --git a/src/cpu/amd/quadcore/quadcore.c b/src/cpu/amd/quadcore/quadcore.c index ad4a7ea..125876b 100644 --- a/src/cpu/amd/quadcore/quadcore.c +++ b/src/cpu/amd/quadcore/quadcore.c @@ -95,13 +95,13 @@ */ /* Wait for the first core of each compute unit to start... */ - uint32_t timeout; for (i = 1; i < cores + 1; i++) { if (!(i & 0x1)) { uint32_t ap_apicid = get_boot_apic_id(nodeid, i); - timeout = wait_cpu_state(ap_apicid, - F10_APSTATE_ASLEEP, F10_APSTATE_ASLEEP); + /* Timeout */ + wait_cpu_state(ap_apicid, F10_APSTATE_ASLEEP, + F10_APSTATE_ASLEEP); } } -- To view, visit https://review.coreboot.org/c/coreboot/+/32893 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I73f35ea80976ab445c797c4800b1e2fd24d34fdf Gerrit-Change-Number: 32893 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: lib/bootblock: Sanitize CMOS after bootblock_*_early_init()
by Thomas Heijligen (Code Review) 23 May '19

23 May '19

Hello Nico Huber, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/31349 to review the following change. Change subject: lib/bootblock: Sanitize CMOS after bootblock_*_early_init() ...................................................................... lib/bootblock: Sanitize CMOS after bootblock_*_early_init() CMOS isn't used that early, but the chipset initialization may be required to access it. In one instance, Intel Apollo Lake, the sanitize_cmos() function seems to hang if called before bootblock_soc_early_init(). The missing step is fast_spi_early_init(). But even without, one might expect sanitize_cmos() to return eventually (it didn't within about 20min). Change-Id: I6e1a029e4be7e109be43a3dad944bd7e05ea1f02 Signed-off-by: Nico Huber <nico.huber(a)secunet.com> --- M src/lib/bootblock.c 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/31349/1 diff --git a/src/lib/bootblock.c b/src/lib/bootblock.c index f2ada52..6b9ecbf 100644 --- a/src/lib/bootblock.c +++ b/src/lib/bootblock.c @@ -41,12 +41,12 @@ timestamps[i].entry_stamp); } - sanitize_cmos(); - cmos_post_init(); - bootblock_soc_early_init(); bootblock_mainboard_early_init(); + sanitize_cmos(); + cmos_post_init(); + if (IS_ENABLED(CONFIG_BOOTBLOCK_CONSOLE)) { console_init(); exception_init(); -- To view, visit https://review.coreboot.org/c/coreboot/+/31349 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6e1a029e4be7e109be43a3dad944bd7e05ea1f02 Gerrit-Change-Number: 31349 Gerrit-PatchSet: 1 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: device_tree: Use be32dec/be32enc where appropriate
by Julius Werner (Code Review) 23 May '19

23 May '19

Hello Patrick Rudolph, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/32860 to review the following change. Change subject: device_tree: Use be32dec/be32enc where appropriate ...................................................................... device_tree: Use be32dec/be32enc where appropriate This patch rewrites some of the device tree code to use the new be32dec/be32enc helpers where they can make the code cleaner. Change-Id: I437bbd6645a556ae9a0cfe6ea14638098e4c3606 Signed-off-by: Julius Werner <jwerner(a)chromium.org> --- M src/lib/device_tree.c 1 file changed, 8 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/32860/1 diff --git a/src/lib/device_tree.c b/src/lib/device_tree.c index 79561a6..8dbc510 100644 --- a/src/lib/device_tree.c +++ b/src/lib/device_tree.c @@ -56,7 +56,7 @@ int fdt_node_name(const void *blob, uint32_t offset, const char **name) { uint8_t *ptr = ((uint8_t *)blob) + offset; - if (be32toh(*(uint32_t *)ptr) != FDT_TOKEN_BEGIN_NODE) + if (be32dec(ptr) != FDT_TOKEN_BEGIN_NODE) return 0; ptr += 4; @@ -358,14 +358,14 @@ uint8_t *dstruct = (uint8_t *)*struct_start; uint8_t *dstrings = (uint8_t *)*strings_start; - *((uint32_t *)dstruct) = htobe32(FDT_TOKEN_PROPERTY); + be32enc(dstruct, FDT_TOKEN_PROPERTY); dstruct += sizeof(uint32_t); - *((uint32_t *)dstruct) = htobe32(prop->prop.size); + be32enc(dstruct, prop->prop.size); dstruct += sizeof(uint32_t); uint32_t name_offset = (uintptr_t)dstrings - (uintptr_t)strings_base; - *((uint32_t *)dstruct) = htobe32(name_offset); + be32enc(dstruct, name_offset); dstruct += sizeof(uint32_t); strcpy((char *)dstrings, prop->prop.name); @@ -385,7 +385,7 @@ uint8_t *dstruct = (uint8_t *)*struct_start; uint8_t *dstrings = (uint8_t *)*strings_start; - *((uint32_t *)dstruct) = htobe32(FDT_TOKEN_BEGIN_NODE); + be32enc(dstruct, FDT_TOKEN_BEGIN_NODE); dstruct += sizeof(uint32_t); strcpy((char *)dstruct, node->name); @@ -401,7 +401,7 @@ dt_flatten_node(child, (void **)&dstruct, strings_base, (void **)&dstrings); - *((uint32_t *)dstruct) = htobe32(FDT_TOKEN_END_NODE); + be32enc(dstruct, FDT_TOKEN_END_NODE); dstruct += sizeof(uint32_t); *struct_start = dstruct; @@ -489,9 +489,9 @@ struct device_tree_property *prop; list_for_each(prop, node->properties, list_node) { if (addrcp && !strcmp("#address-cells", prop->prop.name)) - *addrcp = be32toh(*(u32 *)prop->prop.data); + *addrcp = be32dec(prop->prop.data); if (sizecp && !strcmp("#size-cells", prop->prop.name)) - *sizecp = be32toh(*(u32 *)prop->prop.data); + *sizecp = be32dec(prop->prop.data); } } -- To view, visit https://review.coreboot.org/c/coreboot/+/32860 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I437bbd6645a556ae9a0cfe6ea14638098e4c3606 Gerrit-Change-Number: 32860 Gerrit-PatchSet: 1 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: superio: Add ASpeed AST2400
by Christian Walter (Code Review) 23 May '19

23 May '19

Christian Walter has uploaded a new patch set (#27) to the change originally created by Frans Hendriks. ( https://review.coreboot.org/c/coreboot/+/23135 ) Change subject: superio: Add ASpeed AST2400 ...................................................................... superio: Add ASpeed AST2400 Add support for ASpeed AST2400. This device uses write twice 0xA5 to enter config mode. BUG = N/A TEST = ASRock D1521D4U Change-Id: I58fce31f0a2483e61e9d31f38ab5a059b8cf4f83 Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> Signed-off-by: Felix Singer <migy(a)darmstadt.ccc.de> --- M src/include/superio/conf_mode.h M src/superio/Makefile.inc A src/superio/aspeed/Makefile.inc A src/superio/aspeed/ast2400/Kconfig A src/superio/aspeed/ast2400/Makefile.inc A src/superio/aspeed/ast2400/ast2400.h A src/superio/aspeed/ast2400/superio.c A src/superio/aspeed/common/Kconfig A src/superio/aspeed/common/aspeed.h A src/superio/aspeed/common/early_serial.c M src/superio/common/conf_mode.c 11 files changed, 317 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/23135/27 -- To view, visit https://review.coreboot.org/c/coreboot/+/23135 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I58fce31f0a2483e61e9d31f38ab5a059b8cf4f83 Gerrit-Change-Number: 23135 Gerrit-PatchSet: 27 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: fit: Add "board-skuX" (without -rev) to allowed compatible strings
by Julius Werner (Code Review) 23 May '19

23 May '19

Hello Patrick Rudolph, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/32859 to review the following change. Change subject: fit: Add "board-skuX" (without -rev) to allowed compatible strings ...................................................................... fit: Add "board-skuX" (without -rev) to allowed compatible strings In some cases we may have boards that need to differentiate SKUs but don't really want to differentiate revisions (at least for some SKUs). Let's add a compatible string match that includes only the SKU but not the revision so that kernel DTSes don't have to specify every possible revision if they want to match this. This patch was adapted from depthcharge's http://crosreview.com/1512004 Change-Id: Ib88862424b350a213761f5662fe170a1f8fccc7f Signed-off-by: Julius Werner <jwerner(a)chromium.org> --- M src/lib/fit.c 1 file changed, 8 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/32859/1 diff --git a/src/lib/fit.c b/src/lib/fit.c index a8bca47..3aad806 100644 --- a/src/lib/fit.c +++ b/src/lib/fit.c @@ -63,6 +63,14 @@ fit_add_compat_string(compat_string); } + if (sku_id() != UNDEFINED_STRAPPING_ID) { + snprintf(compat_string, sizeof(compat_string), "%s,%s-sku%u", + CONFIG_MAINBOARD_VENDOR, CONFIG_MAINBOARD_PART_NUMBER, + sku_id()); + + fit_add_compat_string(compat_string); + } + if (board_id() != UNDEFINED_STRAPPING_ID) { snprintf(compat_string, sizeof(compat_string), "%s,%s-rev%u", CONFIG_MAINBOARD_VENDOR, CONFIG_MAINBOARD_PART_NUMBER, -- To view, visit https://review.coreboot.org/c/coreboot/+/32859 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib88862424b350a213761f5662fe170a1f8fccc7f Gerrit-Change-Number: 32859 Gerrit-PatchSet: 1 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: console: Move poor-man's atoi() into string.h
by Julius Werner (Code Review) 23 May '19

23 May '19

Hello Patrick Rudolph, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/32858 to review the following change. Change subject: console: Move poor-man's atoi() into string.h ...................................................................... console: Move poor-man's atoi() into string.h vtxprintf.c seems to have been written before string.h was as fleshed out as it is today -- this patch removes some custom implementation of stuff we now have globally. It also moves the skip_atoi() function into string.h, because I need it somewhere else, and while we maybe don't want a huge fully-featured string parsing library in coreboot, being able to parse an integer is occasionally useful. Change-Id: Iecb2b970aecfc768540d2bf8b3023445f54853a4 Signed-off-by: Julius Werner <jwerner(a)chromium.org> --- M src/console/vtxprintf.c M src/include/string.h 2 files changed, 14 insertions(+), 16 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/32858/1 diff --git a/src/console/vtxprintf.c b/src/console/vtxprintf.c index f42ed6d..74159d6 100644 --- a/src/console/vtxprintf.c +++ b/src/console/vtxprintf.c @@ -24,20 +24,6 @@ #define SUPPORT_64BIT_INTS #endif -/* haha, don't need ctype.c */ -#define isdigit(c) ((c) >= '0' && (c) <= '9') -#define is_digit isdigit -#define isxdigit(c) (((c) >= '0' && (c) <= '9') || ((c) >= 'a' && (c) <= 'f') || ((c) >= 'A' && (c) <= 'F')) - -static int skip_atoi(const char **s) -{ - int i = 0; - - while (is_digit(**s)) - i = i*10 + *((*s)++) - '0'; - return i; -} - #define ZEROPAD 1 /* pad with zero */ #define SIGN 2 /* unsigned/signed long */ #define PLUS 4 /* show plus */ @@ -175,7 +161,7 @@ /* get field width */ field_width = -1; - if (is_digit(*fmt)) { + if (isdigit(*fmt)) { field_width = skip_atoi(&fmt); } else if (*fmt == '*') { ++fmt; @@ -191,7 +177,7 @@ precision = -1; if (*fmt == '.') { ++fmt; - if (is_digit(*fmt)) { + if (isdigit(*fmt)) { precision = skip_atoi(&fmt); } else if (*fmt == '*') { ++fmt; diff --git a/src/include/string.h b/src/include/string.h index 4a2f5e9..c8de568 100644 --- a/src/include/string.h +++ b/src/include/string.h @@ -178,4 +178,16 @@ c -= 'A'-'a'; return c; } + +/* Parses a positive integer and moves the input pointer forward to the first + character that's not a valid digit. */ +static inline int skip_atoi(const char **s) +{ + int i = 0; + + while (isdigit(**s)) + i = i*10 + *((*s)++) - '0'; + return i; +} + #endif /* STRING_H */ -- To view, visit https://review.coreboot.org/c/coreboot/+/32858 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iecb2b970aecfc768540d2bf8b3023445f54853a4 Gerrit-Change-Number: 32858 Gerrit-PatchSet: 1 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: commonlib/stdlib.h: Remove printf() from coreboot
by Julius Werner (Code Review) 23 May '19

23 May '19

Hello Patrick Rudolph, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/32857 to review the following change. Change subject: commonlib/stdlib.h: Remove printf() from coreboot ...................................................................... commonlib/stdlib.h: Remove printf() from coreboot coreboot should not have a definition of printf() anywhere -- it's too easy to accidentally sneak it into code otherwise. Where that is needed in code shared with userspace utilities, we should instead use printk() and define a shim for that for the userspace side. Change-Id: Iaa459df7122c88beb56695eee7c252d90bbde861 Signed-off-by: Julius Werner <jwerner(a)chromium.org> --- M src/commonlib/include/commonlib/stdlib.h 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/32857/1 diff --git a/src/commonlib/include/commonlib/stdlib.h b/src/commonlib/include/commonlib/stdlib.h index 1a05eeb..4a3671c 100644 --- a/src/commonlib/include/commonlib/stdlib.h +++ b/src/commonlib/include/commonlib/stdlib.h @@ -38,11 +38,11 @@ #if CONFIG(COREBOOT_BUILD) #include <console/console.h> #include <halt.h> -#define printf(...) printk(BIOS_ERR, __VA_ARGS__) #define HALT(x) halt() #else #include <stdio.h> -#define HALT(x) +#define printk(level, ...) printf(__VA_ARGS__) +#define HALT(x) abort() #endif static inline void *xmalloc_work(size_t size, const char *file, @@ -50,7 +50,7 @@ { void *ret = malloc(size); if (!ret && size) { - printf("%s/%s/line %d: Failed to malloc %zu bytes\n", + printk(BIOS_ERR, "%s/%s/line %d: Failed to malloc %zu bytes\n", file, func, line, size); while (1) HALT(1); -- To view, visit https://review.coreboot.org/c/coreboot/+/32857 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaa459df7122c88beb56695eee7c252d90bbde861 Gerrit-Change-Number: 32857 Gerrit-PatchSet: 1 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newchange

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coreboot-gerrit May 2019