coreboot-gerrit May 2019

coreboot-gerrit@coreboot.org

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Change in ...coreboot[master]: src/drivers/xgi: Move coreboot related includes to xgi_coreboot.h
by Kyösti Mälkki (Code Review) 23 May '19

23 May '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29307 ) Change subject: src/drivers/xgi: Move coreboot related includes to xgi_coreboot.h ...................................................................... Patch Set 23: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/29307 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia18c77876121594a272a07d56acfaa863d0ccb25 Gerrit-Change-Number: 29307 Gerrit-PatchSet: 23 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Damien Zammit Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Comment-Date: Thu, 23 May 2019 14:37:47 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: src/drivers/xgi: Move coreboot related includes to xgi_coreboot.h
by Angel Pons (Code Review) 23 May '19

23 May '19

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29307 ) Change subject: src/drivers/xgi: Move coreboot related includes to xgi_coreboot.h ...................................................................... Patch Set 23: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/29307 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia18c77876121594a272a07d56acfaa863d0ccb25 Gerrit-Change-Number: 29307 Gerrit-PatchSet: 23 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Damien Zammit Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Comment-Date: Thu, 23 May 2019 14:36:52 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: {drivers,soc/intel/braswell}: Implement C_ENVIRONMENT_BOOTBLOCK support
by Arthur Heymans (Code Review) 23 May '19

23 May '19

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29662 ) Change subject: {drivers,soc/intel/braswell}: Implement C_ENVIRONMENT_BOOTBLOCK support ...................................................................... Patch Set 29: (4 comments) https://review.coreboot.org/#/c/29662/28/src/drivers/intel/fsp1_1/include/f… File src/drivers/intel/fsp1_1/include/fsp/car.h: https://review.coreboot.org/#/c/29662/28/src/drivers/intel/fsp1_1/include/f… PS28, Line 24: struct cache_as_ram_params { : uint64_t tsc; : uint32_t bist; : FSP_INFO_HEADER *fih; : uintptr_t bootloader_car_start; : uintptr_t bootloader_car_end; : }; You might want to clean this up, as most gets unused now. https://review.coreboot.org/#/c/29662/28/src/soc/intel/braswell/bootblock/c… File src/soc/intel/braswell/bootblock/cache_as_ram.S: https://review.coreboot.org/#/c/29662/28/src/soc/intel/braswell/bootblock/c… PS28, Line 93: : /* : * ebp: FSP_INFO_HEADER address : * ecx: Temp RAM base : * edx: Temp RAM top : * edi: BIST value : * esp: Top of stack in temp RAM : * mm0: low 32-bits of TSC value : * mm1: high 32-bits of TSC value : */ : : /* Create cache_as_ram_params on stack */ : pushl %edx /* bootloader CAR end */ : pushl %ecx /* bootloader CAR begin */ : pushl %ebp /* FSP_INFO_HEADER */ : pushl %edi /* bist */ : movd %mm1, %eax : pushl %eax /* tsc[63:32] */ : movd %mm0, %eax : pushl %eax /* tsc[31:0] */ : pushl %esp /* pointer to cache_as_ram_params */ The bootblock function does not use this anymore. https://review.coreboot.org/#/c/29662/28/src/soc/intel/braswell/bootblock/c… PS28, Line 128: /* Restore the timestamp from bootblock_crt0.S (ebp:mm1) */ > in bootblock_protectd_mode_entry: (file src\arch\x86\bootblock_ctr0. […] Yes but here you push %ebp to to the stack, but %ebp does not contain the upper timestamp (%mm2) (the function argument is 64bit long). %ebp contains the FSP location afaict. https://review.coreboot.org/#/c/29662/28/src/soc/intel/braswell/romstage/ca… File src/soc/intel/braswell/romstage/car_stage_entry.S: https://review.coreboot.org/#/c/29662/28/src/soc/intel/braswell/romstage/ca… PS28, Line 21: .global car_stage_entry : car_stage_entry: : call romstage_c_entry : : movb $0x69, %ah : jmp .Lhlt > Would separate patch be better? […] I pushed some work that cleans this up. See https://review.coreboot.org/c/coreboot/+/32962 and https://review.coreboot.org/c/coreboot/+/32963/ -- To view, visit https://review.coreboot.org/c/coreboot/+/29662 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iab48ad72f1514c93f20d70db5ef4fd8fa2383e8c Gerrit-Change-Number: 29662 Gerrit-PatchSet: 29 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: York Yang <yyang024(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Thu, 23 May 2019 14:07:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Comment-In-Reply-To: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-MessageType: comment

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Change in ...coreboot[master]: {drivers,soc/intel/braswell}: Implement C_ENVIRONMENT_BOOTBLOCK support
by Frans Hendriks (Code Review) 23 May '19

23 May '19

Hello Patrick Rudolph, Huang Jin, Arthur Heymans, York Yang, Lee Leahy, Matt DeVillier, build bot (Jenkins), Hannah Williams, Michał Żygowski, Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/29662 to look at the new patch set (#29). Change subject: {drivers,soc/intel/braswell}: Implement C_ENVIRONMENT_BOOTBLOCK support ...................................................................... {drivers,soc/intel/braswell}: Implement C_ENVIRONMENT_BOOTBLOCK support No C_ENVIRONMENT_BOOTBLOCK support for Braswell is available. Enable support and add required files for the Braswell Bootblock in C. The next changes are made support C_ENVIRONMENT_BOOTBLOCK: - Add car_stage_entry() function bootblock-c_entry() functions. - Specify config DCACHE_BSP_STACK_SIZE and C_ENV_BOOTBLOCK_SIZE. - Add bootblock_c_entry(). - Move init from car_soc_XXX_console_init() to bootblock_soc_XXX_Init() Removed the unused cache_as_ram_main() and weak car_XXX_XXX_console_init() BUG=NA TEST=Booting Embedded Linux on Facebook FBG-1701 Building Google Banos Change-Id: Iab48ad72f1514c93f20d70db5ef4fd8fa2383e8c Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> --- M src/drivers/intel/fsp1_1/Makefile.inc M src/drivers/intel/fsp1_1/car.c M src/drivers/intel/fsp1_1/include/fsp/car.h M src/soc/intel/braswell/Kconfig M src/soc/intel/braswell/Makefile.inc M src/soc/intel/braswell/bootblock/bootblock.c R src/soc/intel/braswell/bootblock/cache_as_ram.S R src/soc/intel/braswell/include/soc/bootblock.h M src/soc/intel/braswell/include/soc/romstage.h M src/soc/intel/braswell/romstage/Makefile.inc A src/soc/intel/braswell/romstage/car_stage_entry.S M src/soc/intel/braswell/romstage/romstage.c 12 files changed, 172 insertions(+), 263 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/29662/29 -- To view, visit https://review.coreboot.org/c/coreboot/+/29662 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iab48ad72f1514c93f20d70db5ef4fd8fa2383e8c Gerrit-Change-Number: 29662 Gerrit-PatchSet: 29 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: York Yang <yyang024(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: superio: Add ASpeed AST2400
by Christian Walter (Code Review) 23 May '19

23 May '19

Christian Walter has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/23135 ) Change subject: superio: Add ASpeed AST2400 ...................................................................... Patch Set 30: (2 comments) > Patch Set 29: > > (2 comments) Removed. https://review.coreboot.org/#/c/23135/29/src/superio/aspeed/ast2400/ast2400… File src/superio/aspeed/ast2400/ast2400.h: https://review.coreboot.org/#/c/23135/29/src/superio/aspeed/ast2400/ast2400… PS29, Line 21: #include <arch/io.h> > all includes are unused Ack https://review.coreboot.org/#/c/23135/29/src/superio/aspeed/ast2400/ast2400… PS29, Line 36: void pnp_enter_ext_func_mode(pnp_devfn_t dev); > all function prototypes are unused and can be removed Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/23135 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I58fce31f0a2483e61e9d31f38ab5a059b8cf4f83 Gerrit-Change-Number: 23135 Gerrit-PatchSet: 30 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Comment-Date: Thu, 23 May 2019 13:57:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: comment

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Change in ...coreboot[master]: superio: Add ASpeed AST2400
by Christian Walter (Code Review) 23 May '19

23 May '19

Christian Walter has uploaded a new patch set (#30) to the change originally created by Frans Hendriks. ( https://review.coreboot.org/c/coreboot/+/23135 ) Change subject: superio: Add ASpeed AST2400 ...................................................................... superio: Add ASpeed AST2400 Add support for ASpeed AST2400. This device uses write twice 0xA5 to enter config mode. BUG = N/A TEST = ASRock D1521D4U Change-Id: I58fce31f0a2483e61e9d31f38ab5a059b8cf4f83 Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> Signed-off-by: Felix Singer <migy(a)darmstadt.ccc.de> --- M src/include/superio/conf_mode.h M src/superio/Makefile.inc A src/superio/aspeed/Makefile.inc A src/superio/aspeed/ast2400/Kconfig A src/superio/aspeed/ast2400/Makefile.inc A src/superio/aspeed/ast2400/ast2400.h A src/superio/aspeed/ast2400/superio.c A src/superio/aspeed/common/Kconfig A src/superio/aspeed/common/aspeed.h A src/superio/aspeed/common/early_serial.c M src/superio/common/conf_mode.c 11 files changed, 307 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/23135/30 -- To view, visit https://review.coreboot.org/c/coreboot/+/23135 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I58fce31f0a2483e61e9d31f38ab5a059b8cf4f83 Gerrit-Change-Number: 23135 Gerrit-PatchSet: 30 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: superio: Add ASpeed AST2400
by Patrick Rudolph (Code Review) 23 May '19

23 May '19

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/23135 ) Change subject: superio: Add ASpeed AST2400 ...................................................................... Patch Set 29: (2 comments) https://review.coreboot.org/#/c/23135/29/src/superio/aspeed/ast2400/ast2400… File src/superio/aspeed/ast2400/ast2400.h: https://review.coreboot.org/#/c/23135/29/src/superio/aspeed/ast2400/ast2400… PS29, Line 21: #include <arch/io.h> all includes are unused https://review.coreboot.org/#/c/23135/29/src/superio/aspeed/ast2400/ast2400… PS29, Line 36: void pnp_enter_ext_func_mode(pnp_devfn_t dev); all function prototypes are unused and can be removed -- To view, visit https://review.coreboot.org/c/coreboot/+/23135 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I58fce31f0a2483e61e9d31f38ab5a059b8cf4f83 Gerrit-Change-Number: 23135 Gerrit-PatchSet: 29 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Comment-Date: Thu, 23 May 2019 12:40:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: src/include/device/pci_ids.h: Added another Kabylake DT src/soc/intel...
by Christian Walter (Code Review) 23 May '19

23 May '19

Christian Walter has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32850 Change subject: src/include/device/pci_ids.h: Added another Kabylake DT src/soc/intelcommon/block/systemagent/systemagent.c: Added another KabyLake DT ...................................................................... src/include/device/pci_ids.h: Added another Kabylake DT src/soc/intelcommon/block/systemagent/systemagent.c: Added another KabyLake DT Change-Id: I496b3a91f765d4fa137c32c9ee1e244803fc25d8 Signed-off-by: Christian Walter <christian.walter(a)9elements.com> --- M src/include/device/pci_ids.h M src/soc/intel/common/block/systemagent/systemagent.c 2 files changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/32850/1 diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 6453951..553deaf 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3081,6 +3081,7 @@ #define PCI_DEVICE_ID_INTEL_KBL_ID_Y 0x590c #define PCI_DEVICE_ID_INTEL_KBL_ID_H 0x5910 #define PCI_DEVICE_ID_INTEL_KBL_U_R 0x5914 +#define PCI_DEVICE_ID_INTEL_KBL_ID_DT_2 0x5918 #define PCI_DEVICE_ID_INTEL_KBL_ID_DT 0x591f #define PCI_DEVICE_ID_INTEL_CNL_ID_U 0x5A04 #define PCI_DEVICE_ID_INTEL_CNL_ID_Y 0x5A02 diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c index 0f91156..281a7f7 100644 --- a/src/soc/intel/common/block/systemagent/systemagent.c +++ b/src/soc/intel/common/block/systemagent/systemagent.c @@ -351,6 +351,7 @@ PCI_DEVICE_ID_INTEL_KBL_ID_H, PCI_DEVICE_ID_INTEL_KBL_U_R, PCI_DEVICE_ID_INTEL_KBL_ID_DT, + PCI_DEVICE_ID_INTEL_KBL_ID_DT_2, PCI_DEVICE_ID_INTEL_CFL_ID_U, PCI_DEVICE_ID_INTEL_CFL_ID_H, PCI_DEVICE_ID_INTEL_CFL_ID_S, -- To view, visit https://review.coreboot.org/c/coreboot/+/32850 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I496b3a91f765d4fa137c32c9ee1e244803fc25d8 Gerrit-Change-Number: 32850 Gerrit-PatchSet: 1 Gerrit-Owner: Christian Walter <christian.walter(a)9elements.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: {drivers,soc/intel/braswell}: Implement C_ENVIRONMENT_BOOTBLOCK support
by Frans Hendriks (Code Review) 23 May '19

23 May '19

Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29662 ) Change subject: {drivers,soc/intel/braswell}: Implement C_ENVIRONMENT_BOOTBLOCK support ...................................................................... Patch Set 28: (5 comments) https://review.coreboot.org/#/c/29662/28/src/drivers/intel/fsp1_1/include/f… File src/drivers/intel/fsp1_1/include/fsp/car.h: https://review.coreboot.org/#/c/29662/28/src/drivers/intel/fsp1_1/include/f… PS28, Line 38: : /* Mainboard and SoC initialization prior to console. */ : void car_mainboard_pre_console_init(void); : void car_soc_pre_console_init(void); : /* Mainboard and SoC initialization post console initialization. */ : void car_mainboard_post_console_init(void); : void car_soc_post_console_init(void); > Those are unused now? Yes. https://review.coreboot.org/#/c/29662/28/src/soc/intel/braswell/bootblock/b… File src/soc/intel/braswell/bootblock/bootblock.c: https://review.coreboot.org/#/c/29662/28/src/soc/intel/braswell/bootblock/b… PS28, Line 35: : void program_base_addresses(void) > Is this called somewhere else? Why not static void? Ack https://review.coreboot.org/#/c/29662/28/src/soc/intel/braswell/bootblock/b… PS28, Line 127: setup_mmconfig(); > Doing this before programming base addresses would be more logical. Agree https://review.coreboot.org/#/c/29662/28/src/soc/intel/braswell/bootblock/c… File src/soc/intel/braswell/bootblock/cache_as_ram.S: https://review.coreboot.org/#/c/29662/28/src/soc/intel/braswell/bootblock/c… PS28, Line 128: /* Restore the timestamp from bootblock_crt0.S (ebp:mm1) */ > Your removed the code that moved the timestamps in ebp:mm1... in bootblock_protectd_mode_entry: (file src\arch\x86\bootblock_ctr0.S) mm1 is filled, before calling bootblock_pre_c_entry(). https://review.coreboot.org/#/c/29662/28/src/soc/intel/braswell/romstage/ca… File src/soc/intel/braswell/romstage/car_stage_entry.S: https://review.coreboot.org/#/c/29662/28/src/soc/intel/braswell/romstage/ca… PS28, Line 21: .global car_stage_entry : car_stage_entry: : call romstage_c_entry : : movb $0x69, %ah : jmp .Lhlt > Looks like skylake does this too, but IMO it makes little sense. […] Would separate patch be better? Maybe after merge of this patch doing skylake and braswell in one patch set -- To view, visit https://review.coreboot.org/c/coreboot/+/29662 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iab48ad72f1514c93f20d70db5ef4fd8fa2383e8c Gerrit-Change-Number: 29662 Gerrit-PatchSet: 28 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: York Yang <yyang024(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Thu, 23 May 2019 12:32:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in ...coreboot[master]: superio: Add ASpeed AST2400
by Christian Walter (Code Review) 23 May '19

23 May '19

Christian Walter has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/23135 ) Change subject: superio: Add ASpeed AST2400 ...................................................................... Patch Set 28: (6 comments) https://review.coreboot.org/#/c/23135/23/src/superio/aspeed/ast2400/superio… File src/superio/aspeed/ast2400/superio.c: https://review.coreboot.org/#/c/23135/23/src/superio/aspeed/ast2400/superio… PS23, Line 49: &ops > Still applies Ack https://review.coreboot.org/#/c/23135/23/src/superio/aspeed/ast2400/superio… PS23, Line 55: { &ops, AST2400_GPIO, PNP_IRQ0, }, > no IO region, please add a comment as well Ack https://review.coreboot.org/#/c/23135/28/src/superio/aspeed/common/Kconfig File src/superio/aspeed/common/Kconfig: https://review.coreboot.org/#/c/23135/28/src/superio/aspeed/common/Kconfig@… PS28, Line 18: # Generic Aspeed romstage driver - Just enough UART initialisation code for > preram Ack https://review.coreboot.org/#/c/23135/27/src/superio/aspeed/common/early_se… File src/superio/aspeed/common/early_serial.c: https://review.coreboot.org/#/c/23135/27/src/superio/aspeed/common/early_se… PS27, Line 19: * A generic romstage (pre-ram) driver for Aspeed variant Super I/O chips. > preram, no need to mention romstage Ack https://review.coreboot.org/#/c/23135/27/src/superio/aspeed/common/early_se… PS27, Line 38: #include <device/pnp.h> > obsolete Ack https://review.coreboot.org/#/c/23135/27/src/superio/aspeed/common/early_se… PS27, Line 40: #include <device/pnp_type.h> > obsolete Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/23135 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I58fce31f0a2483e61e9d31f38ab5a059b8cf4f83 Gerrit-Change-Number: 23135 Gerrit-PatchSet: 28 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Comment-Date: Thu, 23 May 2019 12:01:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <siro(a)das-labor.org> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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coreboot-gerrit May 2019